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Andrea Di Biagio3a6b0922018-03-08 13:05:02 +00001//===--------------------- Backend.cpp --------------------------*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9/// \file
10///
11/// Implementation of class Backend which emulates an hardware OoO backend.
12///
13//===----------------------------------------------------------------------===//
14
15#include "Backend.h"
16#include "HWEventListener.h"
17#include "llvm/CodeGen/TargetSchedule.h"
18#include "llvm/Support/Debug.h"
19
20namespace mca {
21
22#define DEBUG_TYPE "llvm-mca"
23
24using namespace llvm;
25
26void Backend::addEventListener(HWEventListener *Listener) {
27 if (Listener)
28 Listeners.insert(Listener);
29}
30
31void Backend::runCycle(unsigned Cycle) {
32 notifyCycleBegin(Cycle);
33
Andrea Di Biagio4732d43ca2018-03-14 14:57:23 +000034 while (SM.hasNext()) {
35 InstRef IR = SM.peekNext();
Andrea Di Biagio49c85912018-05-04 13:10:10 +000036 std::unique_ptr<Instruction> NewIS = IB.createInstruction(*IR.second);
Andrea Di Biagio4732d43ca2018-03-14 14:57:23 +000037 const InstrDesc &Desc = NewIS->getDesc();
Andrea Di Biagio91ab2ee2018-03-19 13:23:07 +000038 if (!DU->isAvailable(Desc.NumMicroOps) ||
39 !DU->canDispatch(IR.first, *NewIS))
Andrea Di Biagio3a6b0922018-03-08 13:05:02 +000040 break;
41
Andrea Di Biagio4732d43ca2018-03-14 14:57:23 +000042 Instruction *IS = NewIS.get();
43 Instructions[IR.first] = std::move(NewIS);
Andrea Di Biagio09ea09e2018-03-22 11:39:34 +000044 DU->dispatch(IR.first, IS, STI);
Andrea Di Biagio4732d43ca2018-03-14 14:57:23 +000045 SM.updateNext();
Andrea Di Biagio3a6b0922018-03-08 13:05:02 +000046 }
47
48 notifyCycleEnd(Cycle);
49}
50
51void Backend::notifyCycleBegin(unsigned Cycle) {
52 DEBUG(dbgs() << "[E] Cycle begin: " << Cycle << '\n');
53 for (HWEventListener *Listener : Listeners)
Andrea Di Biagio3e646442018-04-12 10:49:40 +000054 Listener->onCycleBegin();
Andrea Di Biagio3a6b0922018-03-08 13:05:02 +000055
Andrea Di Biagio3e646442018-04-12 10:49:40 +000056 DU->cycleEvent();
57 HWS->cycleEvent();
Andrea Di Biagio3a6b0922018-03-08 13:05:02 +000058}
59
Clement Courbet844f22d2018-03-13 13:11:01 +000060void Backend::notifyInstructionEvent(const HWInstructionEvent &Event) {
Andrea Di Biagio3a6b0922018-03-08 13:05:02 +000061 for (HWEventListener *Listener : Listeners)
Clement Courbet844f22d2018-03-13 13:11:01 +000062 Listener->onInstructionEvent(Event);
Andrea Di Biagio3a6b0922018-03-08 13:05:02 +000063}
64
Andrea Di Biagio91ab2ee2018-03-19 13:23:07 +000065void Backend::notifyStallEvent(const HWStallEvent &Event) {
66 for (HWEventListener *Listener : Listeners)
67 Listener->onStallEvent(Event);
68}
69
Andrea Di Biagio3a6b0922018-03-08 13:05:02 +000070void Backend::notifyResourceAvailable(const ResourceRef &RR) {
71 DEBUG(dbgs() << "[E] Resource Available: [" << RR.first << '.' << RR.second
72 << "]\n");
73 for (HWEventListener *Listener : Listeners)
74 Listener->onResourceAvailable(RR);
75}
76
Andrea Di Biagioa3f2e482018-03-20 18:20:39 +000077void Backend::notifyReservedBuffers(ArrayRef<unsigned> Buffers) {
78 for (HWEventListener *Listener : Listeners)
79 Listener->onReservedBuffers(Buffers);
80}
81
82void Backend::notifyReleasedBuffers(ArrayRef<unsigned> Buffers) {
83 for (HWEventListener *Listener : Listeners)
84 Listener->onReleasedBuffers(Buffers);
85}
86
Andrea Di Biagio3a6b0922018-03-08 13:05:02 +000087void Backend::notifyCycleEnd(unsigned Cycle) {
88 DEBUG(dbgs() << "[E] Cycle end: " << Cycle << "\n\n");
89 for (HWEventListener *Listener : Listeners)
Andrea Di Biagio3e646442018-04-12 10:49:40 +000090 Listener->onCycleEnd();
Andrea Di Biagio3a6b0922018-03-08 13:05:02 +000091}
Andrea Di Biagio3a6b0922018-03-08 13:05:02 +000092} // namespace mca.