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Jia Liub22310f2012-02-18 12:03:15 +00001//===-- Thumb1InstrInfo.cpp - Thumb-1 Instruction Information -------------===//
Anton Korobeynikov99152f32009-06-26 21:28:53 +00002//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
David Goodwinade05a32009-07-02 22:18:33 +000010// This file contains the Thumb-1 implementation of the TargetInstrInfo class.
Anton Korobeynikov99152f32009-06-26 21:28:53 +000011//
12//===----------------------------------------------------------------------===//
13
Evan Cheng207b2462009-11-06 23:52:48 +000014#include "Thumb1InstrInfo.h"
Anton Korobeynikov99152f32009-06-26 21:28:53 +000015#include "llvm/CodeGen/MachineFrameInfo.h"
16#include "llvm/CodeGen/MachineInstrBuilder.h"
Evan Cheng1a4492b2009-11-01 22:04:35 +000017#include "llvm/CodeGen/MachineMemOperand.h"
Chandler Carruthed0881b2012-12-03 16:50:05 +000018#include "llvm/CodeGen/MachineRegisterInfo.h"
Jim Grosbach617f84dd2012-02-28 23:53:30 +000019#include "llvm/MC/MCInst.h"
Anton Korobeynikov99152f32009-06-26 21:28:53 +000020
21using namespace llvm;
22
Anton Korobeynikov14635da2009-11-02 00:10:38 +000023Thumb1InstrInfo::Thumb1InstrInfo(const ARMSubtarget &STI)
Bill Wendlingf95178e2013-06-07 05:54:19 +000024 : ARMBaseInstrInfo(STI), RI(STI) {
Anton Korobeynikov99152f32009-06-26 21:28:53 +000025}
26
Jim Grosbach617f84dd2012-02-28 23:53:30 +000027/// getNoopForMachoTarget - Return the noop instruction to use for a noop.
28void Thumb1InstrInfo::getNoopForMachoTarget(MCInst &NopInst) const {
29 NopInst.setOpcode(ARM::tMOVr);
30 NopInst.addOperand(MCOperand::CreateReg(ARM::R8));
31 NopInst.addOperand(MCOperand::CreateReg(ARM::R8));
32 NopInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
33 NopInst.addOperand(MCOperand::CreateReg(0));
34}
35
Evan Chengcd4cdd12009-07-11 06:43:01 +000036unsigned Thumb1InstrInfo::getUnindexedOpcode(unsigned Opc) const {
David Goodwinaf7451b2009-07-08 16:09:28 +000037 return 0;
38}
39
Jakob Stoklund Olesend7b33002010-07-11 06:33:54 +000040void Thumb1InstrInfo::copyPhysReg(MachineBasicBlock &MBB,
41 MachineBasicBlock::iterator I, DebugLoc DL,
42 unsigned DestReg, unsigned SrcReg,
43 bool KillSrc) const {
Jim Grosbache9cc9012011-06-30 23:38:17 +000044 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tMOVr), DestReg)
Jim Grosbachb98ab912011-06-30 22:10:46 +000045 .addReg(SrcReg, getKillRegState(KillSrc)));
Jakob Stoklund Olesend7b33002010-07-11 06:33:54 +000046 assert(ARM::GPRRegClass.contains(DestReg, SrcReg) &&
47 "Thumb1 can only copy GPR registers");
Anton Korobeynikov99152f32009-06-26 21:28:53 +000048}
49
David Goodwinade05a32009-07-02 22:18:33 +000050void Thumb1InstrInfo::
Anton Korobeynikov99152f32009-06-26 21:28:53 +000051storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
52 unsigned SrcReg, bool isKill, int FI,
Evan Chengefb126a2010-05-06 19:06:44 +000053 const TargetRegisterClass *RC,
54 const TargetRegisterInfo *TRI) const {
Craig Topperc7242e02012-04-20 07:30:17 +000055 assert((RC == &ARM::tGPRRegClass ||
Evan Chenge5801bd2009-08-13 05:40:51 +000056 (TargetRegisterInfo::isPhysicalRegister(SrcReg) &&
57 isARMLowRegister(SrcReg))) && "Unknown regclass!");
Anton Korobeynikov99152f32009-06-26 21:28:53 +000058
Craig Topperc7242e02012-04-20 07:30:17 +000059 if (RC == &ARM::tGPRRegClass ||
Jim Grosbachd1a8a782010-01-15 22:21:03 +000060 (TargetRegisterInfo::isPhysicalRegister(SrcReg) &&
61 isARMLowRegister(SrcReg))) {
Evan Chengefb126a2010-05-06 19:06:44 +000062 DebugLoc DL;
63 if (I != MBB.end()) DL = I->getDebugLoc();
64
Evan Cheng1a4492b2009-11-01 22:04:35 +000065 MachineFunction &MF = *MBB.getParent();
66 MachineFrameInfo &MFI = *MF.getFrameInfo();
67 MachineMemOperand *MMO =
Jay Foad465101b2011-11-15 07:34:52 +000068 MF.getMachineMemOperand(MachinePointerInfo::getFixedStack(FI),
Chris Lattnere3d864b2010-09-21 04:39:43 +000069 MachineMemOperand::MOStore,
Evan Cheng1a4492b2009-11-01 22:04:35 +000070 MFI.getObjectSize(FI),
71 MFI.getObjectAlignment(FI));
Jim Grosbachd86f34d2011-06-29 20:26:39 +000072 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tSTRspi))
Evan Chengcd4cdd12009-07-11 06:43:01 +000073 .addReg(SrcReg, getKillRegState(isKill))
Evan Cheng1a4492b2009-11-01 22:04:35 +000074 .addFrameIndex(FI).addImm(0).addMemOperand(MMO));
Anton Korobeynikov99152f32009-06-26 21:28:53 +000075 }
76}
77
David Goodwinade05a32009-07-02 22:18:33 +000078void Thumb1InstrInfo::
Anton Korobeynikov99152f32009-06-26 21:28:53 +000079loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
80 unsigned DestReg, int FI,
Evan Chengefb126a2010-05-06 19:06:44 +000081 const TargetRegisterClass *RC,
82 const TargetRegisterInfo *TRI) const {
Craig Topperc7242e02012-04-20 07:30:17 +000083 assert((RC == &ARM::tGPRRegClass ||
Evan Chenge5801bd2009-08-13 05:40:51 +000084 (TargetRegisterInfo::isPhysicalRegister(DestReg) &&
85 isARMLowRegister(DestReg))) && "Unknown regclass!");
Anton Korobeynikov99152f32009-06-26 21:28:53 +000086
Craig Topperc7242e02012-04-20 07:30:17 +000087 if (RC == &ARM::tGPRRegClass ||
Jim Grosbachd1a8a782010-01-15 22:21:03 +000088 (TargetRegisterInfo::isPhysicalRegister(DestReg) &&
89 isARMLowRegister(DestReg))) {
Evan Chengefb126a2010-05-06 19:06:44 +000090 DebugLoc DL;
91 if (I != MBB.end()) DL = I->getDebugLoc();
92
Evan Cheng1a4492b2009-11-01 22:04:35 +000093 MachineFunction &MF = *MBB.getParent();
94 MachineFrameInfo &MFI = *MF.getFrameInfo();
95 MachineMemOperand *MMO =
Jay Foad465101b2011-11-15 07:34:52 +000096 MF.getMachineMemOperand(MachinePointerInfo::getFixedStack(FI),
Chris Lattnere3d864b2010-09-21 04:39:43 +000097 MachineMemOperand::MOLoad,
Evan Cheng1a4492b2009-11-01 22:04:35 +000098 MFI.getObjectSize(FI),
99 MFI.getObjectAlignment(FI));
Jim Grosbachd86f34d2011-06-29 20:26:39 +0000100 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tLDRspi), DestReg)
Evan Cheng1a4492b2009-11-01 22:04:35 +0000101 .addFrameIndex(FI).addImm(0).addMemOperand(MMO));
Anton Korobeynikov99152f32009-06-26 21:28:53 +0000102 }
103}
Akira Hatanakae5b6e0d2014-07-25 19:31:34 +0000104
105void
106Thumb1InstrInfo::expandLoadStackGuard(MachineBasicBlock::iterator MI,
107 Reloc::Model RM) const {
108 if (RM == Reloc::Static)
109 expandLoadStackGuardBase(MI, ARM::tLDRLIT_ga_abs, ARM::tLDRi, RM);
110 else
111 expandLoadStackGuardBase(MI, ARM::tLDRLIT_ga_pcrel, ARM::tLDRi, RM);
112}