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gerrit-public.fairphone.software / toolchain / llvm-project / e85b06d65f695c576df1e529ee37cb15e6902401 / . / llvm / test / CodeGen / PowerPC / testComparesiltsc.ll
blob: 08a023302bddf2ebc267e8921233b0bdc41ac100 [file] [log] [blame]
Nemanja Ivanovic41c4a102017-09-23 04:41:34 +0000[diff] [blame]1; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
Nemanja Ivanovicdb7e7702017-11-30 13:39:10 +0000[diff] [blame]2; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
3; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
Nemanja Ivanovic41c4a102017-09-23 04:41:34 +0000[diff] [blame]4; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
Nemanja Ivanovicdb7e7702017-11-30 13:39:10 +0000[diff] [blame]5; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
6; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
Nemanja Ivanovic41c4a102017-09-23 04:41:34 +0000[diff] [blame]7; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
8
9@glob = common local_unnamed_addr global i8 0, align 1
10
11; Function Attrs: norecurse nounwind readnone
12define signext i32 @test_iltsc(i8 signext %a, i8 signext %b) {
13; CHECK-LABEL: test_iltsc:
Francis Visoiu Mistrih25528d62017-12-04 17:18:51 +0000[diff] [blame]14; CHECK: # %bb.0: # %entry
Nemanja Ivanovic41c4a102017-09-23 04:41:34 +0000[diff] [blame]15; CHECK-NEXT: sub [[REG:r[0-9]+]], r3, r4
16; CHECK-NEXT: rldicl r3, [[REG]], 1, 63
17; CHECK-NEXT: blr
18entry:
19 %cmp = icmp slt i8 %a, %b
20 %conv2 = zext i1 %cmp to i32
21 ret i32 %conv2
22}
23
24; Function Attrs: norecurse nounwind readnone
25define signext i32 @test_iltsc_sext(i8 signext %a, i8 signext %b) {
26; CHECK-LABEL: test_iltsc_sext:
Francis Visoiu Mistrih25528d62017-12-04 17:18:51 +0000[diff] [blame]27; CHECK: # %bb.0: # %entry
Nemanja Ivanovic41c4a102017-09-23 04:41:34 +0000[diff] [blame]28; CHECK-NEXT: sub [[REG:r[0-9]+]], r3, r4
29; CHECK-NEXT: sradi r3, [[REG]], 63
30; CHECK-NEXT: blr
31entry:
32 %cmp = icmp slt i8 %a, %b
33 %sub = sext i1 %cmp to i32
34 ret i32 %sub
35}
36
37; Function Attrs: norecurse nounwind readnone
38define signext i32 @test_iltsc_sext_z(i8 signext %a) {
39; CHECK-LABEL: test_iltsc_sext_z:
40; CHECK: srawi r3, r3, 31
41; CHECK-NEXT: blr
42entry:
43 %cmp = icmp slt i8 %a, 0
44 %sub = sext i1 %cmp to i32
45 ret i32 %sub
46}
47
48; Function Attrs: norecurse nounwind
49define void @test_iltsc_store(i8 signext %a, i8 signext %b) {
50; CHECK-LABEL: test_iltsc_store:
Francis Visoiu Mistrih25528d62017-12-04 17:18:51 +0000[diff] [blame]51; CHECK: # %bb.0: # %entry
Nemanja Ivanovic41c4a102017-09-23 04:41:34 +0000[diff] [blame]52; CHECK: sub [[REG:r[0-9]+]], r3, r4
53; CHECK: rldicl {{r[0-9]+}}, [[REG]], 1, 63
54entry:
55 %cmp = icmp slt i8 %a, %b
56 %conv3 = zext i1 %cmp to i8
57 store i8 %conv3, i8* @glob, align 1
58 ret void
59}
60
61; Function Attrs: norecurse nounwind
62define void @test_iltsc_sext_store(i8 signext %a, i8 signext %b) {
63; CHECK-LABEL: test_iltsc_sext_store:
Francis Visoiu Mistrih25528d62017-12-04 17:18:51 +0000[diff] [blame]64; CHECK: # %bb.0: # %entry
Nemanja Ivanovic41c4a102017-09-23 04:41:34 +0000[diff] [blame]65; CHECK: sub [[REG:r[0-9]+]], r3, r4
66; CHECK: sradi {{r[0-9]+}}, [[REG]], 63
67entry:
68 %cmp = icmp slt i8 %a, %b
69 %conv3 = sext i1 %cmp to i8
70 store i8 %conv3, i8* @glob, align 1
71 ret void
72}
73
74; Function Attrs: norecurse nounwind
75define void @test_iltsc_sext_z_store(i8 signext %a) {
76; CHECK-LABEL: test_iltsc_sext_z_store:
77; CHECK: srwi {{r[0-9]+}}, r3, 7
78entry:
79 %cmp = icmp slt i8 %a, 0
80 %conv2 = sext i1 %cmp to i8
81 store i8 %conv2, i8* @glob, align 1
82 ret void
83}