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gerrit-public.fairphone.software / toolchain / llvm-project / e93c63d468d36e67cb15d183ecc6b8216c87c138 / . / llvm / lib / Target / AMDGPU / InstPrinter / AMDGPUInstPrinter.h
blob: d97f04689e183cf311b07b83519357de22635369 [file] [log] [blame]
Tom Stellard75aadc22012-12-11 21:25:42 +0000[diff] [blame]1//===-- AMDGPUInstPrinter.h - AMDGPU MC Inst -> ASM interface ---*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10/// \file
11//===----------------------------------------------------------------------===//
12
Matt Arsenault6b6a2c32016-03-11 08:00:27 +0000[diff] [blame]13#ifndef LLVM_LIB_TARGET_AMDGPU_INSTPRINTER_AMDGPUINSTPRINTER_H
14#define LLVM_LIB_TARGET_AMDGPU_INSTPRINTER_AMDGPUINSTPRINTER_H
Tom Stellard75aadc22012-12-11 21:25:42 +0000[diff] [blame]15
Tom Stellard75aadc22012-12-11 21:25:42 +0000[diff] [blame]16#include "llvm/MC/MCInstPrinter.h"
Tom Stellard75aadc22012-12-11 21:25:42 +0000[diff] [blame]17
18namespace llvm {
19
20class AMDGPUInstPrinter : public MCInstPrinter {
21public:
Tom Stellarda096b122017-08-17 22:20:04 +0000[diff] [blame]22 AMDGPUInstPrinter(const MCAsmInfo &MAI,
23 const MCInstrInfo &MII, const MCRegisterInfo &MRI)
Tom Stellard75aadc22012-12-11 21:25:42 +0000[diff] [blame]24 : MCInstPrinter(MAI, MII, MRI) {}
25
26 //Autogenerated by tblgen
Konstantin Zhuravlyovda4687c2016-09-27 14:42:48 +0000[diff] [blame]27 void printInstruction(const MCInst *MI, const MCSubtargetInfo &STI,
28 raw_ostream &O);
Tom Stellard75aadc22012-12-11 21:25:42 +0000[diff] [blame]29 static const char *getRegisterName(unsigned RegNo);
30
Akira Hatanakab46d0232015-03-27 20:36:02 +0000[diff] [blame]31 void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot,
32 const MCSubtargetInfo &STI) override;
Tom Stellardd7e6f132015-04-08 01:09:26 +0000[diff] [blame]33 static void printRegOperand(unsigned RegNo, raw_ostream &O,
34 const MCRegisterInfo &MRI);
Tom Stellard75aadc22012-12-11 21:25:42 +0000[diff] [blame]35
36private:
Matt Arsenaultcc88ce32016-10-12 18:00:51 +0000[diff] [blame]37 void printU4ImmOperand(const MCInst *MI, unsigned OpNo,
38 const MCSubtargetInfo &STI, raw_ostream &O);
Matt Arsenault4d7d3832014-04-15 22:32:49 +0000[diff] [blame]39 void printU8ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
Konstantin Zhuravlyovda4687c2016-09-27 14:42:48 +0000[diff] [blame]40 void printU16ImmOperand(const MCInst *MI, unsigned OpNo,
41 const MCSubtargetInfo &STI, raw_ostream &O);
Sam Koltondfa29f72016-03-09 12:29:31 +0000[diff] [blame]42 void printU4ImmDecOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
Matt Arsenault61cc9082014-10-10 22:16:07 +0000[diff] [blame]43 void printU8ImmDecOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
44 void printU16ImmDecOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
Dmitry Preobrazhensky16608e62017-11-27 17:14:35 +0000[diff] [blame]45 void printS13ImmDecOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
Konstantin Zhuravlyovda4687c2016-09-27 14:42:48 +0000[diff] [blame]46 void printU32ImmOperand(const MCInst *MI, unsigned OpNo,
47 const MCSubtargetInfo &STI, raw_ostream &O);
48 void printNamedBit(const MCInst *MI, unsigned OpNo, raw_ostream &O,
Matt Arsenaulte8dbf792016-07-05 22:06:56 +0000[diff] [blame]49 StringRef BitName);
Tom Stellard229d5e62014-08-05 14:48:12 +0000[diff] [blame]50 void printOffen(const MCInst *MI, unsigned OpNo, raw_ostream &O);
51 void printIdxen(const MCInst *MI, unsigned OpNo, raw_ostream &O);
52 void printAddr64(const MCInst *MI, unsigned OpNo, raw_ostream &O);
53 void printMBUFOffset(const MCInst *MI, unsigned OpNo, raw_ostream &O);
Konstantin Zhuravlyovda4687c2016-09-27 14:42:48 +0000[diff] [blame]54 void printOffset(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
55 raw_ostream &O);
Matt Arsenault9698f1c2017-06-20 19:54:14 +0000[diff] [blame]56 void printOffsetS13(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
57 raw_ostream &O);
58
Konstantin Zhuravlyovda4687c2016-09-27 14:42:48 +0000[diff] [blame]59 void printOffset0(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
60 raw_ostream &O);
61 void printOffset1(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
62 raw_ostream &O);
Artem Tamazov54bfd542016-10-31 16:07:39 +0000[diff] [blame]63 void printSMRDOffset8(const MCInst *MI, unsigned OpNo,
64 const MCSubtargetInfo &STI, raw_ostream &O);
65 void printSMRDOffset20(const MCInst *MI, unsigned OpNo,
Konstantin Zhuravlyovda4687c2016-09-27 14:42:48 +0000[diff] [blame]66 const MCSubtargetInfo &STI, raw_ostream &O);
67 void printSMRDLiteralOffset(const MCInst *MI, unsigned OpNo,
68 const MCSubtargetInfo &STI, raw_ostream &O);
69 void printGDS(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
70 raw_ostream &O);
71 void printGLC(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
72 raw_ostream &O);
73 void printSLC(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
74 raw_ostream &O);
75 void printTFE(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
76 raw_ostream &O);
77 void printDMask(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
78 raw_ostream &O);
79 void printUNorm(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
80 raw_ostream &O);
81 void printDA(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
82 raw_ostream &O);
83 void printR128(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
84 raw_ostream &O);
Matt Arsenault8a63cb92016-12-05 20:31:49 +0000[diff] [blame]85 void printLWE(const MCInst *MI, unsigned OpNo,
86 const MCSubtargetInfo &STI, raw_ostream &O);
87 void printExpCompr(const MCInst *MI, unsigned OpNo,
88 const MCSubtargetInfo &STI, raw_ostream &O);
89 void printExpVM(const MCInst *MI, unsigned OpNo,
90 const MCSubtargetInfo &STI, raw_ostream &O);
David Stuttard70e8bc12017-06-22 16:29:22 +0000[diff] [blame]91 void printDFMT(const MCInst *MI, unsigned OpNo,
92 const MCSubtargetInfo &STI, raw_ostream &O);
93 void printNFMT(const MCInst *MI, unsigned OpNo,
94 const MCSubtargetInfo &STI, raw_ostream &O);
Matt Arsenault8a63cb92016-12-05 20:31:49 +0000[diff] [blame]95
Matt Arsenaultfcf86c52014-04-15 22:32:42 +0000[diff] [blame]96 void printRegOperand(unsigned RegNo, raw_ostream &O);
Konstantin Zhuravlyovda4687c2016-09-27 14:42:48 +0000[diff] [blame]97 void printVOPDst(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
98 raw_ostream &O);
Matt Arsenault4bd72362016-12-10 00:39:12 +0000[diff] [blame]99 void printImmediate16(uint32_t Imm, const MCSubtargetInfo &STI,
100 raw_ostream &O);
Matt Arsenault9be7b0d2017-02-27 18:49:11 +0000[diff] [blame]101 void printImmediateV216(uint32_t Imm, const MCSubtargetInfo &STI,
102 raw_ostream &O);
Matt Arsenaultc88ba362016-10-29 04:05:06 +0000[diff] [blame]103 void printImmediate32(uint32_t Imm, const MCSubtargetInfo &STI,
104 raw_ostream &O);
105 void printImmediate64(uint64_t Imm, const MCSubtargetInfo &STI,
106 raw_ostream &O);
Konstantin Zhuravlyovda4687c2016-09-27 14:42:48 +0000[diff] [blame]107 void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
108 raw_ostream &O);
109 void printOperandAndFPInputMods(const MCInst *MI, unsigned OpNo,
110 const MCSubtargetInfo &STI, raw_ostream &O);
111 void printOperandAndIntInputMods(const MCInst *MI, unsigned OpNo,
112 const MCSubtargetInfo &STI, raw_ostream &O);
113 void printDPPCtrl(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
114 raw_ostream &O);
115 void printRowMask(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
116 raw_ostream &O);
117 void printBankMask(const MCInst *MI, unsigned OpNo,
118 const MCSubtargetInfo &STI, raw_ostream &O);
119 void printBoundCtrl(const MCInst *MI, unsigned OpNo,
120 const MCSubtargetInfo &STI, raw_ostream &O);
Sam Kolton3025e7f2016-04-26 13:33:56 +0000[diff] [blame]121 void printSDWASel(const MCInst *MI, unsigned OpNo, raw_ostream &O);
Konstantin Zhuravlyovda4687c2016-09-27 14:42:48 +0000[diff] [blame]122 void printSDWADstSel(const MCInst *MI, unsigned OpNo,
123 const MCSubtargetInfo &STI, raw_ostream &O);
124 void printSDWASrc0Sel(const MCInst *MI, unsigned OpNo,
125 const MCSubtargetInfo &STI, raw_ostream &O);
126 void printSDWASrc1Sel(const MCInst *MI, unsigned OpNo,
127 const MCSubtargetInfo &STI, raw_ostream &O);
128 void printSDWADstUnused(const MCInst *MI, unsigned OpNo,
129 const MCSubtargetInfo &STI, raw_ostream &O);
Dmitry Preobrazhenskyabf28392017-07-21 13:54:11 +0000[diff] [blame]130 void printPackedModifier(const MCInst *MI, StringRef Name, unsigned Mod,
131 raw_ostream &O);
Matt Arsenault9be7b0d2017-02-27 18:49:11 +0000[diff] [blame]132 void printOpSel(const MCInst *MI, unsigned OpNo,
133 const MCSubtargetInfo &STI, raw_ostream &O);
134 void printOpSelHi(const MCInst *MI, unsigned OpNo,
135 const MCSubtargetInfo &STI, raw_ostream &O);
136 void printNegLo(const MCInst *MI, unsigned OpNo,
137 const MCSubtargetInfo &STI, raw_ostream &O);
138 void printNegHi(const MCInst *MI, unsigned OpNo,
139 const MCSubtargetInfo &STI, raw_ostream &O);
Konstantin Zhuravlyovda4687c2016-09-27 14:42:48 +0000[diff] [blame]140 void printInterpSlot(const MCInst *MI, unsigned OpNo,
141 const MCSubtargetInfo &STI, raw_ostream &O);
Matt Arsenaultebfba702016-12-14 16:36:12 +0000[diff] [blame]142 void printInterpAttr(const MCInst *MI, unsigned OpNo,
143 const MCSubtargetInfo &STI, raw_ostream &O);
144 void printInterpAttrChan(const MCInst *MI, unsigned OpNo,
145 const MCSubtargetInfo &STI, raw_ostream &O);
146
Matt Arsenaultcc88ce32016-10-12 18:00:51 +0000[diff] [blame]147 void printVGPRIndexMode(const MCInst *MI, unsigned OpNo,
148 const MCSubtargetInfo &STI, raw_ostream &O);
Konstantin Zhuravlyovda4687c2016-09-27 14:42:48 +0000[diff] [blame]149 void printMemOperand(const MCInst *MI, unsigned OpNo,
150 const MCSubtargetInfo &STI, raw_ostream &O);
Matt Arsenault8a63cb92016-12-05 20:31:49 +0000[diff] [blame]151
152
153 template <unsigned N>
154 void printExpSrcN(const MCInst *MI, unsigned OpNo,
155 const MCSubtargetInfo &STI, raw_ostream &O);
156 void printExpSrc0(const MCInst *MI, unsigned OpNo,
157 const MCSubtargetInfo &STI, raw_ostream &O);
158 void printExpSrc1(const MCInst *MI, unsigned OpNo,
159 const MCSubtargetInfo &STI, raw_ostream &O);
160 void printExpSrc2(const MCInst *MI, unsigned OpNo,
161 const MCSubtargetInfo &STI, raw_ostream &O);
162 void printExpSrc3(const MCInst *MI, unsigned OpNo,
163 const MCSubtargetInfo &STI, raw_ostream &O);
164 void printExpTgt(const MCInst *MI, unsigned OpNo,
165 const MCSubtargetInfo &STI, raw_ostream &O);
166
Tom Stellarda096b122017-08-17 22:20:04 +0000[diff] [blame]167public:
Matt Arsenaultf45faaf2014-03-17 22:23:09 +0000[diff] [blame]168 static void printIfSet(const MCInst *MI, unsigned OpNo, raw_ostream &O,
169 StringRef Asm, StringRef Default = "");
Konstantin Zhuravlyovda4687c2016-09-27 14:42:48 +0000[diff] [blame]170 static void printIfSet(const MCInst *MI, unsigned OpNo, raw_ostream &O,
171 char Asm);
Tom Stellarda096b122017-08-17 22:20:04 +0000[diff] [blame]172protected:
Konstantin Zhuravlyovda4687c2016-09-27 14:42:48 +0000[diff] [blame]173 void printAbs(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
174 raw_ostream &O);
Dmitry Preobrazhensky50805a02017-08-07 13:14:12 +0000[diff] [blame]175 void printHigh(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
176 raw_ostream &O);
Konstantin Zhuravlyovda4687c2016-09-27 14:42:48 +0000[diff] [blame]177 void printClamp(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
178 raw_ostream &O);
179 void printClampSI(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
180 raw_ostream &O);
181 void printOModSI(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
182 raw_ostream &O);
183 void printLiteral(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
184 raw_ostream &O);
185 void printLast(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
186 raw_ostream &O);
187 void printNeg(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
188 raw_ostream &O);
189 void printOMOD(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
190 raw_ostream &O);
191 void printRel(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
192 raw_ostream &O);
193 void printUpdateExecMask(const MCInst *MI, unsigned OpNo,
194 const MCSubtargetInfo &STI, raw_ostream &O);
195 void printUpdatePred(const MCInst *MI, unsigned OpNo,
196 const MCSubtargetInfo &STI, raw_ostream &O);
197 void printWrite(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
198 raw_ostream &O);
Konstantin Zhuravlyovda4687c2016-09-27 14:42:48 +0000[diff] [blame]199 void printBankSwizzle(const MCInst *MI, unsigned OpNo,
200 const MCSubtargetInfo &STI, raw_ostream &O);
201 void printRSel(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
202 raw_ostream &O);
203 void printCT(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
204 raw_ostream &O);
205 void printKCache(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
206 raw_ostream &O);
207 void printSendMsg(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
208 raw_ostream &O);
Dmitry Preobrazhensky793c5922017-05-31 16:26:47 +0000[diff] [blame]209 void printSwizzle(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
210 raw_ostream &O);
Konstantin Zhuravlyovda4687c2016-09-27 14:42:48 +0000[diff] [blame]211 void printWaitFlag(const MCInst *MI, unsigned OpNo,
212 const MCSubtargetInfo &STI, raw_ostream &O);
213 void printHwreg(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
214 raw_ostream &O);
Tom Stellard75aadc22012-12-11 21:25:42 +0000[diff] [blame]215};
216
Tom Stellarda096b122017-08-17 22:20:04 +0000[diff] [blame]217// FIXME: R600 specific parts of AMDGPUInstrPrinter should be moved here, and
218// MCTargetDesc should be using R600InstPrinter for the R600 target.
219class R600InstPrinter : public AMDGPUInstPrinter {
220public:
221 R600InstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
222 const MCRegisterInfo &MRI)
223 : AMDGPUInstPrinter(MAI, MII, MRI) {}
224
225 void printAbs(const MCInst *MI, unsigned OpNo, raw_ostream &O);
226 void printBankSwizzle(const MCInst *MI, unsigned OpNo, raw_ostream &O);
227 void printClamp(const MCInst *MI, unsigned OpNo, raw_ostream &O);
228 void printCT(const MCInst *MI, unsigned OpNo, raw_ostream &O);
229 void printKCache(const MCInst *MI, unsigned OpNo, raw_ostream &O);
230 void printLast(const MCInst *MI, unsigned OpNo, raw_ostream &O);
231 void printLiteral(const MCInst *MI, unsigned OpNo, raw_ostream &O);
232 void printMemOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
233 void printNeg(const MCInst *MI, unsigned OpNo, raw_ostream &O);
234 void printOMOD(const MCInst *MI, unsigned OpNo, raw_ostream &O);
235 void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
236 void printRel(const MCInst *MI, unsigned OpNo, raw_ostream &O);
237 void printRSel(const MCInst *MI, unsigned OpNo, raw_ostream &O);
238 void printUpdateExecMask(const MCInst *MI, unsigned OpNo, raw_ostream &O);
239 void printUpdatePred(const MCInst *MI, unsigned OpNo, raw_ostream &O);
240 void printWrite(const MCInst *MI, unsigned OpNo, raw_ostream &O);
241};
242
Tom Stellard75aadc22012-12-11 21:25:42 +0000[diff] [blame]243} // End namespace llvm
244
Benjamin Kramera7c40ef2014-08-13 16:26:38 +0000[diff] [blame]245#endif