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gerrit-public.fairphone.software / toolchain / llvm-project / ebfba7027ea89fbd4e2672d375f65451a7e54cde / . / llvm / lib / Target / AMDGPU / InstPrinter / AMDGPUInstPrinter.h
blob: a6d348ff0f1211d832d665d19c54ba41ce9c97a7 [file] [log] [blame]
Tom Stellard75aadc22012-12-11 21:25:42 +0000[diff] [blame]1//===-- AMDGPUInstPrinter.h - AMDGPU MC Inst -> ASM interface ---*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10/// \file
11//===----------------------------------------------------------------------===//
12
Matt Arsenault6b6a2c32016-03-11 08:00:27 +0000[diff] [blame]13#ifndef LLVM_LIB_TARGET_AMDGPU_INSTPRINTER_AMDGPUINSTPRINTER_H
14#define LLVM_LIB_TARGET_AMDGPU_INSTPRINTER_AMDGPUINSTPRINTER_H
Tom Stellard75aadc22012-12-11 21:25:42 +0000[diff] [blame]15
Tom Stellard75aadc22012-12-11 21:25:42 +0000[diff] [blame]16#include "llvm/MC/MCInstPrinter.h"
Tom Stellard75aadc22012-12-11 21:25:42 +0000[diff] [blame]17
18namespace llvm {
19
20class AMDGPUInstPrinter : public MCInstPrinter {
21public:
22 AMDGPUInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
23 const MCRegisterInfo &MRI)
24 : MCInstPrinter(MAI, MII, MRI) {}
25
26 //Autogenerated by tblgen
Konstantin Zhuravlyovda4687c2016-09-27 14:42:48 +0000[diff] [blame]27 void printInstruction(const MCInst *MI, const MCSubtargetInfo &STI,
28 raw_ostream &O);
Tom Stellard75aadc22012-12-11 21:25:42 +0000[diff] [blame]29 static const char *getRegisterName(unsigned RegNo);
30
Akira Hatanakab46d0232015-03-27 20:36:02 +0000[diff] [blame]31 void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot,
32 const MCSubtargetInfo &STI) override;
Tom Stellardd7e6f132015-04-08 01:09:26 +0000[diff] [blame]33 static void printRegOperand(unsigned RegNo, raw_ostream &O,
34 const MCRegisterInfo &MRI);
Tom Stellard75aadc22012-12-11 21:25:42 +0000[diff] [blame]35
36private:
Matt Arsenaultcc88ce32016-10-12 18:00:51 +0000[diff] [blame]37 void printU4ImmOperand(const MCInst *MI, unsigned OpNo,
38 const MCSubtargetInfo &STI, raw_ostream &O);
Matt Arsenault4d7d3832014-04-15 22:32:49 +0000[diff] [blame]39 void printU8ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
Konstantin Zhuravlyovda4687c2016-09-27 14:42:48 +0000[diff] [blame]40 void printU16ImmOperand(const MCInst *MI, unsigned OpNo,
41 const MCSubtargetInfo &STI, raw_ostream &O);
Sam Koltondfa29f72016-03-09 12:29:31 +0000[diff] [blame]42 void printU4ImmDecOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
Matt Arsenault61cc9082014-10-10 22:16:07 +0000[diff] [blame]43 void printU8ImmDecOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
44 void printU16ImmDecOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
Konstantin Zhuravlyovda4687c2016-09-27 14:42:48 +0000[diff] [blame]45 void printU32ImmOperand(const MCInst *MI, unsigned OpNo,
46 const MCSubtargetInfo &STI, raw_ostream &O);
47 void printNamedBit(const MCInst *MI, unsigned OpNo, raw_ostream &O,
Matt Arsenaulte8dbf792016-07-05 22:06:56 +0000[diff] [blame]48 StringRef BitName);
Tom Stellard229d5e62014-08-05 14:48:12 +0000[diff] [blame]49 void printOffen(const MCInst *MI, unsigned OpNo, raw_ostream &O);
50 void printIdxen(const MCInst *MI, unsigned OpNo, raw_ostream &O);
51 void printAddr64(const MCInst *MI, unsigned OpNo, raw_ostream &O);
52 void printMBUFOffset(const MCInst *MI, unsigned OpNo, raw_ostream &O);
Konstantin Zhuravlyovda4687c2016-09-27 14:42:48 +0000[diff] [blame]53 void printOffset(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
54 raw_ostream &O);
55 void printOffset0(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
56 raw_ostream &O);
57 void printOffset1(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
58 raw_ostream &O);
Artem Tamazov54bfd542016-10-31 16:07:39 +0000[diff] [blame]59 void printSMRDOffset8(const MCInst *MI, unsigned OpNo,
60 const MCSubtargetInfo &STI, raw_ostream &O);
61 void printSMRDOffset20(const MCInst *MI, unsigned OpNo,
Konstantin Zhuravlyovda4687c2016-09-27 14:42:48 +0000[diff] [blame]62 const MCSubtargetInfo &STI, raw_ostream &O);
63 void printSMRDLiteralOffset(const MCInst *MI, unsigned OpNo,
64 const MCSubtargetInfo &STI, raw_ostream &O);
65 void printGDS(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
66 raw_ostream &O);
67 void printGLC(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
68 raw_ostream &O);
69 void printSLC(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
70 raw_ostream &O);
71 void printTFE(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
72 raw_ostream &O);
73 void printDMask(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
74 raw_ostream &O);
75 void printUNorm(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
76 raw_ostream &O);
77 void printDA(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
78 raw_ostream &O);
79 void printR128(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
80 raw_ostream &O);
Matt Arsenault8a63cb92016-12-05 20:31:49 +0000[diff] [blame]81 void printLWE(const MCInst *MI, unsigned OpNo,
82 const MCSubtargetInfo &STI, raw_ostream &O);
83 void printExpCompr(const MCInst *MI, unsigned OpNo,
84 const MCSubtargetInfo &STI, raw_ostream &O);
85 void printExpVM(const MCInst *MI, unsigned OpNo,
86 const MCSubtargetInfo &STI, raw_ostream &O);
87
Matt Arsenaultfcf86c52014-04-15 22:32:42 +0000[diff] [blame]88 void printRegOperand(unsigned RegNo, raw_ostream &O);
Konstantin Zhuravlyovda4687c2016-09-27 14:42:48 +0000[diff] [blame]89 void printVOPDst(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
90 raw_ostream &O);
Matt Arsenault4bd72362016-12-10 00:39:12 +0000[diff] [blame]91 void printImmediate16(uint32_t Imm, const MCSubtargetInfo &STI,
92 raw_ostream &O);
Matt Arsenaultc88ba362016-10-29 04:05:06 +0000[diff] [blame]93 void printImmediate32(uint32_t Imm, const MCSubtargetInfo &STI,
94 raw_ostream &O);
95 void printImmediate64(uint64_t Imm, const MCSubtargetInfo &STI,
96 raw_ostream &O);
Konstantin Zhuravlyovda4687c2016-09-27 14:42:48 +0000[diff] [blame]97 void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
98 raw_ostream &O);
99 void printOperandAndFPInputMods(const MCInst *MI, unsigned OpNo,
100 const MCSubtargetInfo &STI, raw_ostream &O);
101 void printOperandAndIntInputMods(const MCInst *MI, unsigned OpNo,
102 const MCSubtargetInfo &STI, raw_ostream &O);
103 void printDPPCtrl(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
104 raw_ostream &O);
105 void printRowMask(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
106 raw_ostream &O);
107 void printBankMask(const MCInst *MI, unsigned OpNo,
108 const MCSubtargetInfo &STI, raw_ostream &O);
109 void printBoundCtrl(const MCInst *MI, unsigned OpNo,
110 const MCSubtargetInfo &STI, raw_ostream &O);
Sam Kolton3025e7f2016-04-26 13:33:56 +0000[diff] [blame]111 void printSDWASel(const MCInst *MI, unsigned OpNo, raw_ostream &O);
Konstantin Zhuravlyovda4687c2016-09-27 14:42:48 +0000[diff] [blame]112 void printSDWADstSel(const MCInst *MI, unsigned OpNo,
113 const MCSubtargetInfo &STI, raw_ostream &O);
114 void printSDWASrc0Sel(const MCInst *MI, unsigned OpNo,
115 const MCSubtargetInfo &STI, raw_ostream &O);
116 void printSDWASrc1Sel(const MCInst *MI, unsigned OpNo,
117 const MCSubtargetInfo &STI, raw_ostream &O);
118 void printSDWADstUnused(const MCInst *MI, unsigned OpNo,
119 const MCSubtargetInfo &STI, raw_ostream &O);
120 void printInterpSlot(const MCInst *MI, unsigned OpNo,
121 const MCSubtargetInfo &STI, raw_ostream &O);
Matt Arsenaultebfba702016-12-14 16:36:12 +0000[diff] [blame^]122 void printInterpAttr(const MCInst *MI, unsigned OpNo,
123 const MCSubtargetInfo &STI, raw_ostream &O);
124 void printInterpAttrChan(const MCInst *MI, unsigned OpNo,
125 const MCSubtargetInfo &STI, raw_ostream &O);
126
Matt Arsenaultcc88ce32016-10-12 18:00:51 +0000[diff] [blame]127 void printVGPRIndexMode(const MCInst *MI, unsigned OpNo,
128 const MCSubtargetInfo &STI, raw_ostream &O);
Konstantin Zhuravlyovda4687c2016-09-27 14:42:48 +0000[diff] [blame]129 void printMemOperand(const MCInst *MI, unsigned OpNo,
130 const MCSubtargetInfo &STI, raw_ostream &O);
Matt Arsenault8a63cb92016-12-05 20:31:49 +0000[diff] [blame]131
132
133 template <unsigned N>
134 void printExpSrcN(const MCInst *MI, unsigned OpNo,
135 const MCSubtargetInfo &STI, raw_ostream &O);
136 void printExpSrc0(const MCInst *MI, unsigned OpNo,
137 const MCSubtargetInfo &STI, raw_ostream &O);
138 void printExpSrc1(const MCInst *MI, unsigned OpNo,
139 const MCSubtargetInfo &STI, raw_ostream &O);
140 void printExpSrc2(const MCInst *MI, unsigned OpNo,
141 const MCSubtargetInfo &STI, raw_ostream &O);
142 void printExpSrc3(const MCInst *MI, unsigned OpNo,
143 const MCSubtargetInfo &STI, raw_ostream &O);
144 void printExpTgt(const MCInst *MI, unsigned OpNo,
145 const MCSubtargetInfo &STI, raw_ostream &O);
146
Matt Arsenaultf45faaf2014-03-17 22:23:09 +0000[diff] [blame]147 static void printIfSet(const MCInst *MI, unsigned OpNo, raw_ostream &O,
148 StringRef Asm, StringRef Default = "");
Konstantin Zhuravlyovda4687c2016-09-27 14:42:48 +0000[diff] [blame]149 static void printIfSet(const MCInst *MI, unsigned OpNo, raw_ostream &O,
150 char Asm);
151 void printAbs(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
152 raw_ostream &O);
153 void printClamp(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
154 raw_ostream &O);
155 void printClampSI(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
156 raw_ostream &O);
157 void printOModSI(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
158 raw_ostream &O);
159 void printLiteral(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
160 raw_ostream &O);
161 void printLast(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
162 raw_ostream &O);
163 void printNeg(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
164 raw_ostream &O);
165 void printOMOD(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
166 raw_ostream &O);
167 void printRel(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
168 raw_ostream &O);
169 void printUpdateExecMask(const MCInst *MI, unsigned OpNo,
170 const MCSubtargetInfo &STI, raw_ostream &O);
171 void printUpdatePred(const MCInst *MI, unsigned OpNo,
172 const MCSubtargetInfo &STI, raw_ostream &O);
173 void printWrite(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
174 raw_ostream &O);
175 void printSel(const MCInst *MI, unsigned OpNo, raw_ostream &O);
176 void printBankSwizzle(const MCInst *MI, unsigned OpNo,
177 const MCSubtargetInfo &STI, raw_ostream &O);
178 void printRSel(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
179 raw_ostream &O);
180 void printCT(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
181 raw_ostream &O);
182 void printKCache(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
183 raw_ostream &O);
184 void printSendMsg(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
185 raw_ostream &O);
186 void printWaitFlag(const MCInst *MI, unsigned OpNo,
187 const MCSubtargetInfo &STI, raw_ostream &O);
188 void printHwreg(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
189 raw_ostream &O);
Tom Stellard75aadc22012-12-11 21:25:42 +0000[diff] [blame]190};
191
192} // End namespace llvm
193
Benjamin Kramera7c40ef2014-08-13 16:26:38 +0000[diff] [blame]194#endif