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Tom Stellard8b1e0212013-07-27 00:01:07 +00001//===-- AMDGPUTargetTransformInfo.cpp - AMDGPU specific TTI pass ---------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// \file
11// This file implements a TargetTransformInfo analysis pass specific to the
12// AMDGPU target machine. It uses the target's detailed information to provide
13// more precise answers to certain TTI queries, while letting the target
14// independent and default TTI implementations handle the rest.
15//
16//===----------------------------------------------------------------------===//
17
Chandler Carruth93dcdc42015-01-31 11:17:59 +000018#include "AMDGPUTargetTransformInfo.h"
Tom Stellard8cce9bd2014-01-23 18:49:28 +000019#include "llvm/Analysis/LoopInfo.h"
Tom Stellard8b1e0212013-07-27 00:01:07 +000020#include "llvm/Analysis/TargetTransformInfo.h"
Tom Stellard8cce9bd2014-01-23 18:49:28 +000021#include "llvm/Analysis/ValueTracking.h"
Chandler Carruth705b1852015-01-31 03:43:40 +000022#include "llvm/CodeGen/BasicTTIImpl.h"
Mehdi Aminia28d91d2015-03-10 02:37:25 +000023#include "llvm/IR/Module.h"
Tom Stellard8b1e0212013-07-27 00:01:07 +000024#include "llvm/Support/Debug.h"
Tom Stellard8b1e0212013-07-27 00:01:07 +000025#include "llvm/Target/CostTable.h"
Chandler Carruth8a8cd2b2014-01-07 11:48:04 +000026#include "llvm/Target/TargetLowering.h"
Tom Stellard8b1e0212013-07-27 00:01:07 +000027using namespace llvm;
28
Chandler Carruth84e68b22014-04-22 02:41:26 +000029#define DEBUG_TYPE "AMDGPUtti"
30
Chandler Carruthab5cb362015-02-01 14:31:23 +000031void AMDGPUTTIImpl::getUnrollingPreferences(Loop *L,
Chandler Carruth705b1852015-01-31 03:43:40 +000032 TTI::UnrollingPreferences &UP) {
Matt Arsenaultc8244582014-07-25 23:02:42 +000033 UP.Threshold = 300; // Twice the default.
Tom Stellardeea3f702015-02-05 15:32:18 +000034 UP.MaxCount = UINT_MAX;
Matt Arsenaultc8244582014-07-25 23:02:42 +000035 UP.Partial = true;
36
37 // TODO: Do we want runtime unrolling?
38
Matt Arsenaultac6e39c2014-07-17 06:19:06 +000039 for (const BasicBlock *BB : L->getBlocks()) {
Mehdi Aminia28d91d2015-03-10 02:37:25 +000040 const DataLayout &DL = BB->getModule()->getDataLayout();
Matt Arsenaultac6e39c2014-07-17 06:19:06 +000041 for (const Instruction &I : *BB) {
42 const GetElementPtrInst *GEP = dyn_cast<GetElementPtrInst>(&I);
Matt Arsenault5e2b0f52014-07-17 06:13:41 +000043 if (!GEP || GEP->getAddressSpace() != AMDGPUAS::PRIVATE_ADDRESS)
Tom Stellard8cce9bd2014-01-23 18:49:28 +000044 continue;
Matt Arsenaultac6e39c2014-07-17 06:19:06 +000045
Tom Stellard8cce9bd2014-01-23 18:49:28 +000046 const Value *Ptr = GEP->getPointerOperand();
Mehdi Aminia28d91d2015-03-10 02:37:25 +000047 const AllocaInst *Alloca =
48 dyn_cast<AllocaInst>(GetUnderlyingObject(Ptr, DL));
Tom Stellard8cce9bd2014-01-23 18:49:28 +000049 if (Alloca) {
50 // We want to do whatever we can to limit the number of alloca
51 // instructions that make it through to the code generator. allocas
52 // require us to use indirect addressing, which is slow and prone to
53 // compiler bugs. If this loop does an address calculation on an
Tom Stellardfd0d86c2014-02-25 21:36:21 +000054 // alloca ptr, then we want to use a higher than normal loop unroll
Matt Arsenault5e1e4312014-04-04 20:13:08 +000055 // threshold. This will give SROA a better chance to eliminate these
56 // allocas.
57 //
58 // Don't use the maximum allowed value here as it will make some
59 // programs way too big.
Matt Arsenaultc8244582014-07-25 23:02:42 +000060 UP.Threshold = 800;
Tom Stellard8cce9bd2014-01-23 18:49:28 +000061 }
62 }
63 }
64}
Matt Arsenault3dd43fc2014-07-18 06:07:13 +000065
Chandler Carruth705b1852015-01-31 03:43:40 +000066unsigned AMDGPUTTIImpl::getNumberOfRegisters(bool Vec) {
Matt Arsenaulta93441f2014-07-19 18:15:16 +000067 if (Vec)
68 return 0;
69
70 // Number of VGPRs on SI.
71 if (ST->getGeneration() >= AMDGPUSubtarget::SOUTHERN_ISLANDS)
72 return 256;
73
74 return 4 * 128; // XXX - 4 channels. Should these count as vector instead?
75}
76
Chandler Carruth705b1852015-01-31 03:43:40 +000077unsigned AMDGPUTTIImpl::getRegisterBitWidth(bool) { return 32; }
Matt Arsenaulta93441f2014-07-19 18:15:16 +000078
Wei Mi062c7442015-05-06 17:12:25 +000079unsigned AMDGPUTTIImpl::getMaxInterleaveFactor(unsigned VF) {
Matt Arsenaulta93441f2014-07-19 18:15:16 +000080 // Semi-arbitrary large amount.
81 return 64;
82}