Chandler Carruth | 93dcdc4 | 2015-01-31 11:17:59 +0000 | [diff] [blame] | 1 | //===-- AMDGPUTargetTransformInfo.h - AMDGPU specific TTI -------*- C++ -*-===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | /// \file |
| 10 | /// This file a TargetTransformInfo::Concept conforming object specific to the |
| 11 | /// AMDGPU target machine. It uses the target's detailed information to |
| 12 | /// provide more precise answers to certain TTI queries, while letting the |
| 13 | /// target independent and default TTI implementations handle the rest. |
| 14 | /// |
| 15 | //===----------------------------------------------------------------------===// |
| 16 | |
| 17 | #ifndef LLVM_LIB_TARGET_R600_AMDGPUTARGETTRANSFORMINFO_H |
| 18 | #define LLVM_LIB_TARGET_R600_AMDGPUTARGETTRANSFORMINFO_H |
| 19 | |
| 20 | #include "AMDGPU.h" |
| 21 | #include "AMDGPUTargetMachine.h" |
| 22 | #include "llvm/Analysis/TargetTransformInfo.h" |
| 23 | #include "llvm/CodeGen/BasicTTIImpl.h" |
| 24 | #include "llvm/Target/TargetLowering.h" |
| 25 | |
| 26 | namespace llvm { |
| 27 | |
| 28 | class AMDGPUTTIImpl : public BasicTTIImplBase<AMDGPUTTIImpl> { |
| 29 | typedef BasicTTIImplBase<AMDGPUTTIImpl> BaseT; |
| 30 | typedef TargetTransformInfo TTI; |
| 31 | |
| 32 | const AMDGPUSubtarget *ST; |
| 33 | |
| 34 | public: |
| 35 | explicit AMDGPUTTIImpl(const AMDGPUTargetMachine *TM = nullptr) |
| 36 | : BaseT(TM), ST(TM->getSubtargetImpl()) {} |
| 37 | |
| 38 | // Provide value semantics. MSVC requires that we spell all of these out. |
| 39 | AMDGPUTTIImpl(const AMDGPUTTIImpl &Arg) |
| 40 | : BaseT(static_cast<const BaseT &>(Arg)), ST(Arg.ST) {} |
| 41 | AMDGPUTTIImpl(AMDGPUTTIImpl &&Arg) |
| 42 | : BaseT(std::move(static_cast<BaseT &>(Arg))), ST(std::move(Arg.ST)) {} |
| 43 | AMDGPUTTIImpl &operator=(const AMDGPUTTIImpl &RHS) { |
| 44 | BaseT::operator=(static_cast<const BaseT &>(RHS)); |
| 45 | ST = RHS.ST; |
| 46 | return *this; |
| 47 | } |
| 48 | AMDGPUTTIImpl &operator=(AMDGPUTTIImpl &&RHS) { |
| 49 | BaseT::operator=(std::move(static_cast<BaseT &>(RHS))); |
| 50 | ST = std::move(RHS.ST); |
| 51 | return *this; |
| 52 | } |
| 53 | |
| 54 | bool hasBranchDivergence() { return true; } |
| 55 | |
| 56 | void getUnrollingPreferences(const Function *F, Loop *L, |
| 57 | TTI::UnrollingPreferences &UP); |
| 58 | |
| 59 | TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth) { |
| 60 | assert(isPowerOf2_32(TyWidth) && "Ty width must be power of 2"); |
| 61 | return ST->hasBCNT(TyWidth) ? TTI::PSK_FastHardware : TTI::PSK_Software; |
| 62 | } |
| 63 | |
| 64 | unsigned getNumberOfRegisters(bool Vector); |
| 65 | unsigned getRegisterBitWidth(bool Vector); |
| 66 | unsigned getMaxInterleaveFactor(); |
| 67 | }; |
| 68 | |
| 69 | } // end namespace llvm |
| 70 | |
| 71 | #endif |