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gerrit-public.fairphone.software / toolchain / llvm-project / ee97475b2e01f4ec9b3a78d4f6ee502f0dab7da1 / . / llvm / lib / Target / ARM / InstPrinter / ARMInstPrinter.h
blob: 11214e49fc7aed4468b4ddf0d1f343ee23626590 [file] [log] [blame]
Jia Liub22310f2012-02-18 12:03:15 +0000[diff] [blame]1//===- ARMInstPrinter.h - Convert ARM MCInst to assembly syntax -*- C++ -*-===//
Chris Lattnera2907782009-10-19 19:56:26 +0000[diff] [blame]2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This class prints an ARM MCInst to a .s file.
11//
12//===----------------------------------------------------------------------===//
13
Benjamin Kramera7c40ef2014-08-13 16:26:38 +0000[diff] [blame]14#ifndef LLVM_LIB_TARGET_ARM_INSTPRINTER_ARMINSTPRINTER_H
15#define LLVM_LIB_TARGET_ARM_INSTPRINTER_ARMINSTPRINTER_H
Chris Lattnera2907782009-10-19 19:56:26 +0000[diff] [blame]16
17#include "llvm/MC/MCInstPrinter.h"
James Molloy4c493e82011-09-07 17:24:38 +0000[diff] [blame]18#include "llvm/MC/MCSubtargetInfo.h"
Chris Lattnera2907782009-10-19 19:56:26 +0000[diff] [blame]19
20namespace llvm {
Bill Wendling00f0cdd2011-03-21 04:13:46 +0000[diff] [blame]21
22class MCOperand;
Jim Grosbach4e51d0b2010-09-17 21:25:10 +0000[diff] [blame]23
Chris Lattnera2907782009-10-19 19:56:26 +0000[diff] [blame]24class ARMInstPrinter : public MCInstPrinter {
25public:
Craig Topper54bfde72012-04-02 06:09:36 +0000[diff] [blame]26 ARMInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
27 const MCRegisterInfo &MRI, const MCSubtargetInfo &STI);
Chris Lattnera2907782009-10-19 19:56:26 +0000[diff] [blame]28
Akira Hatanakab46d0232015-03-27 20:36:02 +0000[diff] [blame]29 void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot,
30 const MCSubtargetInfo &STI) override;
Craig Topper6bc27bf2014-03-10 02:09:33 +0000[diff] [blame]31 void printRegName(raw_ostream &OS, unsigned RegNo) const override;
Chris Lattnerf20f7982010-10-28 21:37:33 +0000[diff] [blame]32
Chris Lattnera2907782009-10-19 19:56:26 +0000[diff] [blame]33 // Autogenerated by tblgen.
Akira Hatanakaee974752015-03-27 23:41:42 +0000[diff] [blame^]34 void printInstruction(const MCInst *MI, const MCSubtargetInfo &STI,
35 raw_ostream &O);
Chris Lattnera2907782009-10-19 19:56:26 +0000[diff] [blame]36 static const char *getRegisterName(unsigned RegNo);
37
Akira Hatanakaee974752015-03-27 23:41:42 +0000[diff] [blame^]38 void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
39 raw_ostream &O);
Jim Grosbach4e51d0b2010-09-17 21:25:10 +0000[diff] [blame]40
Akira Hatanakaee974752015-03-27 23:41:42 +0000[diff] [blame^]41 void printSORegRegOperand(const MCInst *MI, unsigned OpNum,
42 const MCSubtargetInfo &STI, raw_ostream &O);
43 void printSORegImmOperand(const MCInst *MI, unsigned OpNum,
44 const MCSubtargetInfo &STI, raw_ostream &O);
Bruno Cardoso Lopesab830502011-03-31 23:26:08 +0000[diff] [blame]45
Akira Hatanakaee974752015-03-27 23:41:42 +0000[diff] [blame^]46 void printAddrModeTBB(const MCInst *MI, unsigned OpNum,
47 const MCSubtargetInfo &STI, raw_ostream &O);
48 void printAddrModeTBH(const MCInst *MI, unsigned OpNum,
49 const MCSubtargetInfo &STI, raw_ostream &O);
50 void printAddrMode2Operand(const MCInst *MI, unsigned OpNum,
51 const MCSubtargetInfo &STI, raw_ostream &O);
52 void printAM2PostIndexOp(const MCInst *MI, unsigned OpNum,
53 const MCSubtargetInfo &STI, raw_ostream &O);
Bruno Cardoso Lopesab830502011-03-31 23:26:08 +0000[diff] [blame]54 void printAM2PreOrOffsetIndexOp(const MCInst *MI, unsigned OpNum,
Akira Hatanakaee974752015-03-27 23:41:42 +0000[diff] [blame^]55 const MCSubtargetInfo &STI, raw_ostream &O);
Chris Lattner76c564b2010-04-04 04:47:45 +0000[diff] [blame]56 void printAddrMode2OffsetOperand(const MCInst *MI, unsigned OpNum,
Akira Hatanakaee974752015-03-27 23:41:42 +0000[diff] [blame^]57 const MCSubtargetInfo &STI, raw_ostream &O);
Quentin Colombetc3132202013-04-12 18:47:25 +0000[diff] [blame]58 template <bool AlwaysPrintImm0>
Akira Hatanakaee974752015-03-27 23:41:42 +0000[diff] [blame^]59 void printAddrMode3Operand(const MCInst *MI, unsigned OpNum,
60 const MCSubtargetInfo &STI, raw_ostream &O);
Chris Lattner76c564b2010-04-04 04:47:45 +0000[diff] [blame]61 void printAddrMode3OffsetOperand(const MCInst *MI, unsigned OpNum,
Akira Hatanakaee974752015-03-27 23:41:42 +0000[diff] [blame^]62 const MCSubtargetInfo &STI, raw_ostream &O);
Quentin Colombetc3132202013-04-12 18:47:25 +0000[diff] [blame]63 void printAM3PreOrOffsetIndexOp(const MCInst *MI, unsigned Op, raw_ostream &O,
64 bool AlwaysPrintImm0);
Jim Grosbachd3595712011-08-03 23:50:40 +0000[diff] [blame]65 void printPostIdxImm8Operand(const MCInst *MI, unsigned OpNum,
Akira Hatanakaee974752015-03-27 23:41:42 +0000[diff] [blame^]66 const MCSubtargetInfo &STI, raw_ostream &O);
67 void printPostIdxRegOperand(const MCInst *MI, unsigned OpNum,
68 const MCSubtargetInfo &STI, raw_ostream &O);
Owen Andersonce519032011-08-04 18:24:14 +0000[diff] [blame]69 void printPostIdxImm8s4Operand(const MCInst *MI, unsigned OpNum,
Akira Hatanakaee974752015-03-27 23:41:42 +0000[diff] [blame^]70 const MCSubtargetInfo &STI, raw_ostream &O);
Bruno Cardoso Lopesbda36322011-04-04 17:18:19 +0000[diff] [blame]71
Akira Hatanakaee974752015-03-27 23:41:42 +0000[diff] [blame^]72 void printLdStmModeOperand(const MCInst *MI, unsigned OpNum,
73 const MCSubtargetInfo &STI, raw_ostream &O);
Quentin Colombetc3132202013-04-12 18:47:25 +0000[diff] [blame]74 template <bool AlwaysPrintImm0>
Akira Hatanakaee974752015-03-27 23:41:42 +0000[diff] [blame^]75 void printAddrMode5Operand(const MCInst *MI, unsigned OpNum,
76 const MCSubtargetInfo &STI, raw_ostream &O);
77 void printAddrMode6Operand(const MCInst *MI, unsigned OpNum,
78 const MCSubtargetInfo &STI, raw_ostream &O);
79 void printAddrMode7Operand(const MCInst *MI, unsigned OpNum,
80 const MCSubtargetInfo &STI, raw_ostream &O);
Chris Lattner76c564b2010-04-04 04:47:45 +0000[diff] [blame]81 void printAddrMode6OffsetOperand(const MCInst *MI, unsigned OpNum,
Akira Hatanakaee974752015-03-27 23:41:42 +0000[diff] [blame^]82 const MCSubtargetInfo &STI, raw_ostream &O);
Johnny Chen9a3e2392010-03-10 18:59:38 +0000[diff] [blame]83
Chris Lattner76c564b2010-04-04 04:47:45 +0000[diff] [blame]84 void printBitfieldInvMaskImmOperand(const MCInst *MI, unsigned OpNum,
Akira Hatanakaee974752015-03-27 23:41:42 +0000[diff] [blame^]85 const MCSubtargetInfo &STI,
Chris Lattner76c564b2010-04-04 04:47:45 +0000[diff] [blame]86 raw_ostream &O);
Akira Hatanakaee974752015-03-27 23:41:42 +0000[diff] [blame^]87 void printMemBOption(const MCInst *MI, unsigned OpNum,
88 const MCSubtargetInfo &STI, raw_ostream &O);
89 void printInstSyncBOption(const MCInst *MI, unsigned OpNum,
90 const MCSubtargetInfo &STI, raw_ostream &O);
91 void printShiftImmOperand(const MCInst *MI, unsigned OpNum,
92 const MCSubtargetInfo &STI, raw_ostream &O);
93 void printPKHLSLShiftImm(const MCInst *MI, unsigned OpNum,
94 const MCSubtargetInfo &STI, raw_ostream &O);
95 void printPKHASRShiftImm(const MCInst *MI, unsigned OpNum,
96 const MCSubtargetInfo &STI, raw_ostream &O);
Evan Chengb1852592009-11-19 06:57:41 +0000[diff] [blame]97
Mihai Popad36cbaa2013-07-03 09:21:44 +0000[diff] [blame]98 template <unsigned scale>
Akira Hatanakaee974752015-03-27 23:41:42 +0000[diff] [blame^]99 void printAdrLabelOperand(const MCInst *MI, unsigned OpNum,
100 const MCSubtargetInfo &STI, raw_ostream &O);
101 void printThumbS4ImmOperand(const MCInst *MI, unsigned OpNum,
102 const MCSubtargetInfo &STI, raw_ostream &O);
103 void printThumbSRImm(const MCInst *MI, unsigned OpNum,
104 const MCSubtargetInfo &STI, raw_ostream &O);
105 void printThumbITMask(const MCInst *MI, unsigned OpNum,
106 const MCSubtargetInfo &STI, raw_ostream &O);
Chris Lattner76c564b2010-04-04 04:47:45 +0000[diff] [blame]107 void printThumbAddrModeRROperand(const MCInst *MI, unsigned OpNum,
Akira Hatanakaee974752015-03-27 23:41:42 +0000[diff] [blame^]108 const MCSubtargetInfo &STI, raw_ostream &O);
Bill Wendling092a7bd2010-12-14 03:36:38 +0000[diff] [blame]109 void printThumbAddrModeImm5SOperand(const MCInst *MI, unsigned OpNum,
Akira Hatanakaee974752015-03-27 23:41:42 +0000[diff] [blame^]110 const MCSubtargetInfo &STI,
Bill Wendling092a7bd2010-12-14 03:36:38 +0000[diff] [blame]111 raw_ostream &O, unsigned Scale);
112 void printThumbAddrModeImm5S1Operand(const MCInst *MI, unsigned OpNum,
Akira Hatanakaee974752015-03-27 23:41:42 +0000[diff] [blame^]113 const MCSubtargetInfo &STI,
Bill Wendling092a7bd2010-12-14 03:36:38 +0000[diff] [blame]114 raw_ostream &O);
115 void printThumbAddrModeImm5S2Operand(const MCInst *MI, unsigned OpNum,
Akira Hatanakaee974752015-03-27 23:41:42 +0000[diff] [blame^]116 const MCSubtargetInfo &STI,
Bill Wendling092a7bd2010-12-14 03:36:38 +0000[diff] [blame]117 raw_ostream &O);
118 void printThumbAddrModeImm5S4Operand(const MCInst *MI, unsigned OpNum,
Akira Hatanakaee974752015-03-27 23:41:42 +0000[diff] [blame^]119 const MCSubtargetInfo &STI,
Bill Wendling092a7bd2010-12-14 03:36:38 +0000[diff] [blame]120 raw_ostream &O);
Chris Lattner76c564b2010-04-04 04:47:45 +0000[diff] [blame]121 void printThumbAddrModeSPOperand(const MCInst *MI, unsigned OpNum,
Akira Hatanakaee974752015-03-27 23:41:42 +0000[diff] [blame^]122 const MCSubtargetInfo &STI, raw_ostream &O);
Jim Grosbach4e51d0b2010-09-17 21:25:10 +0000[diff] [blame]123
Akira Hatanakaee974752015-03-27 23:41:42 +0000[diff] [blame^]124 void printT2SOOperand(const MCInst *MI, unsigned OpNum,
125 const MCSubtargetInfo &STI, raw_ostream &O);
Akira Hatanakacfa1f612015-03-27 23:24:22 +0000[diff] [blame]126 template <bool AlwaysPrintImm0>
Jim Grosbache6fe1a02010-10-25 20:00:01 +0000[diff] [blame]127 void printAddrModeImm12Operand(const MCInst *MI, unsigned OpNum,
Akira Hatanakaee974752015-03-27 23:41:42 +0000[diff] [blame^]128 const MCSubtargetInfo &STI, raw_ostream &O);
Akira Hatanakacfa1f612015-03-27 23:24:22 +0000[diff] [blame]129 template <bool AlwaysPrintImm0>
Chris Lattner76c564b2010-04-04 04:47:45 +0000[diff] [blame]130 void printT2AddrModeImm8Operand(const MCInst *MI, unsigned OpNum,
Akira Hatanakaee974752015-03-27 23:41:42 +0000[diff] [blame^]131 const MCSubtargetInfo &STI, raw_ostream &O);
Akira Hatanakacfa1f612015-03-27 23:24:22 +0000[diff] [blame]132 template <bool AlwaysPrintImm0>
Chris Lattner76c564b2010-04-04 04:47:45 +0000[diff] [blame]133 void printT2AddrModeImm8s4Operand(const MCInst *MI, unsigned OpNum,
Akira Hatanakaee974752015-03-27 23:41:42 +0000[diff] [blame^]134 const MCSubtargetInfo &STI, raw_ostream &O);
Jim Grosbacha05627e2011-09-09 18:37:27 +0000[diff] [blame]135 void printT2AddrModeImm0_1020s4Operand(const MCInst *MI, unsigned OpNum,
Akira Hatanakaee974752015-03-27 23:41:42 +0000[diff] [blame^]136 const MCSubtargetInfo &STI,
Akira Hatanakacfa1f612015-03-27 23:24:22 +0000[diff] [blame]137 raw_ostream &O);
Chris Lattner76c564b2010-04-04 04:47:45 +0000[diff] [blame]138 void printT2AddrModeImm8OffsetOperand(const MCInst *MI, unsigned OpNum,
Akira Hatanakaee974752015-03-27 23:41:42 +0000[diff] [blame^]139 const MCSubtargetInfo &STI,
Chris Lattner76c564b2010-04-04 04:47:45 +0000[diff] [blame]140 raw_ostream &O);
141 void printT2AddrModeImm8s4OffsetOperand(const MCInst *MI, unsigned OpNum,
Akira Hatanakaee974752015-03-27 23:41:42 +0000[diff] [blame^]142 const MCSubtargetInfo &STI,
Chris Lattner76c564b2010-04-04 04:47:45 +0000[diff] [blame]143 raw_ostream &O);
144 void printT2AddrModeSoRegOperand(const MCInst *MI, unsigned OpNum,
Akira Hatanakaee974752015-03-27 23:41:42 +0000[diff] [blame^]145 const MCSubtargetInfo &STI, raw_ostream &O);
Jim Grosbach4e51d0b2010-09-17 21:25:10 +0000[diff] [blame]146
Akira Hatanakaee974752015-03-27 23:41:42 +0000[diff] [blame^]147 void printSetendOperand(const MCInst *MI, unsigned OpNum,
148 const MCSubtargetInfo &STI, raw_ostream &O);
149 void printCPSIMod(const MCInst *MI, unsigned OpNum,
150 const MCSubtargetInfo &STI, raw_ostream &O);
151 void printCPSIFlag(const MCInst *MI, unsigned OpNum,
152 const MCSubtargetInfo &STI, raw_ostream &O);
153 void printMSRMaskOperand(const MCInst *MI, unsigned OpNum,
154 const MCSubtargetInfo &STI, raw_ostream &O);
155 void printBankedRegOperand(const MCInst *MI, unsigned OpNum,
156 const MCSubtargetInfo &STI, raw_ostream &O);
157 void printPredicateOperand(const MCInst *MI, unsigned OpNum,
158 const MCSubtargetInfo &STI, raw_ostream &O);
Chris Lattner76c564b2010-04-04 04:47:45 +0000[diff] [blame]159 void printMandatoryPredicateOperand(const MCInst *MI, unsigned OpNum,
Akira Hatanakaee974752015-03-27 23:41:42 +0000[diff] [blame^]160 const MCSubtargetInfo &STI,
Chris Lattner76c564b2010-04-04 04:47:45 +0000[diff] [blame]161 raw_ostream &O);
162 void printSBitModifierOperand(const MCInst *MI, unsigned OpNum,
Akira Hatanakaee974752015-03-27 23:41:42 +0000[diff] [blame^]163 const MCSubtargetInfo &STI, raw_ostream &O);
164 void printRegisterList(const MCInst *MI, unsigned OpNum,
165 const MCSubtargetInfo &STI, raw_ostream &O);
166 void printNoHashImmediate(const MCInst *MI, unsigned OpNum,
167 const MCSubtargetInfo &STI, raw_ostream &O);
168 void printPImmediate(const MCInst *MI, unsigned OpNum,
169 const MCSubtargetInfo &STI, raw_ostream &O);
170 void printCImmediate(const MCInst *MI, unsigned OpNum,
171 const MCSubtargetInfo &STI, raw_ostream &O);
172 void printCoprocOptionImm(const MCInst *MI, unsigned OpNum,
173 const MCSubtargetInfo &STI, raw_ostream &O);
174 void printFPImmOperand(const MCInst *MI, unsigned OpNum,
175 const MCSubtargetInfo &STI, raw_ostream &O);
176 void printNEONModImmOperand(const MCInst *MI, unsigned OpNum,
177 const MCSubtargetInfo &STI, raw_ostream &O);
178 void printImmPlusOneOperand(const MCInst *MI, unsigned OpNum,
179 const MCSubtargetInfo &STI, raw_ostream &O);
180 void printRotImmOperand(const MCInst *MI, unsigned OpNum,
181 const MCSubtargetInfo &STI, raw_ostream &O);
182 void printModImmOperand(const MCInst *MI, unsigned OpNum,
183 const MCSubtargetInfo &STI, raw_ostream &O);
184 void printGPRPairOperand(const MCInst *MI, unsigned OpNum,
185 const MCSubtargetInfo &STI, raw_ostream &O);
Chris Lattneradd57492009-10-19 22:23:04 +0000[diff] [blame]186
Akira Hatanakaee974752015-03-27 23:41:42 +0000[diff] [blame^]187 void printPCLabel(const MCInst *MI, unsigned OpNum,
188 const MCSubtargetInfo &STI, raw_ostream &O);
Jim Grosbach4739f2e2012-10-30 01:04:51 +0000[diff] [blame]189 void printThumbLdrLabelOperand(const MCInst *MI, unsigned OpNum,
Akira Hatanakaee974752015-03-27 23:41:42 +0000[diff] [blame^]190 const MCSubtargetInfo &STI, raw_ostream &O);
191 void printFBits16(const MCInst *MI, unsigned OpNum,
192 const MCSubtargetInfo &STI, raw_ostream &O);
193 void printFBits32(const MCInst *MI, unsigned OpNum,
194 const MCSubtargetInfo &STI, raw_ostream &O);
195 void printVectorIndex(const MCInst *MI, unsigned OpNum,
196 const MCSubtargetInfo &STI, raw_ostream &O);
197 void printVectorListOne(const MCInst *MI, unsigned OpNum,
198 const MCSubtargetInfo &STI, raw_ostream &O);
199 void printVectorListTwo(const MCInst *MI, unsigned OpNum,
200 const MCSubtargetInfo &STI, raw_ostream &O);
Jim Grosbach13a292c2012-03-06 22:01:44 +0000[diff] [blame]201 void printVectorListTwoSpaced(const MCInst *MI, unsigned OpNum,
Akira Hatanakaee974752015-03-27 23:41:42 +0000[diff] [blame^]202 const MCSubtargetInfo &STI, raw_ostream &O);
203 void printVectorListThree(const MCInst *MI, unsigned OpNum,
204 const MCSubtargetInfo &STI, raw_ostream &O);
205 void printVectorListFour(const MCInst *MI, unsigned OpNum,
206 const MCSubtargetInfo &STI, raw_ostream &O);
Jim Grosbachcd6f5e72011-11-30 01:09:44 +0000[diff] [blame]207 void printVectorListOneAllLanes(const MCInst *MI, unsigned OpNum,
Akira Hatanakaee974752015-03-27 23:41:42 +0000[diff] [blame^]208 const MCSubtargetInfo &STI, raw_ostream &O);
Jim Grosbach3ecf9762011-11-30 18:21:25 +0000[diff] [blame]209 void printVectorListTwoAllLanes(const MCInst *MI, unsigned OpNum,
Akira Hatanakaee974752015-03-27 23:41:42 +0000[diff] [blame^]210 const MCSubtargetInfo &STI, raw_ostream &O);
Jim Grosbachb78403c2012-01-24 23:47:04 +0000[diff] [blame]211 void printVectorListThreeAllLanes(const MCInst *MI, unsigned OpNum,
Akira Hatanakaee974752015-03-27 23:41:42 +0000[diff] [blame^]212 const MCSubtargetInfo &STI, raw_ostream &O);
Jim Grosbach086cbfa2012-01-25 00:01:08 +0000[diff] [blame]213 void printVectorListFourAllLanes(const MCInst *MI, unsigned OpNum,
Akira Hatanakaee974752015-03-27 23:41:42 +0000[diff] [blame^]214 const MCSubtargetInfo &STI, raw_ostream &O);
Jim Grosbachc5af54e2011-12-21 00:38:54 +0000[diff] [blame]215 void printVectorListTwoSpacedAllLanes(const MCInst *MI, unsigned OpNum,
Akira Hatanakaee974752015-03-27 23:41:42 +0000[diff] [blame^]216 const MCSubtargetInfo &STI,
Jim Grosbachc5af54e2011-12-21 00:38:54 +0000[diff] [blame]217 raw_ostream &O);
Jim Grosbachb78403c2012-01-24 23:47:04 +0000[diff] [blame]218 void printVectorListThreeSpacedAllLanes(const MCInst *MI, unsigned OpNum,
Akira Hatanakaee974752015-03-27 23:41:42 +0000[diff] [blame^]219 const MCSubtargetInfo &STI,
Jim Grosbachb78403c2012-01-24 23:47:04 +0000[diff] [blame]220 raw_ostream &O);
Jim Grosbach086cbfa2012-01-25 00:01:08 +0000[diff] [blame]221 void printVectorListFourSpacedAllLanes(const MCInst *MI, unsigned OpNum,
Akira Hatanakaee974752015-03-27 23:41:42 +0000[diff] [blame^]222 const MCSubtargetInfo &STI,
Jim Grosbach086cbfa2012-01-25 00:01:08 +0000[diff] [blame]223 raw_ostream &O);
Jim Grosbachac2af3f2012-01-23 23:20:46 +0000[diff] [blame]224 void printVectorListThreeSpaced(const MCInst *MI, unsigned OpNum,
Akira Hatanakaee974752015-03-27 23:41:42 +0000[diff] [blame^]225 const MCSubtargetInfo &STI, raw_ostream &O);
Jim Grosbached561fc2012-01-24 00:43:17 +0000[diff] [blame]226 void printVectorListFourSpaced(const MCInst *MI, unsigned OpNum,
Akira Hatanakaee974752015-03-27 23:41:42 +0000[diff] [blame^]227 const MCSubtargetInfo &STI, raw_ostream &O);
Chris Lattnera2907782009-10-19 19:56:26 +0000[diff] [blame]228};
Jim Grosbach4e51d0b2010-09-17 21:25:10 +0000[diff] [blame]229
Chris Lattnera76eab42010-11-14 19:40:38 +0000[diff] [blame]230} // end namespace llvm
Chris Lattnera2907782009-10-19 19:56:26 +0000[diff] [blame]231
232#endif