| Vasileios Kalintiris | 2ed214f | 2015-01-26 12:04:40 +0000 | [diff] [blame] | 1 | ; RUN: llc < %s -march=mips -mcpu=mips2 | FileCheck %s \ |
| 2 | ; RUN: -check-prefix=ALL -check-prefix=NOT-R2-R6 -check-prefix=GP32 |
| 3 | ; RUN: llc < %s -march=mips -mcpu=mips32 | FileCheck %s \ |
| 4 | ; RUN: -check-prefix=ALL -check-prefix=NOT-R2-R6 -check-prefix=GP32 |
| 5 | ; RUN: llc < %s -march=mips -mcpu=mips32r2 | FileCheck %s \ |
| 6 | ; RUN: -check-prefix=ALL -check-prefix=R2-R6 -check-prefix=GP32 |
| 7 | ; RUN: llc < %s -march=mips -mcpu=mips32r6 | FileCheck %s \ |
| 8 | ; RUN: -check-prefix=ALL -check-prefix=R2-R6 -check-prefix=GP32 |
| 9 | ; RUN: llc < %s -march=mips64 -mcpu=mips3 | FileCheck %s \ |
| 10 | ; RUN: -check-prefix=ALL -check-prefix=NOT-R2-R6 -check-prefix=GP64 |
| 11 | ; RUN: llc < %s -march=mips64 -mcpu=mips4 | FileCheck %s \ |
| 12 | ; RUN: -check-prefix=ALL -check-prefix=NOT-R2-R6 -check-prefix=GP64 |
| 13 | ; RUN: llc < %s -march=mips64 -mcpu=mips64 | FileCheck %s \ |
| 14 | ; RUN: -check-prefix=ALL -check-prefix=NOT-R2-R6 -check-prefix=GP64 |
| 15 | ; RUN: llc < %s -march=mips64 -mcpu=mips64r2 | FileCheck %s \ |
| 16 | ; RUN: -check-prefix=ALL -check-prefix=R2-R6 -check-prefix=GP64 |
| 17 | ; RUN: llc < %s -march=mips64 -mcpu=mips64r6 | FileCheck %s \ |
| 18 | ; RUN: -check-prefix=ALL -check-prefix=R2-R6 -check-prefix=GP64 |
| 19 | |
| 20 | define signext i1 @add_i1(i1 signext %a, i1 signext %b) { |
| 21 | entry: |
| 22 | ; ALL-LABEL: add_i1: |
| 23 | |
| 24 | ; ALL: addu $[[T0:[0-9]+]], $4, $5 |
| 25 | ; ALL: sll $[[T0]], $[[T0]], 31 |
| 26 | ; ALL: sra $2, $[[T0]], 31 |
| 27 | |
| 28 | %r = add i1 %a, %b |
| 29 | ret i1 %r |
| 30 | } |
| 31 | |
| 32 | define signext i8 @add_i8(i8 signext %a, i8 signext %b) { |
| 33 | entry: |
| 34 | ; ALL-LABEL: add_i8: |
| 35 | |
| 36 | ; NOT-R2-R6: addu $[[T0:[0-9]+]], $4, $5 |
| 37 | ; NOT-R2-R6: sll $[[T0]], $[[T0]], 24 |
| 38 | ; NOT-R2-R6: sra $2, $[[T0]], 24 |
| 39 | |
| 40 | ; R2-R6: addu $[[T0:[0-9]+]], $4, $5 |
| 41 | ; R2-R6: seb $2, $[[T0:[0-9]+]] |
| 42 | |
| 43 | %r = add i8 %a, %b |
| 44 | ret i8 %r |
| 45 | } |
| 46 | |
| 47 | define signext i16 @add_i16(i16 signext %a, i16 signext %b) { |
| 48 | entry: |
| 49 | ; ALL-LABEL: add_i16: |
| 50 | |
| 51 | ; NOT-R2-R6: addu $[[T0:[0-9]+]], $4, $5 |
| 52 | ; NOT-R2-R6: sll $[[T0]], $[[T0]], 16 |
| 53 | ; NOT-R2-R6: sra $2, $[[T0]], 16 |
| 54 | |
| 55 | ; R2-R6: addu $[[T0:[0-9]+]], $4, $5 |
| 56 | ; R2-R6: seh $2, $[[T0:[0-9]+]] |
| 57 | |
| 58 | %r = add i16 %a, %b |
| 59 | ret i16 %r |
| 60 | } |
| 61 | |
| 62 | define signext i32 @add_i32(i32 signext %a, i32 signext %b) { |
| 63 | entry: |
| 64 | ; ALL-LABEL: add_i32: |
| 65 | |
| 66 | ; ALL: addu $2, $4, $5 |
| 67 | |
| 68 | %r = add i32 %a, %b |
| 69 | ret i32 %r |
| 70 | } |
| 71 | |
| 72 | define signext i64 @add_i64(i64 signext %a, i64 signext %b) { |
| 73 | entry: |
| 74 | ; ALL-LABEL: add_i64: |
| 75 | |
| 76 | ; GP32: addu $3, $5, $7 |
| 77 | ; GP32: sltu $[[T0:[0-9]+]], $3, $7 |
| 78 | ; GP32: addu $[[T1:[0-9]+]], $[[T0]], $6 |
| 79 | ; GP32: addu $2, $4, $[[T1]] |
| 80 | |
| 81 | ; GP64: daddu $2, $4, $5 |
| 82 | |
| 83 | %r = add i64 %a, %b |
| 84 | ret i64 %r |
| 85 | } |