| Tom Stellard | 75aadc2 | 2012-12-11 21:25:42 +0000 | [diff] [blame] | 1 | //===-- R600ISelLowering.h - R600 DAG Lowering Interface -*- C++ -*--------===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | /// \file |
| 11 | /// \brief R600 DAG Lowering interface definition |
| 12 | // |
| 13 | //===----------------------------------------------------------------------===// |
| 14 | |
| 15 | #ifndef R600ISELLOWERING_H |
| 16 | #define R600ISELLOWERING_H |
| 17 | |
| 18 | #include "AMDGPUISelLowering.h" |
| 19 | |
| 20 | namespace llvm { |
| 21 | |
| 22 | class R600InstrInfo; |
| 23 | |
| 24 | class R600TargetLowering : public AMDGPUTargetLowering { |
| 25 | public: |
| 26 | R600TargetLowering(TargetMachine &TM); |
| 27 | virtual MachineBasicBlock * EmitInstrWithCustomInserter(MachineInstr *MI, |
| 28 | MachineBasicBlock * BB) const; |
| 29 | virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const; |
| 30 | virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const; |
| 31 | void ReplaceNodeResults(SDNode * N, |
| 32 | SmallVectorImpl<SDValue> &Results, |
| 33 | SelectionDAG &DAG) const; |
| 34 | virtual SDValue LowerFormalArguments( |
| 35 | SDValue Chain, |
| 36 | CallingConv::ID CallConv, |
| 37 | bool isVarArg, |
| 38 | const SmallVectorImpl<ISD::InputArg> &Ins, |
| Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame^] | 39 | SDLoc DL, SelectionDAG &DAG, |
| Tom Stellard | 75aadc2 | 2012-12-11 21:25:42 +0000 | [diff] [blame] | 40 | SmallVectorImpl<SDValue> &InVals) const; |
| Matt Arsenault | 75865923 | 2013-05-18 00:21:46 +0000 | [diff] [blame] | 41 | virtual EVT getSetCCResultType(LLVMContext &, EVT VT) const; |
| Tom Stellard | 75aadc2 | 2012-12-11 21:25:42 +0000 | [diff] [blame] | 42 | private: |
| 43 | const R600InstrInfo * TII; |
| 44 | |
| 45 | /// Each OpenCL kernel has nine implicit parameters that are stored in the |
| 46 | /// first nine dwords of a Vertex Buffer. These implicit parameters are |
| 47 | /// lowered to load instructions which retreive the values from the Vertex |
| 48 | /// Buffer. |
| 49 | SDValue LowerImplicitParameter(SelectionDAG &DAG, EVT VT, |
| Andrew Trick | ef9de2a | 2013-05-25 02:42:55 +0000 | [diff] [blame^] | 50 | SDLoc DL, unsigned DwordOffset) const; |
| Tom Stellard | 75aadc2 | 2012-12-11 21:25:42 +0000 | [diff] [blame] | 51 | |
| 52 | void lowerImplicitParameter(MachineInstr *MI, MachineBasicBlock &BB, |
| 53 | MachineRegisterInfo & MRI, unsigned dword_offset) const; |
| 54 | |
| Tom Stellard | 75aadc2 | 2012-12-11 21:25:42 +0000 | [diff] [blame] | 55 | /// \brief Lower ROTL opcode to BITALIGN |
| 56 | SDValue LowerROTL(SDValue Op, SelectionDAG &DAG) const; |
| 57 | |
| 58 | SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const; |
| 59 | SDValue LowerSELECT(SDValue Op, SelectionDAG &DAG) const; |
| Tom Stellard | 75aadc2 | 2012-12-11 21:25:42 +0000 | [diff] [blame] | 60 | SDValue LowerSTORE(SDValue Op, SelectionDAG &DAG) const; |
| 61 | SDValue LowerFPTOUINT(SDValue Op, SelectionDAG &DAG) const; |
| Tom Stellard | 365366f | 2013-01-23 02:09:06 +0000 | [diff] [blame] | 62 | SDValue LowerLOAD(SDValue Op, SelectionDAG &DAG) const; |
| Tom Stellard | f3b2a1e | 2013-02-06 17:32:29 +0000 | [diff] [blame] | 63 | SDValue LowerFrameIndex(SDValue Op, SelectionDAG &DAG) const; |
| 64 | |
| 65 | SDValue stackPtrToRegIndex(SDValue Ptr, unsigned StackWidth, |
| 66 | SelectionDAG &DAG) const; |
| 67 | void getStackAddress(unsigned StackWidth, unsigned ElemIdx, |
| 68 | unsigned &Channel, unsigned &PtrIncr) const; |
| Tom Stellard | 75aadc2 | 2012-12-11 21:25:42 +0000 | [diff] [blame] | 69 | bool isZero(SDValue Op) const; |
| 70 | }; |
| 71 | |
| 72 | } // End namespace llvm; |
| 73 | |
| 74 | #endif // R600ISELLOWERING_H |