Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 1 | // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp=libiomp5 -x c -emit-llvm %s -o - | FileCheck %s |
| 2 | // RUN: %clang_cc1 -fopenmp=libiomp5 -x c -triple x86_64-apple-darwin10 -emit-pch -o %t %s |
| 3 | // RUN: %clang_cc1 -fopenmp=libiomp5 -x c -triple x86_64-apple-darwin10 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s |
| 4 | // expected-no-diagnostics |
| 5 | |
| 6 | #ifndef HEADER |
| 7 | #define HEADER |
| 8 | |
| 9 | _Bool bv, bx; |
| 10 | char cv, cx; |
| 11 | unsigned char ucv, ucx; |
| 12 | short sv, sx; |
| 13 | unsigned short usv, usx; |
| 14 | int iv, ix; |
| 15 | unsigned int uiv, uix; |
| 16 | long lv, lx; |
| 17 | unsigned long ulv, ulx; |
| 18 | long long llv, llx; |
| 19 | unsigned long long ullv, ullx; |
| 20 | float fv, fx; |
| 21 | double dv, dx; |
| 22 | long double ldv, ldx; |
| 23 | _Complex int civ, cix; |
| 24 | _Complex float cfv, cfx; |
| 25 | _Complex double cdv, cdx; |
| 26 | |
| 27 | typedef int int4 __attribute__((__vector_size__(16))); |
| 28 | int4 int4x; |
| 29 | |
| 30 | struct BitFields { |
| 31 | int : 32; |
| 32 | int a : 31; |
| 33 | } bfx; |
| 34 | |
| 35 | struct BitFields_packed { |
| 36 | int : 32; |
| 37 | int a : 31; |
| 38 | } __attribute__ ((__packed__)) bfx_packed; |
| 39 | |
| 40 | struct BitFields2 { |
| 41 | int : 31; |
| 42 | int a : 1; |
| 43 | } bfx2; |
| 44 | |
| 45 | struct BitFields2_packed { |
| 46 | int : 31; |
| 47 | int a : 1; |
| 48 | } __attribute__ ((__packed__)) bfx2_packed; |
| 49 | |
| 50 | struct BitFields3 { |
| 51 | int : 11; |
| 52 | int a : 14; |
| 53 | } bfx3; |
| 54 | |
| 55 | struct BitFields3_packed { |
| 56 | int : 11; |
| 57 | int a : 14; |
| 58 | } __attribute__ ((__packed__)) bfx3_packed; |
| 59 | |
| 60 | struct BitFields4 { |
| 61 | short : 16; |
| 62 | int a: 1; |
| 63 | long b : 7; |
| 64 | } bfx4; |
| 65 | |
| 66 | struct BitFields4_packed { |
| 67 | short : 16; |
| 68 | int a: 1; |
| 69 | long b : 7; |
| 70 | } __attribute__ ((__packed__)) bfx4_packed; |
| 71 | |
| 72 | typedef float float2 __attribute__((ext_vector_type(2))); |
| 73 | float2 float2x; |
| 74 | |
| 75 | register int rix __asm__("0"); |
| 76 | |
| 77 | int main() { |
| 78 | // CHECK: [[PREV:%.+]] = atomicrmw add i8* @{{.+}}, i8 1 monotonic |
| 79 | // CHECK: store i8 [[PREV]], i8* @{{.+}}, |
| 80 | #pragma omp atomic capture |
| 81 | bv = bx++; |
| 82 | // CHECK: atomicrmw add i8* @{{.+}}, i8 1 monotonic |
| 83 | // CHECK: add nsw i32 %{{.+}}, 1 |
| 84 | // CHECK: store i8 %{{.+}}, i8* @{{.+}}, |
| 85 | #pragma omp atomic capture |
| 86 | cv = ++cx; |
| 87 | // CHECK: [[PREV:%.+]] = atomicrmw sub i8* @{{.+}}, i8 1 monotonic |
| 88 | // CHECK: store i8 [[PREV]], i8* @{{.+}}, |
| 89 | #pragma omp atomic capture |
| 90 | ucv = ucx--; |
| 91 | // CHECK: atomicrmw sub i16* @{{.+}}, i16 1 monotonic |
| 92 | // CHECK: sub nsw i32 %{{.+}}, 1 |
| 93 | // CHECK: store i16 %{{.+}}, i16* @{{.+}}, |
| 94 | #pragma omp atomic capture |
| 95 | sv = --sx; |
| 96 | // CHECK: [[USV:%.+]] = load i16, i16* @{{.+}}, |
| 97 | // CHECK: [[EXPR:%.+]] = zext i16 [[USV]] to i32 |
| 98 | // CHECK: [[X:%.+]] = load atomic i16, i16* [[X_ADDR:@.+]] monotonic |
| 99 | // CHECK: br label %[[CONT:.+]] |
| 100 | // CHECK: [[CONT]] |
| 101 | // CHECK: [[EXPECTED:%.+]] = phi i16 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] |
| 102 | // CHECK: [[CONV:%.+]] = zext i16 [[EXPECTED]] to i32 |
| 103 | // CHECK: [[ADD:%.+]] = add nsw i32 [[CONV]], [[EXPR]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 104 | // CHECK: [[DESIRED_CALC:%.+]] = trunc i32 [[ADD]] to i16 |
| 105 | // CHECK: store i16 [[DESIRED_CALC]], i16* [[TEMP:%.+]], |
| 106 | // CHECK: [[DESIRED:%.+]] = load i16, i16* [[TEMP]], |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 107 | // CHECK: [[RES:%.+]] = cmpxchg i16* [[X_ADDR]], i16 [[EXPECTED]], i16 [[DESIRED]] monotonic monotonic |
| 108 | // CHECK: [[OLD_X]] = extractvalue { i16, i1 } [[RES]], 0 |
| 109 | // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i16, i1 } [[RES]], 1 |
| 110 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 111 | // CHECK: [[EXIT]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 112 | // CHECK: store i16 [[DESIRED_CALC]], i16* @{{.+}}, |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 113 | #pragma omp atomic capture |
| 114 | sv = usx += usv; |
| 115 | // CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}}, |
| 116 | // CHECK: [[X:%.+]] = load atomic i32, i32* [[X_ADDR:@.+]] monotonic |
| 117 | // CHECK: br label %[[CONT:.+]] |
| 118 | // CHECK: [[CONT]] |
| 119 | // CHECK: [[EXPECTED:%.+]] = phi i32 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 120 | // CHECK: [[DESIRED_CALC:%.+]] = mul nsw i32 [[EXPECTED]], [[EXPR]] |
| 121 | // CHECK: store i32 [[DESIRED_CALC]], i32* [[TEMP:%.+]], |
| 122 | // CHECK: [[DESIRED:%.+]] = load i32, i32* [[TEMP]], |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 123 | // CHECK: [[RES:%.+]] = cmpxchg i32* [[X_ADDR]], i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic |
| 124 | // CHECK: [[OLD_X]] = extractvalue { i32, i1 } [[RES]], 0 |
| 125 | // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i32, i1 } [[RES]], 1 |
| 126 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 127 | // CHECK: [[EXIT]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 128 | // CHECK: store i32 [[DESIRED_CALC]], i32* @{{.+}}, |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 129 | #pragma omp atomic capture |
| 130 | uiv = ix *= iv; |
| 131 | // CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}}, |
| 132 | // CHECK: [[PREV:%.+]] = atomicrmw sub i32* @{{.+}}, i32 [[EXPR]] monotonic |
| 133 | // CHECK: store i32 [[PREV]], i32* @{{.+}}, |
| 134 | #pragma omp atomic capture |
| 135 | {iv = uix; uix -= uiv;} |
| 136 | // CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}}, |
| 137 | // CHECK: [[X:%.+]] = load atomic i32, i32* [[X_ADDR:@.+]] monotonic |
| 138 | // CHECK: br label %[[CONT:.+]] |
| 139 | // CHECK: [[CONT]] |
| 140 | // CHECK: [[EXPECTED:%.+]] = phi i32 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 141 | // CHECK: [[DESIRED_CALC:%.+]] = shl i32 [[EXPECTED]], [[EXPR]] |
| 142 | // CHECK: store i32 [[DESIRED_CALC]], i32* [[TEMP:%.+]], |
| 143 | // CHECK: [[DESIRED:%.+]] = load i32, i32* [[TEMP]], |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 144 | // CHECK: [[RES:%.+]] = cmpxchg i32* [[X_ADDR]], i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic |
| 145 | // CHECK: [[OLD_X]] = extractvalue { i32, i1 } [[RES]], 0 |
| 146 | // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i32, i1 } [[RES]], 1 |
| 147 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 148 | // CHECK: [[EXIT]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 149 | // CHECK: store i32 [[DESIRED_CALC]], i32* @{{.+}}, |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 150 | #pragma omp atomic capture |
| 151 | {ix <<= iv; uiv = ix;} |
| 152 | // CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}}, |
| 153 | // CHECK: [[X:%.+]] = load atomic i32, i32* [[X_ADDR:@.+]] monotonic |
| 154 | // CHECK: br label %[[CONT:.+]] |
| 155 | // CHECK: [[CONT]] |
| 156 | // CHECK: [[EXPECTED:%.+]] = phi i32 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 157 | // CHECK: [[DESIRED_CALC:%.+]] = lshr i32 [[EXPECTED]], [[EXPR]] |
| 158 | // CHECK: store i32 [[DESIRED_CALC]], i32* [[TEMP:%.+]], |
| 159 | // CHECK: [[DESIRED:%.+]] = load i32, i32* [[TEMP]], |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 160 | // CHECK: [[RES:%.+]] = cmpxchg i32* [[X_ADDR]], i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic |
| 161 | // CHECK: [[OLD_X]] = extractvalue { i32, i1 } [[RES]], 0 |
| 162 | // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i32, i1 } [[RES]], 1 |
| 163 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 164 | // CHECK: [[EXIT]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 165 | // CHECK: store i32 [[DESIRED_CALC]], i32* @{{.+}}, |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 166 | #pragma omp atomic capture |
| 167 | iv = uix >>= uiv; |
| 168 | // CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}}, |
| 169 | // CHECK: [[X:%.+]] = load atomic i64, i64* [[X_ADDR:@.+]] monotonic |
| 170 | // CHECK: br label %[[CONT:.+]] |
| 171 | // CHECK: [[CONT]] |
| 172 | // CHECK: [[EXPECTED:%.+]] = phi i64 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] |
| 173 | // CHECK: [[DESIRED:%.+]] = sdiv i64 [[EXPECTED]], [[EXPR]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 174 | // CHECK: store i64 [[DESIRED]], i64* [[TEMP:%.+]], |
| 175 | // CHECK: [[DESIRED:%.+]] = load i64, i64* [[TEMP]], |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 176 | // CHECK: [[RES:%.+]] = cmpxchg i64* [[X_ADDR]], i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic |
| 177 | // CHECK: [[OLD_X]] = extractvalue { i64, i1 } [[RES]], 0 |
| 178 | // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1 |
| 179 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 180 | // CHECK: [[EXIT]] |
| 181 | // CHECK: store i64 [[EXPECTED]], i64* @{{.+}}, |
| 182 | #pragma omp atomic capture |
| 183 | {ulv = lx; lx /= lv;} |
| 184 | // CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}}, |
| 185 | // CHECK: [[OLD:%.+]] = atomicrmw and i64* @{{.+}}, i64 [[EXPR]] monotonic |
| 186 | // CHECK: [[DESIRED:%.+]] = and i64 [[OLD]], [[EXPR]] |
| 187 | // CHECK: store i64 [[DESIRED]], i64* @{{.+}}, |
| 188 | #pragma omp atomic capture |
| 189 | {ulx &= ulv; lv = ulx;} |
| 190 | // CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}}, |
| 191 | // CHECK: [[OLD:%.+]] = atomicrmw xor i64* @{{.+}}, i64 [[EXPR]] monotonic |
| 192 | // CHECK: [[DESIRED:%.+]] = xor i64 [[OLD]], [[EXPR]] |
| 193 | // CHECK: store i64 [[DESIRED]], i64* @{{.+}}, |
| 194 | #pragma omp atomic capture |
| 195 | ullv = llx ^= llv; |
| 196 | // CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}}, |
| 197 | // CHECK: [[OLD:%.+]] = atomicrmw or i64* @{{.+}}, i64 [[EXPR]] monotonic |
| 198 | // CHECK: [[DESIRED:%.+]] = or i64 [[OLD]], [[EXPR]] |
| 199 | // CHECK: store i64 [[DESIRED]], i64* @{{.+}}, |
| 200 | #pragma omp atomic capture |
| 201 | llv = ullx |= ullv; |
| 202 | // CHECK: [[EXPR:%.+]] = load float, float* @{{.+}}, |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 203 | // CHECK: [[X:%.+]] = load atomic i32, i32* bitcast (float* [[X_ADDR:@.+]] to i32*) monotonic |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 204 | // CHECK: br label %[[CONT:.+]] |
| 205 | // CHECK: [[CONT]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 206 | // CHECK: [[EXPECTED:%.+]] = phi i32 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] |
| 207 | // CHECK: [[TEMP_I:%.+]] = bitcast float* [[TEMP:%.+]] to i32* |
| 208 | // CHECK: [[OLD:%.+]] = bitcast i32 [[EXPECTED]] to float |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 209 | // CHECK: [[ADD:%.+]] = fadd float [[OLD]], [[EXPR]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 210 | // CHECK: store float [[ADD]], float* [[TEMP]], |
| 211 | // CHECK: [[DESIRED:%.+]] = load i32, i32* [[TEMP_I]], |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 212 | // CHECK: [[RES:%.+]] = cmpxchg i32* bitcast (float* [[X_ADDR]] to i32*), i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 213 | // CHECK: [[OLD_X:%.+]] = extractvalue { i32, i1 } [[RES]], 0 |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 214 | // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i32, i1 } [[RES]], 1 |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 215 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 216 | // CHECK: [[EXIT]] |
| 217 | // CHECK: [[CAST:%.+]] = fpext float [[ADD]] to double |
| 218 | // CHECK: store double [[CAST]], double* @{{.+}}, |
| 219 | #pragma omp atomic capture |
| 220 | dv = fx = fx + fv; |
| 221 | // CHECK: [[EXPR:%.+]] = load double, double* @{{.+}}, |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 222 | // CHECK: [[X:%.+]] = load atomic i64, i64* bitcast (double* [[X_ADDR:@.+]] to i64*) monotonic |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 223 | // CHECK: br label %[[CONT:.+]] |
| 224 | // CHECK: [[CONT]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 225 | // CHECK: [[EXPECTED:%.+]] = phi i64 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] |
| 226 | // CHECK: [[TEMP_I:%.+]] = bitcast double* [[TEMP:%.+]] to i64* |
| 227 | // CHECK: [[OLD:%.+]] = bitcast i64 [[EXPECTED]] to double |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 228 | // CHECK: [[SUB:%.+]] = fsub double [[EXPR]], [[OLD]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 229 | // CHECK: store double [[SUB]], double* [[TEMP]], |
| 230 | // CHECK: [[DESIRED:%.+]] = load i64, i64* [[TEMP_I]], |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 231 | // CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (double* [[X_ADDR]] to i64*), i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 232 | // CHECK: [[OLD_X:%.+]] = extractvalue { i64, i1 } [[RES]], 0 |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 233 | // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1 |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 234 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 235 | // CHECK: [[EXIT]] |
| 236 | // CHECK: [[CAST:%.+]] = fptrunc double [[OLD]] to float |
| 237 | // CHECK: store float [[CAST]], float* @{{.+}}, |
| 238 | #pragma omp atomic capture |
| 239 | {fv = dx; dx = dv - dx;} |
| 240 | // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}, |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 241 | // CHECK: [[X:%.+]] = load atomic i128, i128* bitcast (x86_fp80* [[X_ADDR:@.+]] to i128*) monotonic |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 242 | // CHECK: br label %[[CONT:.+]] |
| 243 | // CHECK: [[CONT]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 244 | // CHECK: [[EXPECTED:%.+]] = phi i128 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] |
| 245 | // CHECK: [[BITCAST:%.+]] = bitcast x86_fp80* [[TEMP:%.+]] to i128* |
| 246 | // CHECK: store i128 [[EXPECTED]], i128* [[BITCAST]] |
| 247 | // CHECK: [[BITCAST1:%.+]] = bitcast x86_fp80* [[TEMP1:%.+]] to i128* |
| 248 | // CHECK: store i128 [[EXPECTED]], i128* [[BITCAST1]] |
| 249 | // CHECK: [[OLD:%.+]] = load x86_fp80, x86_fp80* [[TEMP1]] |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 250 | // CHECK: [[MUL:%.+]] = fmul x86_fp80 [[OLD]], [[EXPR]] |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 251 | // CHECK: store x86_fp80 [[MUL]], x86_fp80* [[TEMP]] |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 252 | // CHECK: [[DESIRED:%.+]] = load i128, i128* [[BITCAST]] |
| 253 | // CHECK: [[RES:%.+]] = cmpxchg i128* bitcast (x86_fp80* [[X_ADDR]] to i128*), i128 [[EXPECTED]], i128 [[DESIRED]] monotonic monotonic |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 254 | // CHECK: [[OLD_X:%.+]] = extractvalue { i128, i1 } [[RES]], 0 |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 255 | // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i128, i1 } [[RES]], 1 |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 256 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 257 | // CHECK: [[EXIT]] |
| 258 | // CHECK: [[CAST:%.+]] = fptrunc x86_fp80 [[MUL]] to double |
| 259 | // CHECK: store double [[CAST]], double* @{{.+}}, |
| 260 | #pragma omp atomic capture |
| 261 | {ldx = ldx * ldv; dv = ldx;} |
| 262 | // CHECK: [[EXPR_RE:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 0) |
| 263 | // CHECK: [[EXPR_IM:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 1) |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 264 | // CHECK: [[BITCAST:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR:%.+]] to i8* |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 265 | // CHECK: call void @__atomic_load(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR:@.+]] to i8*), i8* [[BITCAST]], i32 0) |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 266 | // CHECK: br label %[[CONT:.+]] |
| 267 | // CHECK: [[CONT]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 268 | // CHECK: [[LD_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 0 |
| 269 | // CHECK: [[LD_RE:%.+]] = load i32, i32* [[LD_RE_ADDR]] |
| 270 | // CHECK: [[LD_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 1 |
| 271 | // CHECK: [[LD_IM:%.+]] = load i32, i32* [[LD_IM_ADDR]] |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 272 | // <Skip checks for complex calculations> |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 273 | // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR:%.+]], i32 0, i32 0 |
| 274 | // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR]], i32 0, i32 1 |
| 275 | // CHECK: store i32 [[NEW_RE:%.+]], i32* [[X_RE_ADDR]] |
| 276 | // CHECK: store i32 [[NEW_IM:%.+]], i32* [[X_IM_ADDR]] |
| 277 | // CHECK: [[EXPECTED:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR]] to i8* |
| 278 | // CHECK: [[DESIRED:%.+]] = bitcast { i32, i32 }* [[DESIRED_ADDR]] to i8* |
| 279 | // CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR]] to i8*), i8* [[EXPECTED]], i8* [[DESIRED]], i32 0, i32 0) |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 280 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 281 | // CHECK: [[EXIT]] |
| 282 | // CHECK: [[RE_CAST:%.+]] = sitofp i32 [[NEW_RE]] to float |
| 283 | // CHECK: [[IM_CAST:%.+]] = sitofp i32 [[NEW_IM]] to float |
| 284 | // CHECK: store float [[RE_CAST]], float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 0), |
| 285 | // CHECK: store float [[IM_CAST]], float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 1), |
| 286 | #pragma omp atomic capture |
| 287 | cfv = cix = civ / cix; |
| 288 | // CHECK: [[EXPR_RE:%.+]] = load float, float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 0) |
| 289 | // CHECK: [[EXPR_IM:%.+]] = load float, float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 1) |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 290 | // CHECK: [[BITCAST:%.+]] = bitcast { float, float }* [[EXPECTED_ADDR:%.+]] to i8* |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 291 | // CHECK: call void @__atomic_load(i64 8, i8* bitcast ({ float, float }* [[X_ADDR:@.+]] to i8*), i8* [[BITCAST]], i32 0) |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 292 | // CHECK: br label %[[CONT:.+]] |
| 293 | // CHECK: [[CONT]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 294 | // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[EXPECTED_ADDR]], i32 0, i32 0 |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 295 | // CHECK: [[X_RE_OLD:%.+]] = load float, float* [[X_RE_ADDR]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 296 | // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[EXPECTED_ADDR]], i32 0, i32 1 |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 297 | // CHECK: [[X_IM_OLD:%.+]] = load float, float* [[X_IM_ADDR]] |
| 298 | // <Skip checks for complex calculations> |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 299 | // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[DESIRED_ADDR:%.+]], i32 0, i32 0 |
| 300 | // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[DESIRED_ADDR]], i32 0, i32 1 |
| 301 | // CHECK: store float [[NEW_RE:%.+]], float* [[X_RE_ADDR]] |
| 302 | // CHECK: store float [[NEW_IM:%.+]], float* [[X_IM_ADDR]] |
| 303 | // CHECK: [[EXPECTED:%.+]] = bitcast { float, float }* [[EXPECTED_ADDR]] to i8* |
| 304 | // CHECK: [[DESIRED:%.+]] = bitcast { float, float }* [[DESIRED_ADDR]] to i8* |
| 305 | // CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 8, i8* bitcast ({ float, float }* [[X_ADDR]] to i8*), i8* [[EXPECTED]], i8* [[DESIRED]], i32 0, i32 0) |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 306 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 307 | // CHECK: [[EXIT]] |
| 308 | // CHECK: [[RE_CAST:%.+]] = fptosi float [[X_RE_OLD]] to i32 |
| 309 | // CHECK: [[IM_CAST:%.+]] = fptosi float [[X_IM_OLD]] to i32 |
| 310 | // CHECK: store i32 [[RE_CAST]], i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 0), |
| 311 | // CHECK: store i32 [[IM_CAST]], i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 1), |
| 312 | #pragma omp atomic capture |
| 313 | {civ = cfx; cfx = cfv + cfx;} |
| 314 | // CHECK: [[EXPR_RE:%.+]] = load double, double* getelementptr inbounds ({ double, double }, { double, double }* @{{.+}}, i32 0, i32 0) |
| 315 | // CHECK: [[EXPR_IM:%.+]] = load double, double* getelementptr inbounds ({ double, double }, { double, double }* @{{.+}}, i32 0, i32 1) |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 316 | // CHECK: [[BITCAST:%.+]] = bitcast { double, double }* [[EXPECTED_ADDR:%.+]] to i8* |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 317 | // CHECK: call void @__atomic_load(i64 16, i8* bitcast ({ double, double }* [[X_ADDR:@.+]] to i8*), i8* [[BITCAST]], i32 5) |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 318 | // CHECK: br label %[[CONT:.+]] |
| 319 | // CHECK: [[CONT]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 320 | // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { double, double }, { double, double }* [[EXPECTED_ADDR]], i32 0, i32 0 |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 321 | // CHECK: [[X_RE:%.+]] = load double, double* [[X_RE_ADDR]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 322 | // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { double, double }, { double, double }* [[EXPECTED_ADDR]], i32 0, i32 1 |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 323 | // CHECK: [[X_IM:%.+]] = load double, double* [[X_IM_ADDR]] |
| 324 | // <Skip checks for complex calculations> |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 325 | // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { double, double }, { double, double }* [[DESIRED_ADDR:%.+]], i32 0, i32 0 |
| 326 | // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { double, double }, { double, double }* [[DESIRED_ADDR]], i32 0, i32 1 |
| 327 | // CHECK: store double [[NEW_RE:%.+]], double* [[X_RE_ADDR]] |
| 328 | // CHECK: store double [[NEW_IM:%.+]], double* [[X_IM_ADDR]] |
| 329 | // CHECK: [[EXPECTED:%.+]] = bitcast { double, double }* [[EXPECTED_ADDR]] to i8* |
| 330 | // CHECK: [[DESIRED:%.+]] = bitcast { double, double }* [[DESIRED_ADDR]] to i8* |
| 331 | // CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 16, i8* bitcast ({ double, double }* [[X_ADDR]] to i8*), i8* [[EXPECTED]], i8* [[DESIRED]], i32 5, i32 5) |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 332 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 333 | // CHECK: [[EXIT]] |
| 334 | // CHECK: [[RE_CAST:%.+]] = fptrunc double [[NEW_RE]] to float |
| 335 | // CHECK: [[IM_CAST:%.+]] = fptrunc double [[NEW_IM]] to float |
| 336 | // CHECK: store float [[RE_CAST]], float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 0), |
| 337 | // CHECK: store float [[IM_CAST]], float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 1), |
| 338 | // CHECK: call{{.*}} @__kmpc_flush( |
| 339 | #pragma omp atomic capture seq_cst |
| 340 | {cdx = cdx - cdv; cfv = cdx;} |
| 341 | // CHECK: [[BV:%.+]] = load i8, i8* @{{.+}} |
| 342 | // CHECK: [[BOOL:%.+]] = trunc i8 [[BV]] to i1 |
| 343 | // CHECK: [[EXPR:%.+]] = zext i1 [[BOOL]] to i64 |
| 344 | // CHECK: [[OLD:%.+]] = atomicrmw and i64* @{{.+}}, i64 [[EXPR]] monotonic |
| 345 | // CHECK: [[DESIRED:%.+]] = and i64 [[OLD]], [[EXPR]] |
| 346 | // CHECK: store i64 [[DESIRED]], i64* @{{.+}}, |
| 347 | #pragma omp atomic capture |
| 348 | ulv = ulx = ulx & bv; |
| 349 | // CHECK: [[CV:%.+]] = load i8, i8* @{{.+}}, align 1 |
| 350 | // CHECK: [[EXPR:%.+]] = sext i8 [[CV]] to i32 |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 351 | // CHECK: [[X:%.+]] = load atomic i8, i8* [[BX_ADDR:@.+]] monotonic |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 352 | // CHECK: br label %[[CONT:.+]] |
| 353 | // CHECK: [[CONT]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 354 | // CHECK: [[EXPECTED:%.+]] = phi i8 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] |
| 355 | // CHECK: [[OLD_BOOL:%.+]] = trunc i8 [[EXPECTED]] to i1 |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 356 | // CHECK: [[X_RVAL:%.+]] = zext i1 [[OLD_BOOL]] to i32 |
| 357 | // CHECK: [[AND:%.+]] = and i32 [[EXPR]], [[X_RVAL]] |
| 358 | // CHECK: [[CAST:%.+]] = icmp ne i32 [[AND]], 0 |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 359 | // CHECK: [[NEW:%.+]] = zext i1 [[CAST]] to i8 |
| 360 | // CHECK: store i8 [[NEW]], i8* [[TEMP:%.+]], |
| 361 | // CHECK: [[DESIRED:%.+]] = load i8, i8* [[TEMP]], |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 362 | // CHECK: [[RES:%.+]] = cmpxchg i8* [[BX_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] monotonic monotonic |
| 363 | // CHECK: [[OLD:%.+]] = extractvalue { i8, i1 } [[RES]], 0 |
| 364 | // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i8, i1 } [[RES]], 1 |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 365 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 366 | // CHECK: [[EXIT]] |
| 367 | // CHECK: [[OLD_I8:%.+]] = zext i1 [[OLD_BOOL]] to i8 |
| 368 | // CHECK: store i8 [[OLD_I8]], i8* @{{.+}}, |
| 369 | #pragma omp atomic capture |
| 370 | {bv = bx; bx = cv & bx;} |
| 371 | // CHECK: [[UCV:%.+]] = load i8, i8* @{{.+}}, |
| 372 | // CHECK: [[EXPR:%.+]] = zext i8 [[UCV]] to i32 |
| 373 | // CHECK: [[X:%.+]] = load atomic i8, i8* [[CX_ADDR:@.+]] seq_cst |
| 374 | // CHECK: br label %[[CONT:.+]] |
| 375 | // CHECK: [[CONT]] |
| 376 | // CHECK: [[EXPECTED:%.+]] = phi i8 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] |
| 377 | // CHECK: [[X_RVAL:%.+]] = sext i8 [[EXPECTED]] to i32 |
| 378 | // CHECK: [[ASHR:%.+]] = ashr i32 [[X_RVAL]], [[EXPR]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 379 | // CHECK: [[NEW:%.+]] = trunc i32 [[ASHR]] to i8 |
| 380 | // CHECK: store i8 [[NEW]], i8* [[TEMP:%.+]], |
| 381 | // CHECK: [[DESIRED:%.+]] = load i8, i8* [[TEMP]], |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 382 | // CHECK: [[RES:%.+]] = cmpxchg i8* [[CX_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] seq_cst seq_cst |
| 383 | // CHECK: [[OLD_X:%.+]] = extractvalue { i8, i1 } [[RES]], 0 |
| 384 | // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i8, i1 } [[RES]], 1 |
| 385 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 386 | // CHECK: [[EXIT]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 387 | // CHECK: store i8 [[NEW]], i8* @{{.+}}, |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 388 | // CHECK: call{{.*}} @__kmpc_flush( |
| 389 | #pragma omp atomic capture, seq_cst |
| 390 | {cx = cx >> ucv; cv = cx;} |
| 391 | // CHECK: [[SV:%.+]] = load i16, i16* @{{.+}}, |
| 392 | // CHECK: [[EXPR:%.+]] = sext i16 [[SV]] to i32 |
| 393 | // CHECK: [[X:%.+]] = load atomic i64, i64* [[ULX_ADDR:@.+]] monotonic |
| 394 | // CHECK: br label %[[CONT:.+]] |
| 395 | // CHECK: [[CONT]] |
| 396 | // CHECK: [[EXPECTED:%.+]] = phi i64 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] |
| 397 | // CHECK: [[X_RVAL:%.+]] = trunc i64 [[EXPECTED]] to i32 |
| 398 | // CHECK: [[SHL:%.+]] = shl i32 [[EXPR]], [[X_RVAL]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 399 | // CHECK: [[NEW:%.+]] = sext i32 [[SHL]] to i64 |
| 400 | // CHECK: store i64 [[NEW]], i64* [[TEMP:%.+]], |
| 401 | // CHECK: [[DESIRED:%.+]] = load i64, i64* [[TEMP]], |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 402 | // CHECK: [[RES:%.+]] = cmpxchg i64* [[ULX_ADDR]], i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic |
| 403 | // CHECK: [[OLD_X:%.+]] = extractvalue { i64, i1 } [[RES]], 0 |
| 404 | // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1 |
| 405 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 406 | // CHECK: [[EXIT]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 407 | // CHECK: store i64 [[NEW]], i64* @{{.+}}, |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 408 | #pragma omp atomic capture |
| 409 | ulv = ulx = sv << ulx; |
| 410 | // CHECK: [[USV:%.+]] = load i16, i16* @{{.+}}, |
| 411 | // CHECK: [[EXPR:%.+]] = zext i16 [[USV]] to i64 |
| 412 | // CHECK: [[X:%.+]] = load atomic i64, i64* [[LX_ADDR:@.+]] monotonic |
| 413 | // CHECK: br label %[[CONT:.+]] |
| 414 | // CHECK: [[CONT]] |
| 415 | // CHECK: [[EXPECTED:%.+]] = phi i64 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] |
| 416 | // CHECK: [[DESIRED:%.+]] = srem i64 [[EXPECTED]], [[EXPR]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 417 | // CHECK: store i64 [[DESIRED]], i64* [[TEMP:%.+]], |
| 418 | // CHECK: [[DESIRED:%.+]] = load i64, i64* [[TEMP]], |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 419 | // CHECK: [[RES:%.+]] = cmpxchg i64* [[LX_ADDR]], i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic |
| 420 | // CHECK: [[OLD_X:%.+]] = extractvalue { i64, i1 } [[RES]], 0 |
| 421 | // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1 |
| 422 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 423 | // CHECK: [[EXIT]] |
| 424 | // CHECK: store i64 [[EXPECTED]], i64* @{{.+}}, |
| 425 | #pragma omp atomic capture |
| 426 | {lv = lx; lx = lx % usv;} |
| 427 | // CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}} |
| 428 | // CHECK: [[OLD:%.+]] = atomicrmw or i32* @{{.+}}, i32 [[EXPR]] seq_cst |
| 429 | // CHECK: [[DESIRED:%.+]] = or i32 [[EXPR]], [[OLD]] |
| 430 | // CHECK: store i32 [[DESIRED]], i32* @{{.+}}, |
| 431 | // CHECK: call{{.*}} @__kmpc_flush( |
| 432 | #pragma omp atomic seq_cst, capture |
| 433 | {uix = iv | uix; uiv = uix;} |
| 434 | // CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}} |
| 435 | // CHECK: [[OLD:%.+]] = atomicrmw and i32* @{{.+}}, i32 [[EXPR]] monotonic |
| 436 | // CHECK: [[DESIRED:%.+]] = and i32 [[OLD]], [[EXPR]] |
| 437 | // CHECK: store i32 [[DESIRED]], i32* @{{.+}}, |
| 438 | #pragma omp atomic capture |
| 439 | iv = ix = ix & uiv; |
| 440 | // CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}}, |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 441 | // CHECK: [[BITCAST:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR:%.+]] to i8* |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 442 | // CHECK: call void @__atomic_load(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR:@.+]] to i8*), i8* [[BITCAST]], i32 0) |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 443 | // CHECK: br label %[[CONT:.+]] |
| 444 | // CHECK: [[CONT]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 445 | // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 0 |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 446 | // CHECK: [[OLD_RE:%.+]] = load i32, i32* [[X_RE_ADDR]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 447 | // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 1 |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 448 | // CHECK: [[OLD_IM:%.+]] = load i32, i32* [[X_IM_ADDR]] |
| 449 | // <Skip checks for complex calculations> |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 450 | // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR:%.+]], i32 0, i32 0 |
| 451 | // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR]], i32 0, i32 1 |
| 452 | // CHECK: store i32 %{{.+}}, i32* [[X_RE_ADDR]] |
| 453 | // CHECK: store i32 %{{.+}}, i32* [[X_IM_ADDR]] |
| 454 | // CHECK: [[EXPECTED:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR]] to i8* |
| 455 | // CHECK: [[DESIRED:%.+]] = bitcast { i32, i32 }* [[DESIRED_ADDR]] to i8* |
| 456 | // CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR]] to i8*), i8* [[EXPECTED]], i8* [[DESIRED]], i32 0, i32 0) |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 457 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 458 | // CHECK: [[EXIT]] |
| 459 | // CHECK: store i32 [[OLD_RE]], i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 0), |
| 460 | // CHECK: store i32 [[OLD_IM]], i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 1), |
| 461 | #pragma omp atomic capture |
| 462 | {civ = cix; cix = lv + cix;} |
| 463 | // CHECK: [[ULV:%.+]] = load i64, i64* @{{.+}}, |
| 464 | // CHECK: [[EXPR:%.+]] = uitofp i64 [[ULV]] to float |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 465 | // CHECK: [[X:%.+]] = load atomic i32, i32* bitcast (float* [[X_ADDR:@.+]] to i32*) monotonic |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 466 | // CHECK: br label %[[CONT:.+]] |
| 467 | // CHECK: [[CONT]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 468 | // CHECK: [[EXPECTED:%.+]] = phi i32 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] |
| 469 | // CHECK: [[TEMP_I:%.+]] = bitcast float* [[TEMP:%.+]] to i32* |
| 470 | // CHECK: [[OLD:%.+]] = bitcast i32 [[EXPECTED]] to float |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 471 | // CHECK: [[MUL:%.+]] = fmul float [[OLD]], [[EXPR]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 472 | // CHECK: store float [[MUL]], float* [[TEMP]], |
| 473 | // CHECK: [[DESIRED:%.+]] = load i32, i32* [[TEMP_I]], |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 474 | // CHECK: [[RES:%.+]] = cmpxchg i32* bitcast (float* [[X_ADDR]] to i32*), i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 475 | // CHECK: [[OLD_X:%.+]] = extractvalue { i32, i1 } [[RES]], 0 |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 476 | // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i32, i1 } [[RES]], 1 |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 477 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 478 | // CHECK: [[EXIT]] |
| 479 | // CHECK: store float [[MUL]], float* @{{.+}}, |
| 480 | #pragma omp atomic capture |
| 481 | {fx = fx * ulv; fv = fx;} |
| 482 | // CHECK: [[LLV:%.+]] = load i64, i64* @{{.+}}, |
| 483 | // CHECK: [[EXPR:%.+]] = sitofp i64 [[LLV]] to double |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 484 | // CHECK: [[X:%.+]] = load atomic i64, i64* bitcast (double* [[X_ADDR:@.+]] to i64*) monotonic |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 485 | // CHECK: br label %[[CONT:.+]] |
| 486 | // CHECK: [[CONT]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 487 | // CHECK: [[EXPECTED:%.+]] = phi i64 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] |
| 488 | // CHECK: [[TEMP_I:%.+]] = bitcast double* [[TEMP:%.+]] to i64* |
| 489 | // CHECK: [[OLD:%.+]] = bitcast i64 [[EXPECTED]] to double |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 490 | // CHECK: [[DIV:%.+]] = fdiv double [[OLD]], [[EXPR]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 491 | // CHECK: store double [[DIV]], double* [[TEMP]], |
| 492 | // CHECK: [[DESIRED:%.+]] = load i64, i64* [[TEMP_I]], |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 493 | // CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (double* [[X_ADDR]] to i64*), i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 494 | // CHECK: [[OLD_X:%.+]] = extractvalue { i64, i1 } [[RES]], 0 |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 495 | // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1 |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 496 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 497 | // CHECK: [[EXIT]] |
| 498 | // CHECK: store double [[DIV]], double* @{{.+}}, |
| 499 | #pragma omp atomic capture |
| 500 | dv = dx /= llv; |
| 501 | // CHECK: [[ULLV:%.+]] = load i64, i64* @{{.+}}, |
| 502 | // CHECK: [[EXPR:%.+]] = uitofp i64 [[ULLV]] to x86_fp80 |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 503 | // CHECK: [[X:%.+]] = load atomic i128, i128* bitcast (x86_fp80* [[X_ADDR:@.+]] to i128*) monotonic |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 504 | // CHECK: br label %[[CONT:.+]] |
| 505 | // CHECK: [[CONT]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 506 | // CHECK: [[EXPECTED:%.+]] = phi i128 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] |
| 507 | // CHECK: [[TEMP_I1:%.+]] = bitcast x86_fp80* [[TEMP1:%.+]] to i128* |
| 508 | // CHECK: store i128 [[EXPECTED]], i128* [[TEMP_I1]], |
| 509 | // CHECK: [[TEMP_I:%.+]] = bitcast x86_fp80* [[TEMP:%.+]] to i128* |
| 510 | // CHECK: store i128 [[EXPECTED]], i128* [[TEMP_I]], |
| 511 | // CHECK: [[OLD:%.+]] = load x86_fp80, x86_fp80* [[TEMP]], |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 512 | // CHECK: [[SUB:%.+]] = fsub x86_fp80 [[OLD]], [[EXPR]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 513 | // CHECK: store x86_fp80 [[SUB]], x86_fp80* [[TEMP1]] |
| 514 | // CHECK: [[DESIRED:%.+]] = load i128, i128* [[TEMP_I1]] |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 515 | // CHECK: [[RES:%.+]] = cmpxchg i128* bitcast (x86_fp80* [[X_ADDR]] to i128*), i128 [[EXPECTED]], i128 [[DESIRED]] monotonic monotonic |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 516 | // CHECK: [[OLD_X:%.+]] = extractvalue { i128, i1 } [[RES]], 0 |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 517 | // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i128, i1 } [[RES]], 1 |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 518 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 519 | // CHECK: [[EXIT]] |
| 520 | // CHECK: store x86_fp80 [[OLD]], x86_fp80* @{{.+}}, |
| 521 | #pragma omp atomic capture |
| 522 | {ldv = ldx; ldx -= ullv;} |
| 523 | // CHECK: [[EXPR:%.+]] = load float, float* @{{.+}}, |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 524 | // CHECK: [[BITCAST:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR:%.+]] to i8* |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 525 | // CHECK: call void @__atomic_load(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR:@.+]] to i8*), i8* [[BITCAST]], i32 0) |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 526 | // CHECK: br label %[[CONT:.+]] |
| 527 | // CHECK: [[CONT]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 528 | // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 0 |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 529 | // CHECK: [[X_RE:%.+]] = load i32, i32* [[X_RE_ADDR]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 530 | // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 1 |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 531 | // CHECK: [[X_IM:%.+]] = load i32, i32* [[X_IM_ADDR]] |
| 532 | // <Skip checks for complex calculations> |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 533 | // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR:%.+]], i32 0, i32 0 |
| 534 | // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR]], i32 0, i32 1 |
| 535 | // CHECK: store i32 [[NEW_RE:%.+]], i32* [[X_RE_ADDR]] |
| 536 | // CHECK: store i32 [[NEW_IM:%.+]], i32* [[X_IM_ADDR]] |
| 537 | // CHECK: [[EXPECTED:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR]] to i8* |
| 538 | // CHECK: [[DESIRED:%.+]] = bitcast { i32, i32 }* [[DESIRED_ADDR]] to i8* |
| 539 | // CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR]] to i8*), i8* [[EXPECTED]], i8* [[DESIRED]], i32 0, i32 0) |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 540 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 541 | // CHECK: [[EXIT]] |
| 542 | // CHECK: store i32 [[NEW_RE]], i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 0), |
| 543 | // CHECK: store i32 [[NEW_IM]], i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 1), |
| 544 | #pragma omp atomic capture |
| 545 | {cix = fv / cix; civ = cix;} |
| 546 | // CHECK: [[EXPR:%.+]] = load double, double* @{{.+}}, |
| 547 | // CHECK: [[X:%.+]] = load atomic i16, i16* [[X_ADDR:@.+]] monotonic |
| 548 | // CHECK: br label %[[CONT:.+]] |
| 549 | // CHECK: [[CONT]] |
| 550 | // CHECK: [[EXPECTED:%.+]] = phi i16 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] |
| 551 | // CHECK: [[CONV:%.+]] = sext i16 [[EXPECTED]] to i32 |
| 552 | // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CONV]] to double |
| 553 | // CHECK: [[ADD:%.+]] = fadd double [[X_RVAL]], [[EXPR]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 554 | // CHECK: [[NEW:%.+]] = fptosi double [[ADD]] to i16 |
| 555 | // CHECK: store i16 [[NEW]], i16* [[TEMP:%.+]], |
| 556 | // CHECK: [[DESIRED:%.+]] = load i16, i16* [[TEMP]], |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 557 | // CHECK: [[RES:%.+]] = cmpxchg i16* [[X_ADDR]], i16 [[EXPECTED]], i16 [[DESIRED]] monotonic monotonic |
| 558 | // CHECK: [[OLD_X]] = extractvalue { i16, i1 } [[RES]], 0 |
| 559 | // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i16, i1 } [[RES]], 1 |
| 560 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 561 | // CHECK: [[EXIT]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 562 | // CHECK: store i16 [[NEW]], i16* @{{.+}}, |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 563 | #pragma omp atomic capture |
| 564 | sv = sx = sx + dv; |
| 565 | // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}, |
| 566 | // CHECK: [[XI8:%.+]] = load atomic i8, i8* [[X_ADDR:@.+]] monotonic |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 567 | // CHECK: br label %[[CONT:.+]] |
| 568 | // CHECK: [[CONT]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 569 | // CHECK: [[EXPECTED:%.+]] = phi i8 [ [[XI8]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] |
| 570 | // CHECK: [[BOOL_EXPECTED:%.+]] = trunc i8 [[EXPECTED]] to i1 |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 571 | // CHECK: [[CONV:%.+]] = zext i1 [[BOOL_EXPECTED]] to i32 |
| 572 | // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CONV]] to x86_fp80 |
| 573 | // CHECK: [[MUL:%.+]] = fmul x86_fp80 [[EXPR]], [[X_RVAL]] |
| 574 | // CHECK: [[BOOL_DESIRED:%.+]] = fcmp une x86_fp80 [[MUL]], 0xK00000000000000000000 |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 575 | // CHECK: [[DESIRED:%.+]] = zext i1 [[BOOL_DESIRED]] to i8 |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 576 | // CHECK: store i8 [[DESIRED]], i8* [[TEMP:%.+]], |
| 577 | // CHECK: [[DESIRED:%.+]] = load i8, i8* [[TEMP]], |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 578 | // CHECK: [[RES:%.+]] = cmpxchg i8* [[X_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] monotonic monotonic |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 579 | // CHECK: [[OLD_X:%.+]] = extractvalue { i8, i1 } [[RES]], 0 |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 580 | // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i8, i1 } [[RES]], 1 |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 581 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 582 | // CHECK: [[EXIT]] |
| 583 | // CHECK: [[EXPECTED_I8:%.+]] = zext i1 [[BOOL_EXPECTED]] to i8 |
| 584 | // CHECK: store i8 [[EXPECTED_I8]], i8* @{{.+}}, |
| 585 | #pragma omp atomic capture |
| 586 | {bv = bx; bx = ldv * bx;} |
| 587 | // CHECK: [[EXPR_RE:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* [[CIV_ADDR:@.+]], i32 0, i32 0), |
| 588 | // CHECK: [[EXPR_IM:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* [[CIV_ADDR]], i32 0, i32 1), |
| 589 | // CHECK: [[XI8:%.+]] = load atomic i8, i8* [[X_ADDR:@.+]] monotonic |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 590 | // CHECK: br label %[[CONT:.+]] |
| 591 | // CHECK: [[CONT]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 592 | // CHECK: [[EXPECTED:%.+]] = phi i8 [ [[XI8]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] |
| 593 | // CHECK: [[BOOL_EXPECTED:%.+]] = trunc i8 [[EXPECTED]] to i1 |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 594 | // CHECK: [[X_RVAL:%.+]] = zext i1 [[BOOL_EXPECTED]] to i32 |
| 595 | // CHECK: [[SUB_RE:%.+]] = sub i32 [[EXPR_RE:%.+]], [[X_RVAL]] |
| 596 | // CHECK: [[SUB_IM:%.+]] = sub i32 [[EXPR_IM:%.+]], 0 |
| 597 | // CHECK: icmp ne i32 [[SUB_RE]], 0 |
| 598 | // CHECK: icmp ne i32 [[SUB_IM]], 0 |
| 599 | // CHECK: [[BOOL_DESIRED:%.+]] = or i1 |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 600 | // CHECK: [[DESIRED:%.+]] = zext i1 [[BOOL_DESIRED]] to i8 |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 601 | // CHECK: store i8 [[DESIRED]], i8* [[TEMP:%.+]], |
| 602 | // CHECK: [[DESIRED:%.+]] = load i8, i8* [[TEMP]], |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 603 | // CHECK: [[RES:%.+]] = cmpxchg i8* [[X_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] monotonic monotonic |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 604 | // CHECK: [[OLD_X:%.+]] = extractvalue { i8, i1 } [[RES]], 0 |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 605 | // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i8, i1 } [[RES]], 1 |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 606 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 607 | // CHECK: [[EXIT]] |
| 608 | // CHECK: [[DESIRED_I8:%.+]] = zext i1 [[BOOL_DESIRED]] to i8 |
| 609 | // CHECK: store i8 [[DESIRED_I8]], i8* @{{.+}}, |
| 610 | #pragma omp atomic capture |
| 611 | {bx = civ - bx; bv = bx;} |
| 612 | // CHECK: [[EXPR_RE:%.+]] = load float, float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 0) |
| 613 | // CHECK: [[EXPR_IM:%.+]] = load float, float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 1) |
| 614 | // CHECK: [[X:%.+]] = load atomic i16, i16* [[X_ADDR:@.+]] monotonic |
| 615 | // CHECK: br label %[[CONT:.+]] |
| 616 | // CHECK: [[CONT]] |
| 617 | // CHECK: [[EXPECTED:%.+]] = phi i16 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] |
| 618 | // CHECK: [[CONV:%.+]] = zext i16 [[EXPECTED]] to i32 |
| 619 | // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CONV]] to float |
| 620 | // <Skip checks for complex calculations> |
| 621 | // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[TEMP:%.+]], i32 0, i32 0 |
| 622 | // CHECK: [[X_RE:%.+]] = load float, float* [[X_RE_ADDR]] |
| 623 | // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[TEMP]], i32 0, i32 1 |
| 624 | // CHECK: [[X_IM:%.+]] = load float, float* [[X_IM_ADDR]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 625 | // CHECK: [[NEW:%.+]] = fptoui float [[X_RE]] to i16 |
| 626 | // CHECK: store i16 [[NEW]], i16* [[TEMP:%.+]], |
| 627 | // CHECK: [[DESIRED:%.+]] = load i16, i16* [[TEMP]], |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 628 | // CHECK: [[RES:%.+]] = cmpxchg i16* [[X_ADDR]], i16 [[EXPECTED]], i16 [[DESIRED]] monotonic monotonic |
| 629 | // CHECK: [[OLD_X]] = extractvalue { i16, i1 } [[RES]], 0 |
| 630 | // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i16, i1 } [[RES]], 1 |
| 631 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 632 | // CHECK: [[EXIT]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 633 | // CHECK: store i16 [[NEW]], i16* @{{.+}}, |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 634 | #pragma omp atomic capture |
| 635 | usv = usx /= cfv; |
| 636 | // CHECK: [[EXPR_RE:%.+]] = load double, double* getelementptr inbounds ({ double, double }, { double, double }* @{{.+}}, i32 0, i32 0) |
| 637 | // CHECK: [[EXPR_IM:%.+]] = load double, double* getelementptr inbounds ({ double, double }, { double, double }* @{{.+}}, i32 0, i32 1) |
| 638 | // CHECK: [[X:%.+]] = load atomic i64, i64* [[X_ADDR:@.+]] monotonic |
| 639 | // CHECK: br label %[[CONT:.+]] |
| 640 | // CHECK: [[CONT]] |
| 641 | // CHECK: [[EXPECTED:%.+]] = phi i64 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] |
| 642 | // CHECK: [[X_RVAL:%.+]] = sitofp i64 [[EXPECTED]] to double |
| 643 | // CHECK: [[ADD_RE:%.+]] = fadd double [[X_RVAL]], [[EXPR_RE]] |
| 644 | // CHECK: [[ADD_IM:%.+]] = fadd double 0.000000e+00, [[EXPR_IM]] |
| 645 | // CHECK: [[DESIRED:%.+]] = fptosi double [[ADD_RE]] to i64 |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 646 | // CHECK: store i64 [[DESIRED]], i64* [[TEMP:%.+]], |
| 647 | // CHECK: [[DESIRED:%.+]] = load i64, i64* [[TEMP]], |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 648 | // CHECK: [[RES:%.+]] = cmpxchg i64* [[X_ADDR]], i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic |
| 649 | // CHECK: [[OLD_X]] = extractvalue { i64, i1 } [[RES]], 0 |
| 650 | // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1 |
| 651 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 652 | // CHECK: [[EXIT]] |
| 653 | // CHECK: store i64 [[EXPECTED]], i64* @{{.+}}, |
| 654 | #pragma omp atomic capture |
| 655 | {llv = llx; llx += cdv;} |
| 656 | // CHECK: [[IDX:%.+]] = load i16, i16* @{{.+}} |
| 657 | // CHECK: load i8, i8* |
| 658 | // CHECK: [[VEC_ITEM_VAL:%.+]] = zext i1 %{{.+}} to i32 |
| 659 | // CHECK: [[I128VAL:%.+]] = load atomic i128, i128* bitcast (<4 x i32>* [[DEST:@.+]] to i128*) monotonic |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 660 | // CHECK: br label %[[CONT:.+]] |
| 661 | // CHECK: [[CONT]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 662 | // CHECK: [[OLD_I128:%.+]] = phi i128 [ [[I128VAL]], %{{.+}} ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] |
| 663 | // CHECK: [[TEMP_I:%.+]] = bitcast <4 x i32>* [[TEMP:%.+]] to i128* |
| 664 | // CHECK: store i128 [[OLD_I128]], i128* [[TEMP_I]], |
| 665 | // CHECK: [[LD:%.+]] = bitcast i128 [[OLD_I128]] to <4 x i32> |
| 666 | // CHECK: store <4 x i32> [[LD]], <4 x i32>* [[TEMP1:%.+]], |
| 667 | // CHECK: [[VEC_VAL:%.+]] = load <4 x i32>, <4 x i32>* [[TEMP1]] |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 668 | // CHECK: [[ITEM:%.+]] = extractelement <4 x i32> [[VEC_VAL]], i16 [[IDX]] |
| 669 | // CHECK: [[OR:%.+]] = or i32 [[ITEM]], [[VEC_ITEM_VAL]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 670 | // CHECK: [[VEC_VAL:%.+]] = load <4 x i32>, <4 x i32>* [[TEMP]] |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 671 | // CHECK: [[NEW_VEC_VAL:%.+]] = insertelement <4 x i32> [[VEC_VAL]], i32 [[OR]], i16 [[IDX]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 672 | // CHECK: store <4 x i32> [[NEW_VEC_VAL]], <4 x i32>* [[TEMP]] |
| 673 | // CHECK: [[NEW_I128:%.+]] = load i128, i128* [[TEMP_I]], |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 674 | // CHECK: [[RES:%.+]] = cmpxchg i128* bitcast (<4 x i32>* [[DEST]] to i128*), i128 [[OLD_I128]], i128 [[NEW_I128]] monotonic monotonic |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 675 | // CHECK: [[FAILED_OLD_VAL:%.+]] = extractvalue { i128, i1 } [[RES]], 0 |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 676 | // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i128, i1 } [[RES]], 1 |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 677 | // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] |
| 678 | // CHECK: [[EXIT]] |
| 679 | // CHECK: store i32 [[OR]], i32* @{{.+}}, |
| 680 | #pragma omp atomic capture |
| 681 | {int4x[sv] |= bv; iv = int4x[sv];} |
| 682 | // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} |
| 683 | // CHECK: [[PREV_VALUE:%.+]] = load atomic i32, i32* bitcast (i8* getelementptr (i8, i8* bitcast (%struct.BitFields* @{{.+}} to i8*), i64 4) to i32*) monotonic |
| 684 | // CHECK: br label %[[CONT:.+]] |
| 685 | // CHECK: [[CONT]] |
| 686 | // CHECK: [[OLD_BF_VALUE:%.+]] = phi i32 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 687 | // CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP1:%.+]], |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 688 | // CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP:%.+]], |
| 689 | // CHECK: [[A_LD:%.+]] = load i32, i32* [[TEMP]], |
| 690 | // CHECK: [[A_SHL:%.+]] = shl i32 [[A_LD]], 1 |
| 691 | // CHECK: [[A_ASHR:%.+]] = ashr i32 [[A_SHL]], 1 |
| 692 | // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[A_ASHR]] to x86_fp80 |
| 693 | // CHECK: [[SUB:%.+]] = fsub x86_fp80 [[X_RVAL]], [[EXPR]] |
| 694 | // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[SUB]] to i32 |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 695 | // CHECK: [[NEW_VAL:%.+]] = load i32, i32* [[TEMP1]], |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 696 | // CHECK: [[BF_VALUE:%.+]] = and i32 [[CONV]], 2147483647 |
| 697 | // CHECK: [[BF_CLEAR:%.+]] = and i32 [[NEW_VAL]], -2147483648 |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 698 | // CHECK: [[BF_SET:%.+]] = or i32 [[BF_CLEAR]], [[BF_VALUE]] |
| 699 | // CHECK: store i32 [[BF_SET]], i32* [[TEMP1]], |
| 700 | // CHECK: [[NEW_BF_VALUE:%.+]] = load i32, i32* [[TEMP1]], |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 701 | // CHECK: [[RES:%.+]] = cmpxchg i32* bitcast (i8* getelementptr (i8, i8* bitcast (%struct.BitFields* @{{.+}} to i8*), i64 4) to i32*), i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic |
| 702 | // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i32, i1 } [[RES]], 0 |
| 703 | // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i32, i1 } [[RES]], 1 |
| 704 | // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] |
| 705 | // CHECK: [[EXIT]] |
| 706 | // CHECK: store i32 [[CONV]], i32* @{{.+}}, |
| 707 | #pragma omp atomic capture |
| 708 | iv = bfx.a = bfx.a - ldv; |
| 709 | // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} |
| 710 | // CHECK: [[BITCAST:%.+]] = bitcast i32* [[LDTEMP:%.+]] to i8* |
| 711 | // CHECK: call void @__atomic_load(i64 4, i8* getelementptr (i8, i8* bitcast (%struct.BitFields_packed* @{{.+}} to i8*), i64 4), i8* [[BITCAST]], i32 0) |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 712 | // CHECK: br label %[[CONT:.+]] |
| 713 | // CHECK: [[CONT]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 714 | // CHECK: [[OLD:%.+]] = load i32, i32* [[LDTEMP]], |
| 715 | // CHECK: store i32 [[OLD]], i32* [[TEMP1:%.+]], |
| 716 | // CHECK: [[OLD:%.+]] = load i32, i32* [[LDTEMP]], |
| 717 | // CHECK: store i32 [[OLD]], i32* [[TEMP:%.+]], |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 718 | // CHECK: [[A_LD:%.+]] = load i32, i32* [[TEMP]], |
| 719 | // CHECK: [[A_SHL:%.+]] = shl i32 [[A_LD]], 1 |
| 720 | // CHECK: [[A_ASHR:%.+]] = ashr i32 [[A_SHL]], 1 |
| 721 | // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[A_ASHR]] to x86_fp80 |
| 722 | // CHECK: [[MUL:%.+]] = fmul x86_fp80 [[X_RVAL]], [[EXPR]] |
| 723 | // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[MUL]] to i32 |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 724 | // CHECK: [[NEW_VAL:%.+]] = load i32, i32* [[TEMP1]], |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 725 | // CHECK: [[BF_VALUE:%.+]] = and i32 [[CONV]], 2147483647 |
| 726 | // CHECK: [[BF_CLEAR:%.+]] = and i32 [[NEW_VAL]], -2147483648 |
| 727 | // CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 728 | // CHECK: store i32 %{{.+}}, i32* [[TEMP1]] |
| 729 | // CHECK: [[BITCAST_TEMP_OLD_BF_ADDR:%.+]] = bitcast i32* [[LDTEMP]] to i8* |
| 730 | // CHECK: [[BITCAST_TEMP_NEW_BF_ADDR:%.+]] = bitcast i32* [[TEMP1]] to i8* |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 731 | // CHECK: [[FAIL_SUCCESS:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 4, i8* getelementptr (i8, i8* bitcast (%struct.BitFields_packed* @{{.+}} to i8*), i64 4), i8* [[BITCAST_TEMP_OLD_BF_ADDR]], i8* [[BITCAST_TEMP_NEW_BF_ADDR]], i32 0, i32 0) |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 732 | // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] |
| 733 | // CHECK: [[EXIT]] |
| 734 | // CHECK: store i32 [[A_ASHR]], i32* @{{.+}}, |
| 735 | #pragma omp atomic capture |
| 736 | {iv = bfx_packed.a; bfx_packed.a *= ldv;} |
| 737 | // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} |
| 738 | // CHECK: [[PREV_VALUE:%.+]] = load atomic i32, i32* getelementptr inbounds (%struct.BitFields2, %struct.BitFields2* @{{.+}}, i32 0, i32 0) monotonic |
| 739 | // CHECK: br label %[[CONT:.+]] |
| 740 | // CHECK: [[CONT]] |
| 741 | // CHECK: [[OLD_BF_VALUE:%.+]] = phi i32 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 742 | // CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP1:%.+]], |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 743 | // CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP:%.+]], |
| 744 | // CHECK: [[A_LD:%.+]] = load i32, i32* [[TEMP]], |
| 745 | // CHECK: [[A_ASHR:%.+]] = ashr i32 [[A_LD]], 31 |
| 746 | // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[A_ASHR]] to x86_fp80 |
| 747 | // CHECK: [[SUB:%.+]] = fsub x86_fp80 [[X_RVAL]], [[EXPR]] |
| 748 | // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[SUB]] to i32 |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 749 | // CHECK: [[NEW_VAL:%.+]] = load i32, i32* [[TEMP1]], |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 750 | // CHECK: [[BF_AND:%.+]] = and i32 [[CONV]], 1 |
| 751 | // CHECK: [[BF_VALUE:%.+]] = shl i32 [[BF_AND]], 31 |
| 752 | // CHECK: [[BF_CLEAR:%.+]] = and i32 [[NEW_VAL]], 2147483647 |
| 753 | // CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 754 | // CHECK: store i32 %{{.+}}, i32* [[TEMP1]] |
| 755 | // CHECK: [[NEW_BF_VALUE:%.+]] = load i32, i32* [[TEMP1]] |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 756 | // CHECK: [[RES:%.+]] = cmpxchg i32* getelementptr inbounds (%struct.BitFields2, %struct.BitFields2* @{{.+}}, i32 0, i32 0), i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic |
| 757 | // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i32, i1 } [[RES]], 0 |
| 758 | // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i32, i1 } [[RES]], 1 |
| 759 | // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] |
| 760 | // CHECK: [[EXIT]] |
| 761 | // CHECK: store i32 [[CONV]], i32* @{{.+}}, |
| 762 | #pragma omp atomic capture |
| 763 | {bfx2.a -= ldv; iv = bfx2.a;} |
| 764 | // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} |
| 765 | // CHECK: [[PREV_VALUE:%.+]] = load atomic i8, i8* getelementptr (i8, i8* bitcast (%struct.BitFields2_packed* @{{.+}} to i8*), i64 3) monotonic |
| 766 | // CHECK: br label %[[CONT:.+]] |
| 767 | // CHECK: [[CONT]] |
| 768 | // CHECK: [[OLD_BF_VALUE:%.+]] = phi i8 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 769 | // CHECK: [[BITCAST_NEW:%.+]] = bitcast i32* %{{.+}} to i8* |
| 770 | // CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST_NEW]], |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 771 | // CHECK: [[BITCAST:%.+]] = bitcast i32* %{{.+}} to i8* |
| 772 | // CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST]], |
| 773 | // CHECK: [[A_LD:%.+]] = load i8, i8* [[BITCAST]], |
| 774 | // CHECK: [[A_ASHR:%.+]] = ashr i8 [[A_LD]], 7 |
| 775 | // CHECK: [[CAST:%.+]] = sext i8 [[A_ASHR]] to i32 |
| 776 | // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CAST]] to x86_fp80 |
| 777 | // CHECK: [[DIV:%.+]] = fdiv x86_fp80 [[EXPR]], [[X_RVAL]] |
| 778 | // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[DIV]] to i32 |
| 779 | // CHECK: [[TRUNC:%.+]] = trunc i32 [[NEW_VAL]] to i8 |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 780 | // CHECK: [[BF_LD:%.+]] = load i8, i8* [[BITCAST_NEW]], |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 781 | // CHECK: [[BF_AND:%.+]] = and i8 [[TRUNC]], 1 |
| 782 | // CHECK: [[BF_VALUE:%.+]] = shl i8 [[BF_AND]], 7 |
| 783 | // CHECK: [[BF_CLEAR:%.+]] = and i8 %{{.+}}, 127 |
| 784 | // CHECK: or i8 [[BF_CLEAR]], [[BF_VALUE]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 785 | // CHECK: store i8 %{{.+}}, i8* [[BITCAST_NEW]] |
| 786 | // CHECK: [[NEW_BF_VALUE:%.+]] = load i8, i8* [[BITCAST_NEW]] |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 787 | // CHECK: [[RES:%.+]] = cmpxchg i8* getelementptr (i8, i8* bitcast (%struct.BitFields2_packed* @{{.+}} to i8*), i64 3), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] monotonic monotonic |
| 788 | // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i8, i1 } [[RES]], 0 |
| 789 | // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i8, i1 } [[RES]], 1 |
| 790 | // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] |
| 791 | // CHECK: [[EXIT]] |
| 792 | // CHECK: store i32 [[NEW_VAL]], i32* @{{.+}}, |
| 793 | #pragma omp atomic capture |
| 794 | iv = bfx2_packed.a = ldv / bfx2_packed.a; |
| 795 | // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} |
| 796 | // CHECK: [[PREV_VALUE:%.+]] = load atomic i32, i32* getelementptr inbounds (%struct.BitFields3, %struct.BitFields3* @{{.+}}, i32 0, i32 0) monotonic |
| 797 | // CHECK: br label %[[CONT:.+]] |
| 798 | // CHECK: [[CONT]] |
| 799 | // CHECK: [[OLD_BF_VALUE:%.+]] = phi i32 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 800 | // CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP1:%.+]], |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 801 | // CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP:%.+]], |
| 802 | // CHECK: [[A_LD:%.+]] = load i32, i32* [[TEMP]], |
| 803 | // CHECK: [[A_SHL:%.+]] = shl i32 [[A_LD]], 7 |
| 804 | // CHECK: [[A_ASHR:%.+]] = ashr i32 [[A_SHL]], 18 |
| 805 | // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[A_ASHR]] to x86_fp80 |
| 806 | // CHECK: [[DIV:%.+]] = fdiv x86_fp80 [[X_RVAL]], [[EXPR]] |
| 807 | // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[DIV]] to i32 |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 808 | // CHECK: [[BF_LD:%.+]] = load i32, i32* [[TEMP1]], |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 809 | // CHECK: [[BF_AND:%.+]] = and i32 [[NEW_VAL]], 16383 |
| 810 | // CHECK: [[BF_VALUE:%.+]] = shl i32 [[BF_AND]], 11 |
| 811 | // CHECK: [[BF_CLEAR:%.+]] = and i32 %{{.+}}, -33552385 |
| 812 | // CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 813 | // CHECK: store i32 %{{.+}}, i32* [[TEMP1]] |
| 814 | // CHECK: [[NEW_BF_VALUE:%.+]] = load i32, i32* [[TEMP1]] |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 815 | // CHECK: [[RES:%.+]] = cmpxchg i32* getelementptr inbounds (%struct.BitFields3, %struct.BitFields3* @{{.+}}, i32 0, i32 0), i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic |
| 816 | // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i32, i1 } [[RES]], 0 |
| 817 | // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i32, i1 } [[RES]], 1 |
| 818 | // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] |
| 819 | // CHECK: [[EXIT]] |
| 820 | // CHECK: store i32 [[A_ASHR]], i32* @{{.+}}, |
| 821 | #pragma omp atomic capture |
| 822 | {iv = bfx3.a; bfx3.a /= ldv;} |
| 823 | // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} |
| 824 | // CHECK: [[LDTEMP:%.+]] = bitcast i32* %{{.+}} to i24* |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 825 | // CHECK: [[BITCAST:%.+]] = bitcast i24* [[LDTEMP]] to i8* |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 826 | // CHECK: call void @__atomic_load(i64 3, i8* getelementptr (i8, i8* bitcast (%struct.BitFields3_packed* @{{.+}} to i8*), i64 1), i8* [[BITCAST]], i32 0) |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 827 | // CHECK: br label %[[CONT:.+]] |
| 828 | // CHECK: [[CONT]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 829 | // CHECK: [[OLD:%.+]] = load i24, i24* [[LDTEMP]], |
| 830 | // CHECK: store i24 [[OLD]], i24* [[BITCAST2:%.+]], |
| 831 | // CHECK: [[OLD:%.+]] = load i24, i24* [[LDTEMP]], |
| 832 | // CHECK: store i24 [[OLD]], i24* [[BITCAST1:%.+]], |
| 833 | // CHECK: [[A_LD:%.+]] = load i24, i24* [[BITCAST1]], |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 834 | // CHECK: [[A_SHL:%.+]] = shl i24 [[A_LD]], 7 |
| 835 | // CHECK: [[A_ASHR:%.+]] = ashr i24 [[A_SHL]], 10 |
| 836 | // CHECK: [[CAST:%.+]] = sext i24 [[A_ASHR]] to i32 |
| 837 | // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CAST]] to x86_fp80 |
| 838 | // CHECK: [[ADD:%.+]] = fadd x86_fp80 [[X_RVAL]], [[EXPR]] |
| 839 | // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[ADD]] to i32 |
| 840 | // CHECK: [[TRUNC:%.+]] = trunc i32 [[NEW_VAL]] to i24 |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 841 | // CHECK: [[BF_LD:%.+]] = load i24, i24* [[BITCAST2]], |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 842 | // CHECK: [[BF_AND:%.+]] = and i24 [[TRUNC]], 16383 |
| 843 | // CHECK: [[BF_VALUE:%.+]] = shl i24 [[BF_AND]], 3 |
| 844 | // CHECK: [[BF_CLEAR:%.+]] = and i24 [[BF_LD]], -131065 |
| 845 | // CHECK: or i24 [[BF_CLEAR]], [[BF_VALUE]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 846 | // CHECK: store i24 %{{.+}}, i24* [[BITCAST2]] |
| 847 | // CHECK: [[BITCAST_TEMP_OLD_BF_ADDR:%.+]] = bitcast i24* [[LDTEMP]] to i8* |
| 848 | // CHECK: [[BITCAST_TEMP_NEW_BF_ADDR:%.+]] = bitcast i24* [[BITCAST2]] to i8* |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 849 | // CHECK: [[FAIL_SUCCESS:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 3, i8* getelementptr (i8, i8* bitcast (%struct.BitFields3_packed* @{{.+}} to i8*), i64 1), i8* [[BITCAST_TEMP_OLD_BF_ADDR]], i8* [[BITCAST_TEMP_NEW_BF_ADDR]], i32 0, i32 0) |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 850 | // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] |
| 851 | // CHECK: [[EXIT]] |
| 852 | // CHECK: store i32 [[NEW_VAL]], i32* @{{.+}}, |
| 853 | #pragma omp atomic capture |
| 854 | {bfx3_packed.a += ldv; iv = bfx3_packed.a;} |
| 855 | // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} |
| 856 | // CHECK: [[PREV_VALUE:%.+]] = load atomic i64, i64* bitcast (%struct.BitFields4* @{{.+}} to i64*) monotonic |
| 857 | // CHECK: br label %[[CONT:.+]] |
| 858 | // CHECK: [[CONT]] |
| 859 | // CHECK: [[OLD_BF_VALUE:%.+]] = phi i64 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 860 | // CHECK: store i64 [[OLD_BF_VALUE]], i64* [[TEMP1:%.+]], |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 861 | // CHECK: store i64 [[OLD_BF_VALUE]], i64* [[TEMP:%.+]], |
| 862 | // CHECK: [[A_LD:%.+]] = load i64, i64* [[TEMP]], |
| 863 | // CHECK: [[A_SHL:%.+]] = shl i64 [[A_LD]], 47 |
| 864 | // CHECK: [[A_ASHR:%.+]] = ashr i64 [[A_SHL:%.+]], 63 |
| 865 | // CHECK: [[A_CAST:%.+]] = trunc i64 [[A_ASHR:%.+]] to i32 |
| 866 | // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CAST:%.+]] to x86_fp80 |
| 867 | // CHECK: [[MUL:%.+]] = fmul x86_fp80 [[X_RVAL]], [[EXPR]] |
| 868 | // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[MUL]] to i32 |
| 869 | // CHECK: [[ZEXT:%.+]] = zext i32 [[NEW_VAL]] to i64 |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 870 | // CHECK: [[BF_LD:%.+]] = load i64, i64* [[TEMP1]], |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 871 | // CHECK: [[BF_AND:%.+]] = and i64 [[ZEXT]], 1 |
| 872 | // CHECK: [[BF_VALUE:%.+]] = shl i64 [[BF_AND]], 16 |
| 873 | // CHECK: [[BF_CLEAR:%.+]] = and i64 [[BF_LD]], -65537 |
| 874 | // CHECK: or i64 [[BF_CLEAR]], [[BF_VALUE]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 875 | // CHECK: store i64 %{{.+}}, i64* [[TEMP1]] |
| 876 | // CHECK: [[NEW_BF_VALUE:%.+]] = load i64, i64* [[TEMP1]] |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 877 | // CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (%struct.BitFields4* @{{.+}} to i64*), i64 [[OLD_BF_VALUE]], i64 [[NEW_BF_VALUE]] monotonic monotonic |
| 878 | // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i64, i1 } [[RES]], 0 |
| 879 | // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i64, i1 } [[RES]], 1 |
| 880 | // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] |
| 881 | // CHECK: [[EXIT]] |
| 882 | // CHECK: store i32 [[NEW_VAL]], i32* @{{.+}}, |
| 883 | #pragma omp atomic capture |
| 884 | iv = bfx4.a = bfx4.a * ldv; |
| 885 | // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} |
| 886 | // CHECK: [[PREV_VALUE:%.+]] = load atomic i8, i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2) monotonic |
| 887 | // CHECK: br label %[[CONT:.+]] |
| 888 | // CHECK: [[CONT]] |
| 889 | // CHECK: [[OLD_BF_VALUE:%.+]] = phi i8 [ [[PREV_VALUE]], %{{.+}} ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 890 | // CHECK: [[BITCAST1:%.+]] = bitcast i32* %{{.+}} to i8* |
| 891 | // CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST1]], |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 892 | // CHECK: [[BITCAST:%.+]] = bitcast i32* %{{.+}} to i8* |
| 893 | // CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST]], |
| 894 | // CHECK: [[A_LD:%.+]] = load i8, i8* [[BITCAST]], |
| 895 | // CHECK: [[A_SHL:%.+]] = shl i8 [[A_LD]], 7 |
| 896 | // CHECK: [[A_ASHR:%.+]] = ashr i8 [[A_SHL:%.+]], 7 |
| 897 | // CHECK: [[CAST:%.+]] = sext i8 [[A_ASHR:%.+]] to i32 |
| 898 | // CHECK: [[CONV:%.+]] = sitofp i32 [[CAST]] to x86_fp80 |
| 899 | // CHECK: [[SUB: %.+]] = fsub x86_fp80 [[CONV]], [[EXPR]] |
| 900 | // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[SUB:%.+]] to i32 |
| 901 | // CHECK: [[NEW_VAL:%.+]] = trunc i32 [[CONV]] to i8 |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 902 | // CHECK: [[BF_LD:%.+]] = load i8, i8* [[BITCAST1]], |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 903 | // CHECK: [[BF_VALUE:%.+]] = and i8 [[NEW_VAL]], 1 |
| 904 | // CHECK: [[BF_CLEAR:%.+]] = and i8 [[BF_LD]], -2 |
| 905 | // CHECK: or i8 [[BF_CLEAR]], [[BF_VALUE]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 906 | // CHECK: store i8 %{{.+}}, i8* [[BITCAST1]] |
| 907 | // CHECK: [[NEW_BF_VALUE:%.+]] = load i8, i8* [[BITCAST1]] |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 908 | // CHECK: [[RES:%.+]] = cmpxchg i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] monotonic monotonic |
| 909 | // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i8, i1 } [[RES]], 0 |
| 910 | // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i8, i1 } [[RES]], 1 |
| 911 | // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] |
| 912 | // CHECK: [[EXIT]] |
| 913 | // CHECK: store i32 [[CAST]], i32* @{{.+}}, |
| 914 | #pragma omp atomic capture |
| 915 | {iv = bfx4_packed.a; bfx4_packed.a -= ldv;} |
| 916 | // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} |
| 917 | // CHECK: [[PREV_VALUE:%.+]] = load atomic i64, i64* bitcast (%struct.BitFields4* @{{.+}} to i64*) monotonic |
| 918 | // CHECK: br label %[[CONT:.+]] |
| 919 | // CHECK: [[CONT]] |
| 920 | // CHECK: [[OLD_BF_VALUE:%.+]] = phi i64 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 921 | // CHECK: store i64 [[OLD_BF_VALUE]], i64* [[TEMP1:%.+]], |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 922 | // CHECK: store i64 [[OLD_BF_VALUE]], i64* [[TEMP:%.+]], |
| 923 | // CHECK: [[A_LD:%.+]] = load i64, i64* [[TEMP]], |
| 924 | // CHECK: [[A_SHL:%.+]] = shl i64 [[A_LD]], 40 |
| 925 | // CHECK: [[A_ASHR:%.+]] = ashr i64 [[A_SHL:%.+]], 57 |
| 926 | // CHECK: [[CONV:%.+]] = sitofp i64 [[A_ASHR]] to x86_fp80 |
| 927 | // CHECK: [[DIV:%.+]] = fdiv x86_fp80 [[CONV]], [[EXPR]] |
| 928 | // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[DIV]] to i64 |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 929 | // CHECK: [[BF_LD:%.+]] = load i64, i64* [[TEMP1]], |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 930 | // CHECK: [[BF_AND:%.+]] = and i64 [[CONV]], 127 |
| 931 | // CHECK: [[BF_VALUE:%.+]] = shl i64 [[BF_AND:%.+]], 17 |
| 932 | // CHECK: [[BF_CLEAR:%.+]] = and i64 [[BF_LD]], -16646145 |
| 933 | // CHECK: [[VAL:%.+]] = or i64 [[BF_CLEAR]], [[BF_VALUE]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 934 | // CHECK: store i64 [[VAL]], i64* [[TEMP1]] |
| 935 | // CHECK: [[NEW_BF_VALUE:%.+]] = load i64, i64* [[TEMP1]] |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 936 | // CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (%struct.BitFields4* @{{.+}} to i64*), i64 [[OLD_BF_VALUE]], i64 [[NEW_BF_VALUE]] monotonic monotonic |
| 937 | // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i64, i1 } [[RES]], 0 |
| 938 | // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i64, i1 } [[RES]], 1 |
| 939 | // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] |
| 940 | // CHECK: [[EXIT]] |
| 941 | // CHECK: [[NEW_VAL:%.+]] = trunc i64 [[CONV]] to i32 |
| 942 | // CHECK: store i32 [[NEW_VAL]], i32* @{{.+}}, |
| 943 | #pragma omp atomic capture |
| 944 | {bfx4.b /= ldv; iv = bfx4.b;} |
| 945 | // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} |
| 946 | // CHECK: [[PREV_VALUE:%.+]] = load atomic i8, i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2) monotonic |
| 947 | // CHECK: br label %[[CONT:.+]] |
| 948 | // CHECK: [[CONT]] |
| 949 | // CHECK: [[OLD_BF_VALUE:%.+]] = phi i8 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 950 | // CHECK: [[BITCAST1:%.+]] = bitcast i64* %{{.+}} to i8* |
| 951 | // CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST1]], |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 952 | // CHECK: [[BITCAST:%.+]] = bitcast i64* %{{.+}} to i8* |
| 953 | // CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST]], |
| 954 | // CHECK: [[A_LD:%.+]] = load i8, i8* [[BITCAST]], |
| 955 | // CHECK: [[A_ASHR:%.+]] = ashr i8 [[A_LD]], 1 |
| 956 | // CHECK: [[CAST:%.+]] = sext i8 [[A_ASHR]] to i64 |
| 957 | // CHECK: [[CONV:%.+]] = sitofp i64 [[CAST]] to x86_fp80 |
| 958 | // CHECK: [[ADD:%.+]] = fadd x86_fp80 [[CONV]], [[EXPR]] |
| 959 | // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[ADD]] to i64 |
| 960 | // CHECK: [[TRUNC:%.+]] = trunc i64 [[NEW_VAL]] to i8 |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 961 | // CHECK: [[BF_LD:%.+]] = load i8, i8* [[BITCAST1]], |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 962 | // CHECK: [[BF_AND:%.+]] = and i8 [[TRUNC]], 127 |
| 963 | // CHECK: [[BF_VALUE:%.+]] = shl i8 [[BF_AND]], 1 |
| 964 | // CHECK: [[BF_CLEAR:%.+]] = and i8 [[BF_LD]], 1 |
| 965 | // CHECK: or i8 [[BF_CLEAR]], [[BF_VALUE]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 966 | // CHECK: store i8 %{{.+}}, i8* [[BITCAST1]] |
| 967 | // CHECK: [[NEW_BF_VALUE:%.+]] = load i8, i8* [[BITCAST1]] |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 968 | // CHECK: [[RES:%.+]] = cmpxchg i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] monotonic monotonic |
| 969 | // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i8, i1 } [[RES]], 0 |
| 970 | // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i8, i1 } [[RES]], 1 |
| 971 | // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] |
| 972 | // CHECK: [[EXIT]] |
| 973 | // CHECK: [[NEW_VAL_I32:%.+]] = trunc i64 [[NEW_VAL]] to i32 |
| 974 | // CHECK: store i32 [[NEW_VAL_I32]], i32* @{{.+}}, |
| 975 | #pragma omp atomic capture |
| 976 | iv = bfx4_packed.b += ldv; |
| 977 | // CHECK: load i64, i64* |
| 978 | // CHECK: [[EXPR:%.+]] = uitofp i64 %{{.+}} to float |
| 979 | // CHECK: [[I64VAL:%.+]] = load atomic i64, i64* bitcast (<2 x float>* [[DEST:@.+]] to i64*) monotonic |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 980 | // CHECK: br label %[[CONT:.+]] |
| 981 | // CHECK: [[CONT]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 982 | // CHECK: [[OLD_I64:%.+]] = phi i64 [ [[I64VAL]], %{{.+}} ], [ [[FAILED_I64_OLD_VAL:%.+]], %[[CONT]] ] |
| 983 | // CHECK: [[BITCAST:%.+]] = bitcast <2 x float>* [[LDTEMP1:%.+]] to i64* |
| 984 | // CHECK: store i64 [[OLD_I64]], i64* [[BITCAST]], |
| 985 | // CHECK: [[OLD_VEC_VAL:%.+]] = bitcast i64 [[OLD_I64]] to <2 x float> |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 986 | // CHECK: store <2 x float> [[OLD_VEC_VAL]], <2 x float>* [[LDTEMP:%.+]], |
| 987 | // CHECK: [[VEC_VAL:%.+]] = load <2 x float>, <2 x float>* [[LDTEMP]] |
| 988 | // CHECK: [[X:%.+]] = extractelement <2 x float> [[VEC_VAL]], i64 0 |
| 989 | // CHECK: [[VEC_ITEM_VAL:%.+]] = fsub float [[EXPR]], [[X]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 990 | // CHECK: [[VEC_VAL:%.+]] = load <2 x float>, <2 x float>* [[LDTEMP1]], |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 991 | // CHECK: [[NEW_VEC_VAL:%.+]] = insertelement <2 x float> [[VEC_VAL]], float [[VEC_ITEM_VAL]], i64 0 |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame^] | 992 | // CHECK: store <2 x float> [[NEW_VEC_VAL]], <2 x float>* [[LDTEMP1]] |
| 993 | // CHECK: [[NEW_I64:%.+]] = load i64, i64* [[BITCAST]] |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 994 | // CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (<2 x float>* [[DEST]] to i64*), i64 [[OLD_I64]], i64 [[NEW_I64]] monotonic monotonic |
| 995 | // CHECK: [[FAILED_I64_OLD_VAL:%.+]] = extractvalue { i64, i1 } [[RES]], 0 |
| 996 | // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i64, i1 } [[RES]], 1 |
Alexey Bataev | 5e018f9 | 2015-04-23 06:35:10 +0000 | [diff] [blame] | 997 | // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] |
| 998 | // CHECK: [[EXIT]] |
| 999 | // CHECK: store float [[X]], float* @{{.+}}, |
| 1000 | #pragma omp atomic capture |
| 1001 | {fv = float2x.x; float2x.x = ulv - float2x.x;} |
| 1002 | // CHECK: [[EXPR:%.+]] = load double, double* @{{.+}}, |
| 1003 | // CHECK: [[OLD_VAL:%.+]] = call i32 @llvm.read_register.i32([[REG:metadata ![0-9]+]]) |
| 1004 | // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[OLD_VAL]] to double |
| 1005 | // CHECK: [[DIV:%.+]] = fdiv double [[EXPR]], [[X_RVAL]] |
| 1006 | // CHECK: [[NEW_VAL:%.+]] = fptosi double [[DIV]] to i32 |
| 1007 | // CHECK: call void @llvm.write_register.i32([[REG]], i32 [[NEW_VAL]]) |
| 1008 | // CHECK: store i32 [[NEW_VAL]], i32* @{{.+}}, |
| 1009 | // CHECK: call{{.*}} @__kmpc_flush( |
| 1010 | #pragma omp atomic capture seq_cst |
| 1011 | {rix = dv / rix; iv = rix;} |
| 1012 | // CHECK: [[OLD_VAL:%.+]] = atomicrmw xchg i32* @{{.+}}, i32 5 monotonic |
| 1013 | // CHECK: call void @llvm.write_register.i32([[REG]], i32 [[OLD_VAL]]) |
| 1014 | #pragma omp atomic capture |
| 1015 | {rix = ix; ix = 5;} |
| 1016 | return 0; |
| 1017 | } |
| 1018 | #endif |