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Adrian Prantlb16d9eb2015-01-12 22:19:22 +00001//===-- llvm/CodeGen/DwarfExpression.h - Dwarf Compile Unit ---*- C++ -*--===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains support for writing dwarf compile unit.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_LIB_CODEGEN_ASMPRINTER_DWARFEXPRESSION_H
15#define LLVM_LIB_CODEGEN_ASMPRINTER_DWARFEXPRESSION_H
16
Adrian Prantl092d9482015-01-13 23:39:11 +000017#include "llvm/IR/DebugInfo.h"
Chandler Carruthd9903882015-01-14 11:23:27 +000018#include "llvm/Support/DataTypes.h"
Adrian Prantlb16d9eb2015-01-12 22:19:22 +000019
20namespace llvm {
21
Adrian Prantla4c30d62015-01-12 23:36:56 +000022class AsmPrinter;
Adrian Prantl66f25952015-01-13 00:04:06 +000023class ByteStreamer;
Adrian Prantla4c30d62015-01-12 23:36:56 +000024class TargetRegisterInfo;
Adrian Prantl658676c2015-01-14 01:01:22 +000025class DwarfUnit;
26class DIELoc;
Adrian Prantlb16d9eb2015-01-12 22:19:22 +000027
Adrian Prantl54286bd2016-11-02 16:12:20 +000028/// Holds a DIExpression and keeps track of how many operands have been consumed
29/// so far.
30class DIExpressionCursor {
31 DIExpression::expr_op_iterator Start, End;
32public:
33 DIExpressionCursor(const DIExpression *Expr) {
34 if (!Expr) {
35 assert(Start == End);
36 return;
37 }
38 Start = Expr->expr_op_begin();
39 End = Expr->expr_op_end();
40 }
41
42 /// Consume one operation.
43 Optional<DIExpression::ExprOperand> take() {
44 if (Start == End)
45 return None;
46 return *(Start++);
47 }
48
49 /// Consume N operations.
50 void consume(unsigned N) { std::advance(Start, N); }
51
52 /// Return the current operation.
53 Optional<DIExpression::ExprOperand> peek() const {
54 if (Start == End)
55 return None;
56 return *(Start);
57 }
58
59 /// Return the next operation.
60 Optional<DIExpression::ExprOperand> peekNext() const {
61 if (Start == End)
62 return None;
63
64 auto Next = Start.getNext();
65 if (Next == End)
66 return None;
67
68 return *Next;
69 }
70 operator bool() const { return Start != End; }
71};
72
Adrian Prantlb16d9eb2015-01-12 22:19:22 +000073/// Base class containing the logic for constructing DWARF expressions
74/// independently of whether they are emitted into a DIE or into a .debug_loc
75/// entry.
76class DwarfExpression {
Adrian Prantl00dbc2a2015-01-12 22:19:26 +000077protected:
Adrian Prantla4c30d62015-01-12 23:36:56 +000078 // Various convenience accessors that extract things out of AsmPrinter.
Adrian Prantl92da14b2015-03-02 22:02:33 +000079 unsigned DwarfVersion;
Adrian Prantla4c30d62015-01-12 23:36:56 +000080
Adrian Prantlb16d9eb2015-01-12 22:19:22 +000081public:
Peter Collingbourne96c9ae62016-05-20 19:35:17 +000082 DwarfExpression(unsigned DwarfVersion) : DwarfVersion(DwarfVersion) {}
Adrian Prantl9cffbd82015-01-12 23:36:50 +000083 virtual ~DwarfExpression() {}
Adrian Prantlb16d9eb2015-01-12 22:19:22 +000084
Adrian Prantl172ab662015-01-13 23:11:07 +000085 /// Output a dwarf operand and an optional assembler comment.
86 virtual void EmitOp(uint8_t Op, const char *Comment = nullptr) = 0;
87 /// Emit a raw signed value.
Adrian Prantl51233682015-03-10 19:23:37 +000088 virtual void EmitSigned(int64_t Value) = 0;
Adrian Prantl172ab662015-01-13 23:11:07 +000089 /// Emit a raw unsigned value.
Adrian Prantl51233682015-03-10 19:23:37 +000090 virtual void EmitUnsigned(uint64_t Value) = 0;
Adrian Prantl172ab662015-01-13 23:11:07 +000091 /// Return whether the given machine register is the frame register in the
92 /// current function.
Peter Collingbourne96c9ae62016-05-20 19:35:17 +000093 virtual bool isFrameRegister(const TargetRegisterInfo &TRI, unsigned MachineReg) = 0;
Adrian Prantl00dbc2a2015-01-12 22:19:26 +000094
Adrian Prantlb16d9eb2015-01-12 22:19:22 +000095 /// Emit a dwarf register operation.
Adrian Prantl172ab662015-01-13 23:11:07 +000096 void AddReg(int DwarfReg, const char *Comment = nullptr);
Adrian Prantlb16d9eb2015-01-12 22:19:22 +000097 /// Emit an (double-)indirect dwarf register operation.
98 void AddRegIndirect(int DwarfReg, int Offset, bool Deref = false);
99
100 /// Emit a dwarf register operation for describing
101 /// - a small value occupying only part of a register or
102 /// - a register representing only part of a value.
103 void AddOpPiece(unsigned SizeInBits, unsigned OffsetInBits = 0);
104 /// Emit a shift-right dwarf expression.
105 void AddShr(unsigned ShiftBy);
Adrian Prantl3e9c8872016-04-08 00:38:37 +0000106 /// Emit a DW_OP_stack_value, if supported.
107 ///
108 /// The proper way to describe a constant value is
109 /// DW_OP_constu <const>, DW_OP_stack_value.
110 /// Unfortunately, DW_OP_stack_value was not available until DWARF-4,
111 /// so we will continue to generate DW_OP_constu <const> for DWARF-2
112 /// and DWARF-3. Technically, this is incorrect since DW_OP_const <const>
113 /// actually describes a value at a constant addess, not a constant value.
114 /// However, in the past there was no better way to describe a constant
115 /// value, so the producers and consumers started to rely on heuristics
116 /// to disambiguate the value vs. location status of the expression.
117 /// See PR21176 for more details.
118 void AddStackValue();
Adrian Prantlb16d9eb2015-01-12 22:19:22 +0000119
Adrian Prantl00dbc2a2015-01-12 22:19:26 +0000120 /// Emit an indirect dwarf register operation for the given machine register.
Adrian Prantlad768c32015-01-14 01:01:28 +0000121 /// \return false if no DWARF register exists for MachineReg.
Peter Collingbourne96c9ae62016-05-20 19:35:17 +0000122 bool AddMachineRegIndirect(const TargetRegisterInfo &TRI, unsigned MachineReg,
123 int Offset = 0);
Adrian Prantl00dbc2a2015-01-12 22:19:26 +0000124
Adrian Prantl54286bd2016-11-02 16:12:20 +0000125 /// Emit a partial DWARF register operation.
Adrian Prantl172ab662015-01-13 23:11:07 +0000126 /// \param MachineReg the register
127 /// \param PieceSizeInBits size and
128 /// \param PieceOffsetInBits offset of the piece in bits, if this is one
129 /// piece of an aggregate value.
Adrian Prantlb16d9eb2015-01-12 22:19:22 +0000130 ///
131 /// If size and offset is zero an operation for the entire
132 /// register is emitted: Some targets do not provide a DWARF
133 /// register number for every register. If this is the case, this
134 /// function will attempt to emit a DWARF register by emitting a
135 /// piece of a super-register or by piecing together multiple
136 /// subregisters that alias the register.
Adrian Prantlad768c32015-01-14 01:01:28 +0000137 ///
138 /// \return false if no DWARF register exists for MachineReg.
Peter Collingbourne96c9ae62016-05-20 19:35:17 +0000139 bool AddMachineRegPiece(const TargetRegisterInfo &TRI, unsigned MachineReg,
140 unsigned PieceSizeInBits = 0,
Adrian Prantlb16d9eb2015-01-12 22:19:22 +0000141 unsigned PieceOffsetInBits = 0);
Adrian Prantl66f25952015-01-13 00:04:06 +0000142
143 /// Emit a signed constant.
Adrian Prantl29ce7012016-06-24 21:35:09 +0000144 void AddSignedConstant(int64_t Value);
Adrian Prantl66f25952015-01-13 00:04:06 +0000145 /// Emit an unsigned constant.
Adrian Prantl29ce7012016-06-24 21:35:09 +0000146 void AddUnsignedConstant(uint64_t Value);
Adrian Prantl3e9c8872016-04-08 00:38:37 +0000147 /// Emit an unsigned constant.
Benjamin Kramerc321e532016-06-08 19:09:22 +0000148 void AddUnsignedConstant(const APInt &Value);
Adrian Prantl66f25952015-01-13 00:04:06 +0000149
Adrian Prantl54286bd2016-11-02 16:12:20 +0000150 /// Emit a machine register location while consuming the prefix of a
151 /// DwarfExpression.
Duncan P. N. Exon Smith60635e32015-04-21 18:44:06 +0000152 ///
Adrian Prantl54286bd2016-11-02 16:12:20 +0000153 /// \param PieceOffsetInBits If this is one piece out of a fragmented
Adrian Prantl092d9482015-01-13 23:39:11 +0000154 /// location, this is the offset of the piece inside the entire variable.
Adrian Prantlad768c32015-01-14 01:01:28 +0000155 /// \return false if no DWARF register exists for MachineReg.
Peter Collingbourne96c9ae62016-05-20 19:35:17 +0000156 bool AddMachineRegExpression(const TargetRegisterInfo &TRI,
Adrian Prantl54286bd2016-11-02 16:12:20 +0000157 DIExpressionCursor &Expr, unsigned MachineReg,
Adrian Prantl092d9482015-01-13 23:39:11 +0000158 unsigned PieceOffsetInBits = 0);
Adrian Prantl54286bd2016-11-02 16:12:20 +0000159 /// Emit all remaining operations in the DIExpressionCursor.
160 /// \param PieceOffsetInBits If this is one piece out of a fragmented
Adrian Prantl092d9482015-01-13 23:39:11 +0000161 /// location, this is the offset of the piece inside the entire variable.
Adrian Prantl54286bd2016-11-02 16:12:20 +0000162 void AddExpression(DIExpressionCursor &&Expr,
Duncan P. N. Exon Smith57bab0b2015-02-17 22:30:56 +0000163 unsigned PieceOffsetInBits = 0);
Adrian Prantl092d9482015-01-13 23:39:11 +0000164};
Adrian Prantl66f25952015-01-13 00:04:06 +0000165
166/// DwarfExpression implementation for .debug_loc entries.
167class DebugLocDwarfExpression : public DwarfExpression {
168 ByteStreamer &BS;
169
170public:
Peter Collingbourne96c9ae62016-05-20 19:35:17 +0000171 DebugLocDwarfExpression(unsigned DwarfVersion, ByteStreamer &BS)
172 : DwarfExpression(DwarfVersion), BS(BS) {}
Adrian Prantl66f25952015-01-13 00:04:06 +0000173
Adrian Prantl172ab662015-01-13 23:11:07 +0000174 void EmitOp(uint8_t Op, const char *Comment = nullptr) override;
Adrian Prantl51233682015-03-10 19:23:37 +0000175 void EmitSigned(int64_t Value) override;
176 void EmitUnsigned(uint64_t Value) override;
Peter Collingbourne96c9ae62016-05-20 19:35:17 +0000177 bool isFrameRegister(const TargetRegisterInfo &TRI,
178 unsigned MachineReg) override;
Adrian Prantlb16d9eb2015-01-12 22:19:22 +0000179};
Adrian Prantl658676c2015-01-14 01:01:22 +0000180
181/// DwarfExpression implementation for singular DW_AT_location.
182class DIEDwarfExpression : public DwarfExpression {
Adrian Prantl92da14b2015-03-02 22:02:33 +0000183const AsmPrinter &AP;
Adrian Prantl658676c2015-01-14 01:01:22 +0000184 DwarfUnit &DU;
185 DIELoc &DIE;
186
187public:
Adrian Prantl92da14b2015-03-02 22:02:33 +0000188 DIEDwarfExpression(const AsmPrinter &AP, DwarfUnit &DU, DIELoc &DIE);
Adrian Prantl658676c2015-01-14 01:01:22 +0000189 void EmitOp(uint8_t Op, const char *Comment = nullptr) override;
Adrian Prantl51233682015-03-10 19:23:37 +0000190 void EmitSigned(int64_t Value) override;
191 void EmitUnsigned(uint64_t Value) override;
Peter Collingbourne96c9ae62016-05-20 19:35:17 +0000192 bool isFrameRegister(const TargetRegisterInfo &TRI,
193 unsigned MachineReg) override;
Adrian Prantl658676c2015-01-14 01:01:22 +0000194};
Alexander Kornienkof00654e2015-06-23 09:49:53 +0000195}
Adrian Prantlb16d9eb2015-01-12 22:19:22 +0000196
197#endif