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gerrit-public.fairphone.software / toolchain / llvm-project / f411071d636d83f37ee98ab6a7c36c4c48c8c622 / . / llvm / test / CodeGen / AMDGPU / fmed3.ll
blob: 44889c9c472199d3c22b447064a8b4fc21a33cf1 [file] [log] [blame]
Matt Arsenaultf639c322016-01-28 20:53:42 +0000[diff] [blame]1; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=NOSNAN -check-prefix=GCN %s
2; RUN: llc -march=amdgcn -mattr=+fp-exceptions -verify-machineinstrs < %s | FileCheck -check-prefix=SNAN -check-prefix=GCN %s
3
Matt Arsenault45f82162016-07-11 23:35:48 +0000[diff] [blame]4declare i32 @llvm.amdgcn.workitem.id.x() #0
Matt Arsenaultf639c322016-01-28 20:53:42 +0000[diff] [blame]5declare float @llvm.minnum.f32(float, float) #0
6declare float @llvm.maxnum.f32(float, float) #0
7declare double @llvm.minnum.f64(double, double) #0
8declare double @llvm.maxnum.f64(double, double) #0
9
Matt Arsenaultf4110712017-01-18 02:10:08 +0000[diff] [blame^]10; GCN-LABEL: {{^}}v_test_nnan_input_fmed3_r_i_i_f32:
11; GCN: v_add_f32_e32 [[ADD:v[0-9]+]], 1.0, v{{[0-9]+}}
12; GCN: v_med3_f32 v{{[0-9]+}}, [[ADD]], 2.0, 4.0
13define void @v_test_nnan_input_fmed3_r_i_i_f32(float addrspace(1)* %out, float addrspace(1)* %aptr) #1 {
14 %tid = call i32 @llvm.amdgcn.workitem.id.x()
15 %gep0 = getelementptr float, float addrspace(1)* %aptr, i32 %tid
16 %outgep = getelementptr float, float addrspace(1)* %out, i32 %tid
17 %a = load float, float addrspace(1)* %gep0
18 %a.add = fadd nnan float %a, 1.0
19 %max = call float @llvm.maxnum.f32(float %a.add, float 2.0)
20 %med = call float @llvm.minnum.f32(float %max, float 4.0)
21
22 store float %med, float addrspace(1)* %outgep
23 ret void
24}
25
Matt Arsenaultf639c322016-01-28 20:53:42 +0000[diff] [blame]26; GCN-LABEL: {{^}}v_test_fmed3_r_i_i_f32:
27; NOSNAN: v_med3_f32 v{{[0-9]+}}, v{{[0-9]+}}, 2.0, 4.0
28
29; SNAN: v_max_f32_e32 v{{[0-9]+}}, 2.0, v{{[0-9]+}}
30; SNAN: v_min_f32_e32 v{{[0-9]+}}, 4.0, v{{[0-9]+}}
31define void @v_test_fmed3_r_i_i_f32(float addrspace(1)* %out, float addrspace(1)* %aptr) #1 {
Matt Arsenault45f82162016-07-11 23:35:48 +0000[diff] [blame]32 %tid = call i32 @llvm.amdgcn.workitem.id.x()
Matt Arsenaultf639c322016-01-28 20:53:42 +0000[diff] [blame]33 %gep0 = getelementptr float, float addrspace(1)* %aptr, i32 %tid
34 %outgep = getelementptr float, float addrspace(1)* %out, i32 %tid
35 %a = load float, float addrspace(1)* %gep0
36
37 %max = call float @llvm.maxnum.f32(float %a, float 2.0)
38 %med = call float @llvm.minnum.f32(float %max, float 4.0)
39
40 store float %med, float addrspace(1)* %outgep
41 ret void
42}
43
44; GCN-LABEL: {{^}}v_test_fmed3_r_i_i_commute0_f32:
45; NOSNAN: v_med3_f32 v{{[0-9]+}}, v{{[0-9]+}}, 2.0, 4.0
46
47; SNAN: v_max_f32_e32 v{{[0-9]+}}, 2.0, v{{[0-9]+}}
48; SNAN: v_min_f32_e32 v{{[0-9]+}}, 4.0, v{{[0-9]+}}
49define void @v_test_fmed3_r_i_i_commute0_f32(float addrspace(1)* %out, float addrspace(1)* %aptr) #1 {
Matt Arsenault45f82162016-07-11 23:35:48 +0000[diff] [blame]50 %tid = call i32 @llvm.amdgcn.workitem.id.x()
Matt Arsenaultf639c322016-01-28 20:53:42 +0000[diff] [blame]51 %gep0 = getelementptr float, float addrspace(1)* %aptr, i32 %tid
52 %outgep = getelementptr float, float addrspace(1)* %out, i32 %tid
53 %a = load float, float addrspace(1)* %gep0
54
55 %max = call float @llvm.maxnum.f32(float 2.0, float %a)
56 %med = call float @llvm.minnum.f32(float 4.0, float %max)
57
58 store float %med, float addrspace(1)* %outgep
59 ret void
60}
61
62; GCN-LABEL: {{^}}v_test_fmed3_r_i_i_commute1_f32:
63; NOSNAN: v_med3_f32 v{{[0-9]+}}, v{{[0-9]+}}, 2.0, 4.0
64
65; SNAN: v_max_f32_e32 v{{[0-9]+}}, 2.0, v{{[0-9]+}}
66; SNAN: v_min_f32_e32 v{{[0-9]+}}, 4.0, v{{[0-9]+}}
67define void @v_test_fmed3_r_i_i_commute1_f32(float addrspace(1)* %out, float addrspace(1)* %aptr) #1 {
Matt Arsenault45f82162016-07-11 23:35:48 +0000[diff] [blame]68 %tid = call i32 @llvm.amdgcn.workitem.id.x()
Matt Arsenaultf639c322016-01-28 20:53:42 +0000[diff] [blame]69 %gep0 = getelementptr float, float addrspace(1)* %aptr, i32 %tid
70 %outgep = getelementptr float, float addrspace(1)* %out, i32 %tid
71 %a = load float, float addrspace(1)* %gep0
72
73 %max = call float @llvm.maxnum.f32(float %a, float 2.0)
74 %med = call float @llvm.minnum.f32(float 4.0, float %max)
75
76 store float %med, float addrspace(1)* %outgep
77 ret void
78}
79
80; GCN-LABEL: {{^}}v_test_fmed3_r_i_i_constant_order_f32:
81; GCN: v_max_f32_e32 v{{[0-9]+}}, 4.0, v{{[0-9]+}}
82; GCN: v_min_f32_e32 v{{[0-9]+}}, 2.0, v{{[0-9]+}}
83define void @v_test_fmed3_r_i_i_constant_order_f32(float addrspace(1)* %out, float addrspace(1)* %aptr) #1 {
Matt Arsenault45f82162016-07-11 23:35:48 +0000[diff] [blame]84 %tid = call i32 @llvm.amdgcn.workitem.id.x()
Matt Arsenaultf639c322016-01-28 20:53:42 +0000[diff] [blame]85 %gep0 = getelementptr float, float addrspace(1)* %aptr, i32 %tid
86 %outgep = getelementptr float, float addrspace(1)* %out, i32 %tid
87 %a = load float, float addrspace(1)* %gep0
88
89 %max = call float @llvm.maxnum.f32(float %a, float 4.0)
90 %med = call float @llvm.minnum.f32(float %max, float 2.0)
91
92 store float %med, float addrspace(1)* %outgep
93 ret void
94}
95
96
97; GCN-LABEL: {{^}}v_test_fmed3_r_i_i_multi_use_f32:
98; GCN: v_max_f32_e32 v{{[0-9]+}}, 2.0, v{{[0-9]+}}
99; GCN: v_min_f32_e32 v{{[0-9]+}}, 4.0, v{{[0-9]+}}
100define void @v_test_fmed3_r_i_i_multi_use_f32(float addrspace(1)* %out, float addrspace(1)* %aptr) #1 {
Matt Arsenault45f82162016-07-11 23:35:48 +0000[diff] [blame]101 %tid = call i32 @llvm.amdgcn.workitem.id.x()
Matt Arsenaultf639c322016-01-28 20:53:42 +0000[diff] [blame]102 %gep0 = getelementptr float, float addrspace(1)* %aptr, i32 %tid
103 %outgep = getelementptr float, float addrspace(1)* %out, i32 %tid
104 %a = load float, float addrspace(1)* %gep0
105
106 %max = call float @llvm.maxnum.f32(float %a, float 2.0)
107 %med = call float @llvm.minnum.f32(float %max, float 4.0)
108
109 store volatile float %med, float addrspace(1)* %outgep
110 store volatile float %max, float addrspace(1)* %outgep
111 ret void
112}
113
114; GCN-LABEL: {{^}}v_test_fmed3_r_i_i_f64:
Matt Arsenault3d1c1de2016-04-14 21:58:24 +0000[diff] [blame]115; GCN: v_max_f64 {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, 2.0
116; GCN: v_min_f64 {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, 4.0
Matt Arsenaultf639c322016-01-28 20:53:42 +0000[diff] [blame]117define void @v_test_fmed3_r_i_i_f64(double addrspace(1)* %out, double addrspace(1)* %aptr) #1 {
Matt Arsenault45f82162016-07-11 23:35:48 +0000[diff] [blame]118 %tid = call i32 @llvm.amdgcn.workitem.id.x()
Matt Arsenaultf639c322016-01-28 20:53:42 +0000[diff] [blame]119 %gep0 = getelementptr double, double addrspace(1)* %aptr, i32 %tid
120 %outgep = getelementptr double, double addrspace(1)* %out, i32 %tid
121 %a = load double, double addrspace(1)* %gep0
122
123 %max = call double @llvm.maxnum.f64(double %a, double 2.0)
124 %med = call double @llvm.minnum.f64(double %max, double 4.0)
125
126 store double %med, double addrspace(1)* %outgep
127 ret void
128}
129
130; GCN-LABEL: {{^}}v_test_fmed3_r_i_i_no_nans_f32:
131; GCN: v_med3_f32 v{{[0-9]+}}, v{{[0-9]+}}, 2.0, 4.0
132define void @v_test_fmed3_r_i_i_no_nans_f32(float addrspace(1)* %out, float addrspace(1)* %aptr) #2 {
Matt Arsenault45f82162016-07-11 23:35:48 +0000[diff] [blame]133 %tid = call i32 @llvm.amdgcn.workitem.id.x()
Matt Arsenaultf639c322016-01-28 20:53:42 +0000[diff] [blame]134 %gep0 = getelementptr float, float addrspace(1)* %aptr, i32 %tid
135 %outgep = getelementptr float, float addrspace(1)* %out, i32 %tid
136 %a = load float, float addrspace(1)* %gep0
137
138 %max = call float @llvm.maxnum.f32(float %a, float 2.0)
139 %med = call float @llvm.minnum.f32(float %max, float 4.0)
140
141 store float %med, float addrspace(1)* %outgep
142 ret void
143}
144
Matt Arsenault5b39b342016-01-28 20:53:48 +0000[diff] [blame]145; GCN-LABEL: {{^}}v_test_legacy_fmed3_r_i_i_f32:
146; NOSNAN: v_med3_f32 v{{[0-9]+}}, v{{[0-9]+}}, 2.0, 4.0
147
148; SNAN: v_max_f32_e32 v{{[0-9]+}}, 2.0, v{{[0-9]+}}
149; SNAN: v_min_f32_e32 v{{[0-9]+}}, 4.0, v{{[0-9]+}}
150define void @v_test_legacy_fmed3_r_i_i_f32(float addrspace(1)* %out, float addrspace(1)* %aptr) #1 {
Matt Arsenault45f82162016-07-11 23:35:48 +0000[diff] [blame]151 %tid = call i32 @llvm.amdgcn.workitem.id.x()
Matt Arsenault5b39b342016-01-28 20:53:48 +0000[diff] [blame]152 %gep0 = getelementptr float, float addrspace(1)* %aptr, i32 %tid
153 %outgep = getelementptr float, float addrspace(1)* %out, i32 %tid
154 %a = load float, float addrspace(1)* %gep0
155
156 ; fmax_legacy
157 %cmp0 = fcmp ule float %a, 2.0
158 %max = select i1 %cmp0, float 2.0, float %a
159
160 ; fmin_legacy
161 %cmp1 = fcmp uge float %max, 4.0
162 %med = select i1 %cmp1, float 4.0, float %max
163
164 store float %med, float addrspace(1)* %outgep
165 ret void
166}
167
Matt Arsenaultf639c322016-01-28 20:53:42 +0000[diff] [blame]168attributes #0 = { nounwind readnone }
169attributes #1 = { nounwind "unsafe-fp-math"="false" "no-nans-fp-math"="false" }
170attributes #2 = { nounwind "unsafe-fp-math"="false" "no-nans-fp-math"="true" }