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gerrit-public.fairphone.software / toolchain / llvm-project / f6021ecddc73d14c94ad70938250d58f330795be / . / llvm / test / Transforms / LoopStrengthReduce / AMDGPU / lsr-postinc-pos-addrspace.ll
blob: 8c83df5843d2d3cde058b153ec9df36ee6065c7f [file] [log] [blame]
Matt Arsenault427a0fd2015-08-15 00:53:06 +0000[diff] [blame]1; RUN: llc -march=amdgcn -mcpu=bonaire -print-lsr-output < %s 2>&1 | FileCheck %s
2
3; Test various conditions where OptimizeLoopTermCond doesn't look at a
4; memory instruction use and fails to find the address space.
5
6target datalayout = "e-p:32:32-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-p24:64:64-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64"
7
8; CHECK-LABEL: @local_cmp_user(
9; CHECK: bb11:
Matt Arsenault71fa1f32016-05-18 15:48:44 +0000[diff] [blame]10; CHECK: %lsr.iv1 = phi i32 [ %lsr.iv.next2, %bb ], [ 2, %entry ]
11; CHECK: %lsr.iv = phi i32 [ %lsr.iv.next, %bb ], [ %{{[0-9]+}}, %entry ]
Matt Arsenault427a0fd2015-08-15 00:53:06 +0000[diff] [blame]12; CHECK: %lsr.iv.next = add i32 %lsr.iv, -1
Matt Arsenault71fa1f32016-05-18 15:48:44 +0000[diff] [blame]13; CHECK: %lsr.iv.next2 = add i32 %lsr.iv1, -2
Matt Arsenault7d1b6c82016-04-29 06:25:10 +0000[diff] [blame]14; CHECK: br i1
15
16; CHECK: bb:
Matt Arsenault71fa1f32016-05-18 15:48:44 +0000[diff] [blame]17; CHECK: inttoptr i32 %lsr.iv.next2 to i8 addrspace(3)*
18; CHECK: %c1 = icmp ne i8 addrspace(3)*
19define void @local_cmp_user(i32 %arg0) nounwind {
Matt Arsenault427a0fd2015-08-15 00:53:06 +0000[diff] [blame]20entry:
21 br label %bb11
22
23bb11:
24 %i = phi i32 [ 0, %entry ], [ %i.next, %bb ]
25 %ii = shl i32 %i, 1
Matt Arsenault71fa1f32016-05-18 15:48:44 +0000[diff] [blame]26 %c0 = icmp eq i32 %i, %arg0
Matt Arsenault427a0fd2015-08-15 00:53:06 +0000[diff] [blame]27 br i1 %c0, label %bb13, label %bb
28
29bb:
30 %t = load i8 addrspace(3)*, i8 addrspace(3)* addrspace(3)* undef
31 %p = getelementptr i8, i8 addrspace(3)* %t, i32 %ii
Matt Arsenault71fa1f32016-05-18 15:48:44 +0000[diff] [blame]32 %c1 = icmp ne i8 addrspace(3)* %p, null
Matt Arsenault427a0fd2015-08-15 00:53:06 +0000[diff] [blame]33 %i.next = add i32 %i, 1
34 br i1 %c1, label %bb11, label %bb13
35
36bb13:
37 unreachable
38}
39
40; CHECK-LABEL: @global_cmp_user(
Matt Arsenault7d1b6c82016-04-29 06:25:10 +0000[diff] [blame]41; CHECK: %lsr.iv1 = phi i64
42; CHECK: %lsr.iv = phi i64
Matt Arsenault427a0fd2015-08-15 00:53:06 +0000[diff] [blame]43; CHECK: %lsr.iv.next = add i64 %lsr.iv, -1
Matt Arsenault71fa1f32016-05-18 15:48:44 +0000[diff] [blame]44; CHECK: %lsr.iv.next2 = add i64 %lsr.iv1, -2
Matt Arsenault7d1b6c82016-04-29 06:25:10 +0000[diff] [blame]45; CHECK: br i1
46
47; CHECK: bb:
Matt Arsenault71fa1f32016-05-18 15:48:44 +0000[diff] [blame]48; CHECK: inttoptr i64 %lsr.iv.next2 to i8 addrspace(1)*
49; CHECK: icmp ne i8 addrspace(1)* %t
50define void @global_cmp_user(i64 %arg0) nounwind {
Matt Arsenault427a0fd2015-08-15 00:53:06 +0000[diff] [blame]51entry:
52 br label %bb11
53
54bb11:
55 %i = phi i64 [ 0, %entry ], [ %i.next, %bb ]
56 %ii = shl i64 %i, 1
Matt Arsenault71fa1f32016-05-18 15:48:44 +0000[diff] [blame]57 %c0 = icmp eq i64 %i, %arg0
Matt Arsenault427a0fd2015-08-15 00:53:06 +0000[diff] [blame]58 br i1 %c0, label %bb13, label %bb
59
60bb:
61 %t = load i8 addrspace(1)*, i8 addrspace(1)* addrspace(1)* undef
62 %p = getelementptr i8, i8 addrspace(1)* %t, i64 %ii
Matt Arsenault71fa1f32016-05-18 15:48:44 +0000[diff] [blame]63 %c1 = icmp ne i8 addrspace(1)* %p, null
Matt Arsenault427a0fd2015-08-15 00:53:06 +0000[diff] [blame]64 %i.next = add i64 %i, 1
65 br i1 %c1, label %bb11, label %bb13
66
67bb13:
68 unreachable
69}
70
71; CHECK-LABEL: @global_gep_user(
Matt Arsenault7d1b6c82016-04-29 06:25:10 +0000[diff] [blame]72; CHECK: %lsr.iv1 = phi i32 [ %lsr.iv.next2, %bb ], [ 0, %entry ]
Matt Arsenault71fa1f32016-05-18 15:48:44 +0000[diff] [blame]73; CHECK: %lsr.iv = phi i32 [ %lsr.iv.next, %bb ], [ %{{[0-9]+}}, %entry ]
Matt Arsenault427a0fd2015-08-15 00:53:06 +0000[diff] [blame]74; CHECK: %lsr.iv.next = add i32 %lsr.iv, -1
75; CHECK: %lsr.iv.next2 = add i32 %lsr.iv1, 2
Matt Arsenault7d1b6c82016-04-29 06:25:10 +0000[diff] [blame]76; CHECK: br i1
77
78; CHECK: bb:
Matt Arsenaultf42c6922016-06-15 00:11:01 +0000[diff] [blame]79; CHECK: %idxprom = sext i32 %lsr.iv1 to i64
80; CHECK: getelementptr i8, i8 addrspace(1)* %t, i64 %idxprom
Matt Arsenault71fa1f32016-05-18 15:48:44 +0000[diff] [blame]81define void @global_gep_user(i32 %arg0) nounwind {
Matt Arsenault427a0fd2015-08-15 00:53:06 +0000[diff] [blame]82entry:
83 br label %bb11
84
85bb11:
86 %i = phi i32 [ 0, %entry ], [ %i.next, %bb ]
87 %ii = shl i32 %i, 1
Matt Arsenault71fa1f32016-05-18 15:48:44 +0000[diff] [blame]88 %c0 = icmp eq i32 %i, %arg0
Matt Arsenault427a0fd2015-08-15 00:53:06 +0000[diff] [blame]89 br i1 %c0, label %bb13, label %bb
90
91bb:
92 %t = load i8 addrspace(1)*, i8 addrspace(1)* addrspace(1)* undef
93 %p = getelementptr i8, i8 addrspace(1)* %t, i32 %ii
Matt Arsenault71fa1f32016-05-18 15:48:44 +0000[diff] [blame]94 %c1 = icmp ne i8 addrspace(1)* %p, null
Matt Arsenault427a0fd2015-08-15 00:53:06 +0000[diff] [blame]95 %i.next = add i32 %i, 1
96 br i1 %c1, label %bb11, label %bb13
97
98bb13:
99 unreachable
100}
101
102; CHECK-LABEL: @global_sext_scale_user(
Matt Arsenault7d1b6c82016-04-29 06:25:10 +0000[diff] [blame]103; CHECK: %lsr.iv1 = phi i32 [ %lsr.iv.next2, %bb ], [ 0, %entry ]
Matt Arsenault71fa1f32016-05-18 15:48:44 +0000[diff] [blame]104; CHECK: %lsr.iv = phi i32 [ %lsr.iv.next, %bb ], [ %{{[0-9]+}}, %entry ]
Matt Arsenault427a0fd2015-08-15 00:53:06 +0000[diff] [blame]105; CHECK: %lsr.iv.next = add i32 %lsr.iv, -1
106; CHECK: %lsr.iv.next2 = add i32 %lsr.iv1, 2
Matt Arsenault7d1b6c82016-04-29 06:25:10 +0000[diff] [blame]107; CHECK: br i1
108
109; CHECK: bb
110; CHECK: %p = getelementptr i8, i8 addrspace(1)* %t, i64 %ii.ext
Matt Arsenault71fa1f32016-05-18 15:48:44 +0000[diff] [blame]111define void @global_sext_scale_user(i32 %arg0) nounwind {
Matt Arsenault427a0fd2015-08-15 00:53:06 +0000[diff] [blame]112entry:
113 br label %bb11
114
115bb11:
116 %i = phi i32 [ 0, %entry ], [ %i.next, %bb ]
117 %ii = shl i32 %i, 1
118 %ii.ext = sext i32 %ii to i64
Matt Arsenault71fa1f32016-05-18 15:48:44 +0000[diff] [blame]119 %c0 = icmp eq i32 %i, %arg0
Matt Arsenault427a0fd2015-08-15 00:53:06 +0000[diff] [blame]120 br i1 %c0, label %bb13, label %bb
121
122bb:
123 %t = load i8 addrspace(1)*, i8 addrspace(1)* addrspace(1)* undef
124 %p = getelementptr i8, i8 addrspace(1)* %t, i64 %ii.ext
Matt Arsenault71fa1f32016-05-18 15:48:44 +0000[diff] [blame]125 %c1 = icmp ne i8 addrspace(1)* %p, null
Matt Arsenault427a0fd2015-08-15 00:53:06 +0000[diff] [blame]126 %i.next = add i32 %i, 1
127 br i1 %c1, label %bb11, label %bb13
128
129bb13:
130 unreachable
131}