blob: 130221d38c23524e3f1538f4942d17f8dc55ff3e [file] [log] [blame]
Jakob Stoklund Olesendadea5b2010-06-29 19:15:30 +00001; RUN: llc < %s -O0 -mcpu=cortex-a8 | FileCheck %s
2target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:32:64-v128:32:128-a0:0:32-n32"
3target triple = "thumbv7-apple-darwin10"
4
5; This tests the fast register allocator's handling of partial redefines:
6;
Bob Wilson21eed472010-07-09 00:38:12 +00007; %reg1028:dsub_0<def>, %reg1028:dsub_1<def> = VLD1q64 %reg1025...
8; %reg1030:dsub_1<def> = COPY %reg1028:dsub_0<kill>
Jakob Stoklund Olesendadea5b2010-06-29 19:15:30 +00009;
Bob Wilson21eed472010-07-09 00:38:12 +000010; %reg1028 gets allocated %Q0, and if %reg1030 is reloaded for the partial
11; redef, it cannot also get %Q0.
Jakob Stoklund Olesendadea5b2010-06-29 19:15:30 +000012
Bob Wilson056b6942010-10-08 06:15:13 +000013; CHECK: vld1.64 {d16, d17}, [r{{.}}]
14; CHECK-NOT: vld1.64 {d16, d17}
Jakob Stoklund Olesen1b8e4372012-01-24 23:28:42 +000015; CHECK: vmov.f64
Jakob Stoklund Olesendadea5b2010-06-29 19:15:30 +000016
Bob Wilson21eed472010-07-09 00:38:12 +000017define i32 @test(i8* %arg) nounwind {
Jakob Stoklund Olesendadea5b2010-06-29 19:15:30 +000018entry:
Jeroen Ketemaab99b592015-09-30 10:56:37 +000019 %0 = call <2 x i64> @llvm.arm.neon.vld1.v2i64.p0i8(i8* %arg, i32 1)
Bob Wilson21eed472010-07-09 00:38:12 +000020 %1 = shufflevector <2 x i64> undef, <2 x i64> %0, <2 x i32> <i32 1, i32 2>
21 store <2 x i64> %1, <2 x i64>* undef, align 16
Jakob Stoklund Olesendadea5b2010-06-29 19:15:30 +000022 ret i32 undef
23}
Bob Wilson21eed472010-07-09 00:38:12 +000024
Jeroen Ketemaab99b592015-09-30 10:56:37 +000025declare <2 x i64> @llvm.arm.neon.vld1.v2i64.p0i8(i8*, i32) nounwind readonly