blob: ed6890e5c82c22a386ee1fbc0209fbb5a52f3142 [file] [log] [blame]
Yaxun Liu49477042017-12-02 22:13:22 +00001; RUN: llc -debug-only=machine-scheduler -march=amdgcn -mtriple=amdgcn---amdgiz -verify-machineinstrs %s -o - 2>&1| FileCheck -check-prefix=SI-NOHSA -check-prefix=FUNC -check-prefix=DEBUG %s
2target datalayout = "A5"
Nirav Dave9011da32016-09-22 17:28:43 +00003; REQUIRES: asserts
4
5; Verify that the extload generated from %eval has the default
6; alignment size (2) corresponding to the underlying memory size (i16)
7; size and not 4 corresponding to the sign-extended size (i32).
8
9; DEBUG: {{^}}# Machine code for function extload_align:
Francis Visoiu Mistrihe85b06d2018-03-14 21:52:13 +000010; DEBUG: (load 2, addrspace 5)
Nirav Dave9011da32016-09-22 17:28:43 +000011; DEBUG: {{^}}# End machine code for function extload_align.
12
Yaxun Liu49477042017-12-02 22:13:22 +000013define amdgpu_kernel void @extload_align(i32 addrspace(5)* %out, i32 %index) #0 {
14 %v0 = alloca [4 x i16], addrspace(5)
15 %a1 = getelementptr inbounds [4 x i16], [4 x i16] addrspace(5)* %v0, i32 0, i32 0
16 %a2 = getelementptr inbounds [4 x i16], [4 x i16] addrspace(5)* %v0, i32 0, i32 1
17 store i16 0, i16 addrspace(5)* %a1
18 store i16 1, i16 addrspace(5)* %a2
19 %a = getelementptr inbounds [4 x i16], [4 x i16] addrspace(5)* %v0, i32 0, i32 %index
20 %val = load i16, i16 addrspace(5)* %a
Nirav Dave9011da32016-09-22 17:28:43 +000021 %eval = sext i16 %val to i32
Yaxun Liu49477042017-12-02 22:13:22 +000022 store i32 %eval, i32 addrspace(5)* %out
Nirav Dave9011da32016-09-22 17:28:43 +000023 ret void
Matthias Braun1527baa2017-05-25 21:26:32 +000024}