blob: 939b3b06a8c79a43bdf06e8600983aba2a23565a [file] [log] [blame]
Sirish Pande69295b82012-05-10 20:20:25 +00001; RUN: llc -march=hexagon -mcpu=hexagonv5 < %s | FileCheck %s
2; Check that we generate conversion from single precision floating point
3; to 32-bit int value in IEEE complaint mode in V5.
4
5; CHECK: r{{[0-9]+}} = convert_sf2w(r{{[0-9]+}}):chop
6
7define i32 @main() nounwind {
8entry:
9 %retval = alloca i32, align 4
10 %i = alloca i32, align 4
11 %a = alloca float, align 4
12 %b = alloca float, align 4
13 %c = alloca float, align 4
14 store i32 0, i32* %retval
15 store float 0x402ECCCCC0000000, float* %a, align 4
16 store float 0x4022333340000000, float* %b, align 4
David Blaikiea79ac142015-02-27 21:17:42 +000017 %0 = load float, float* %a, align 4
18 %1 = load float, float* %b, align 4
Sirish Pande69295b82012-05-10 20:20:25 +000019 %add = fadd float %0, %1
Nirav Dave65b7ab12017-07-05 13:08:03 +000020 store volatile float %add, float* %c, align 4
21 %2 = load volatile float, float* %c, align 4
Sirish Pande69295b82012-05-10 20:20:25 +000022 %conv = fptosi float %2 to i32
23 store i32 %conv, i32* %i, align 4
David Blaikiea79ac142015-02-27 21:17:42 +000024 %3 = load i32, i32* %i, align 4
Sirish Pande69295b82012-05-10 20:20:25 +000025 ret i32 %3
26}