blob: 80907bf1c1beb986e5666f316348226d8db04d04 [file] [log] [blame]
Wei Ding0526e7f2016-06-22 18:51:08 +00001; RUN: llc -mtriple=amdgcn--amdhsa -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
2
3declare i32 @llvm.amdgcn.workitem.id.x() #0
4; GCN-LABEL: {{^}}convergent_inlineasm:
Francis Visoiu Mistrih25528d62017-12-04 17:18:51 +00005; GCN: %bb.0:
Matt Arsenault5d8eb252016-09-30 01:50:20 +00006; GCN: v_cmp_ne_u32_e64
Matt Arsenault57431c92016-08-10 19:11:42 +00007; GCN: ; mask branch
8; GCN: BB{{[0-9]+_[0-9]+}}:
Matt Arsenault3dbeefa2017-03-21 21:39:51 +00009define amdgpu_kernel void @convergent_inlineasm(i64 addrspace(1)* nocapture %arg) {
Wei Ding0526e7f2016-06-22 18:51:08 +000010bb:
11 %tmp = call i32 @llvm.amdgcn.workitem.id.x()
Matt Arsenault5d8eb252016-09-30 01:50:20 +000012 %tmp1 = tail call i64 asm "v_cmp_ne_u32_e64 $0, 0, $1", "=s,v"(i32 1) #1
Wei Ding0526e7f2016-06-22 18:51:08 +000013 %tmp2 = icmp eq i32 %tmp, 8
14 br i1 %tmp2, label %bb3, label %bb5
15
16bb3: ; preds = %bb
17 %tmp4 = getelementptr i64, i64 addrspace(1)* %arg, i32 %tmp
18 store i64 %tmp1, i64 addrspace(1)* %arg, align 8
19 br label %bb5
20
21bb5: ; preds = %bb3, %bb
22 ret void
23}
24
25; GCN-LABEL: {{^}}nonconvergent_inlineasm:
Matt Arsenault57431c92016-08-10 19:11:42 +000026; GCN: ; mask branch
27
28; GCN: BB{{[0-9]+_[0-9]+}}:
Matt Arsenault5d8eb252016-09-30 01:50:20 +000029; GCN: v_cmp_ne_u32_e64
Matt Arsenault57431c92016-08-10 19:11:42 +000030
31; GCN: BB{{[0-9]+_[0-9]+}}:
Kyle Butt7fbec9b2017-02-15 19:49:14 +000032
Matt Arsenault3dbeefa2017-03-21 21:39:51 +000033define amdgpu_kernel void @nonconvergent_inlineasm(i64 addrspace(1)* nocapture %arg) {
Wei Ding0526e7f2016-06-22 18:51:08 +000034bb:
35 %tmp = call i32 @llvm.amdgcn.workitem.id.x()
Matt Arsenault5d8eb252016-09-30 01:50:20 +000036 %tmp1 = tail call i64 asm "v_cmp_ne_u32_e64 $0, 0, $1", "=s,v"(i32 1)
Wei Ding0526e7f2016-06-22 18:51:08 +000037 %tmp2 = icmp eq i32 %tmp, 8
38 br i1 %tmp2, label %bb3, label %bb5
39
40bb3: ; preds = %bb
41 %tmp4 = getelementptr i64, i64 addrspace(1)* %arg, i32 %tmp
42 store i64 %tmp1, i64 addrspace(1)* %arg, align 8
43 br label %bb5
44
45bb5: ; preds = %bb3, %bb
46 ret void
47}
48
49attributes #0 = { nounwind readnone }
50attributes #1 = { convergent nounwind readnone }