blob: 42117b5daf76e4af990f09d8a15291913260a682 [file] [log] [blame]
Matt Arsenault13623d02014-08-15 18:42:18 +00001; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
2
3; FIXME: Check something here. Currently it seems fabs + fneg aren't
4; into 2 modifiers, although theoretically that should work.
5
6; FUNC-LABEL: @fneg_fabs_fadd_f64
7; SI: V_AND_B32_e32 v[[FABS:[0-9]+]], 0x7fffffff, {{v[0-9]+}}
8; SI: V_ADD_F64 {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, -v{{\[[0-9]+}}:[[FABS]]{{\]}}
9define void @fneg_fabs_fadd_f64(double addrspace(1)* %out, double %x, double %y) {
10 %fabs = call double @llvm.fabs.f64(double %x)
11 %fsub = fsub double -0.000000e+00, %fabs
12 %fadd = fadd double %y, %fsub
13 store double %fadd, double addrspace(1)* %out, align 8
14 ret void
15}
16
17define void @v_fneg_fabs_fadd_f64(double addrspace(1)* %out, double addrspace(1)* %xptr, double addrspace(1)* %yptr) {
18 %x = load double addrspace(1)* %xptr, align 8
19 %y = load double addrspace(1)* %xptr, align 8
20 %fabs = call double @llvm.fabs.f64(double %x)
21 %fsub = fsub double -0.000000e+00, %fabs
22 %fadd = fadd double %y, %fsub
23 store double %fadd, double addrspace(1)* %out, align 8
24 ret void
25}
26
27; FUNC-LABEL: @fneg_fabs_fmul_f64
28; SI: V_MUL_F64 {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, -|{{v\[[0-9]+:[0-9]+\]}}|
29define void @fneg_fabs_fmul_f64(double addrspace(1)* %out, double %x, double %y) {
30 %fabs = call double @llvm.fabs.f64(double %x)
31 %fsub = fsub double -0.000000e+00, %fabs
32 %fmul = fmul double %y, %fsub
33 store double %fmul, double addrspace(1)* %out, align 8
34 ret void
35}
36
37; FUNC-LABEL: @fneg_fabs_free_f64
38define void @fneg_fabs_free_f64(double addrspace(1)* %out, i64 %in) {
39 %bc = bitcast i64 %in to double
40 %fabs = call double @llvm.fabs.f64(double %bc)
41 %fsub = fsub double -0.000000e+00, %fabs
42 store double %fsub, double addrspace(1)* %out
43 ret void
44}
45
46; FUNC-LABEL: @fneg_fabs_fn_free_f64
47; SI: V_OR_B32_e32 v{{[0-9]+}}, 0x80000000, v{{[0-9]+}}
48define void @fneg_fabs_fn_free_f64(double addrspace(1)* %out, i64 %in) {
49 %bc = bitcast i64 %in to double
50 %fabs = call double @fabs(double %bc)
51 %fsub = fsub double -0.000000e+00, %fabs
52 store double %fsub, double addrspace(1)* %out
53 ret void
54}
55
56; FUNC-LABEL: @fneg_fabs_f64
57define void @fneg_fabs_f64(double addrspace(1)* %out, double %in) {
58 %fabs = call double @llvm.fabs.f64(double %in)
59 %fsub = fsub double -0.000000e+00, %fabs
60 store double %fsub, double addrspace(1)* %out, align 8
61 ret void
62}
63
64; FUNC-LABEL: @fneg_fabs_v2f64
65; SI: V_OR_B32_e32 v{{[0-9]+}}, 0x80000000, v{{[0-9]+}}
66; SI: V_OR_B32_e32 v{{[0-9]+}}, 0x80000000, v{{[0-9]+}}
67define void @fneg_fabs_v2f64(<2 x double> addrspace(1)* %out, <2 x double> %in) {
68 %fabs = call <2 x double> @llvm.fabs.v2f64(<2 x double> %in)
69 %fsub = fsub <2 x double> <double -0.000000e+00, double -0.000000e+00>, %fabs
70 store <2 x double> %fsub, <2 x double> addrspace(1)* %out
71 ret void
72}
73
74; FUNC-LABEL: @fneg_fabs_v4f64
75; SI: V_OR_B32_e32 v{{[0-9]+}}, 0x80000000, v{{[0-9]+}}
76; SI: V_OR_B32_e32 v{{[0-9]+}}, 0x80000000, v{{[0-9]+}}
77; SI: V_OR_B32_e32 v{{[0-9]+}}, 0x80000000, v{{[0-9]+}}
78; SI: V_OR_B32_e32 v{{[0-9]+}}, 0x80000000, v{{[0-9]+}}
79define void @fneg_fabs_v4f64(<4 x double> addrspace(1)* %out, <4 x double> %in) {
80 %fabs = call <4 x double> @llvm.fabs.v4f64(<4 x double> %in)
81 %fsub = fsub <4 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %fabs
82 store <4 x double> %fsub, <4 x double> addrspace(1)* %out
83 ret void
84}
85
86declare double @fabs(double) readnone
87declare double @llvm.fabs.f64(double) readnone
88declare <2 x double> @llvm.fabs.v2f64(<2 x double>) readnone
89declare <4 x double> @llvm.fabs.v4f64(<4 x double>) readnone