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gerrit-public.fairphone.software / toolchain / llvm-project / fb5482139881b9e1887243aa7ebe2d744acc3323 / . / llvm / lib / Target / Sparc / Disassembler / SparcDisassembler.cpp
blob: ae07e0b4f7479bf3916faff94682298fd4755c91 [file] [log] [blame]
Venkatraman Govindarajudfcccc72014-01-06 08:08:58 +0000[diff] [blame]1//===- SparcDisassembler.cpp - Disassembler for Sparc -----------*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file is part of the Sparc Disassembler.
11//
12//===----------------------------------------------------------------------===//
13
14#define DEBUG_TYPE "sparc-disassembler"
15
16#include "Sparc.h"
17#include "SparcRegisterInfo.h"
18#include "SparcSubtarget.h"
19#include "llvm/MC/MCDisassembler.h"
20#include "llvm/MC/MCFixedLenDisassembler.h"
21#include "llvm/Support/MemoryObject.h"
22#include "llvm/Support/TargetRegistry.h"
23
24using namespace llvm;
25
26typedef MCDisassembler::DecodeStatus DecodeStatus;
27
28namespace {
29
30/// SparcDisassembler - a disassembler class for Sparc.
31class SparcDisassembler : public MCDisassembler {
32public:
33 /// Constructor - Initializes the disassembler.
34 ///
35 SparcDisassembler(const MCSubtargetInfo &STI, const MCRegisterInfo *Info) :
36 MCDisassembler(STI), RegInfo(Info)
37 {}
38 virtual ~SparcDisassembler() {}
39
40 const MCRegisterInfo *getRegInfo() const { return RegInfo.get(); }
41
42 /// getInstruction - See MCDisassembler.
43 virtual DecodeStatus getInstruction(MCInst &instr,
44 uint64_t &size,
45 const MemoryObject &region,
46 uint64_t address,
47 raw_ostream &vStream,
48 raw_ostream &cStream) const;
49private:
50 OwningPtr<const MCRegisterInfo> RegInfo;
51};
52
53}
54
55namespace llvm {
56 extern Target TheSparcTarget, TheSparcV9Target;
57}
58
59static MCDisassembler *createSparcDisassembler(
60 const Target &T,
61 const MCSubtargetInfo &STI) {
62 return new SparcDisassembler(STI, T.createMCRegInfo(""));
63}
64
65
66extern "C" void LLVMInitializeSparcDisassembler() {
67 // Register the disassembler.
68 TargetRegistry::RegisterMCDisassembler(TheSparcTarget,
69 createSparcDisassembler);
70 TargetRegistry::RegisterMCDisassembler(TheSparcV9Target,
71 createSparcDisassembler);
72}
73
74
75
76static const unsigned IntRegDecoderTable[] = {
77 SP::G0, SP::G1, SP::G2, SP::G3,
78 SP::G4, SP::G5, SP::G6, SP::G7,
79 SP::O0, SP::O1, SP::O2, SP::O3,
80 SP::O4, SP::O5, SP::O6, SP::O7,
81 SP::L0, SP::L1, SP::L2, SP::L3,
82 SP::L4, SP::L5, SP::L6, SP::L7,
83 SP::I0, SP::I1, SP::I2, SP::I3,
84 SP::I4, SP::I5, SP::I6, SP::I7 };
85
86static const unsigned FPRegDecoderTable[] = {
87 SP::F0, SP::F1, SP::F2, SP::F3,
88 SP::F4, SP::F5, SP::F6, SP::F7,
89 SP::F8, SP::F9, SP::F10, SP::F11,
90 SP::F12, SP::F13, SP::F14, SP::F15,
91 SP::F16, SP::F17, SP::F18, SP::F19,
92 SP::F20, SP::F21, SP::F22, SP::F23,
93 SP::F24, SP::F25, SP::F26, SP::F27,
94 SP::F28, SP::F29, SP::F30, SP::F31 };
95
96static const unsigned DFPRegDecoderTable[] = {
97 SP::D0, SP::D16, SP::D1, SP::D17,
98 SP::D2, SP::D18, SP::D3, SP::D19,
99 SP::D4, SP::D20, SP::D5, SP::D21,
100 SP::D6, SP::D22, SP::D7, SP::D23,
101 SP::D8, SP::D24, SP::D9, SP::D25,
102 SP::D10, SP::D26, SP::D11, SP::D27,
103 SP::D12, SP::D28, SP::D13, SP::D29,
104 SP::D14, SP::D30, SP::D15, SP::D31 };
105
106static const unsigned QFPRegDecoderTable[] = {
Venkatraman Govindaraju0b9debf2014-01-12 04:34:31 +0000[diff] [blame]107 SP::Q0, SP::Q8, ~0U, ~0U,
108 SP::Q1, SP::Q9, ~0U, ~0U,
109 SP::Q2, SP::Q10, ~0U, ~0U,
110 SP::Q3, SP::Q11, ~0U, ~0U,
111 SP::Q4, SP::Q12, ~0U, ~0U,
112 SP::Q5, SP::Q13, ~0U, ~0U,
113 SP::Q6, SP::Q14, ~0U, ~0U,
114 SP::Q7, SP::Q15, ~0U, ~0U } ;
Venkatraman Govindarajudfcccc72014-01-06 08:08:58 +0000[diff] [blame]115
116static DecodeStatus DecodeIntRegsRegisterClass(MCInst &Inst,
117 unsigned RegNo,
118 uint64_t Address,
119 const void *Decoder) {
120 if (RegNo > 31)
121 return MCDisassembler::Fail;
122 unsigned Reg = IntRegDecoderTable[RegNo];
123 Inst.addOperand(MCOperand::CreateReg(Reg));
124 return MCDisassembler::Success;
125}
126
127static DecodeStatus DecodeI64RegsRegisterClass(MCInst &Inst,
128 unsigned RegNo,
129 uint64_t Address,
130 const void *Decoder) {
131 if (RegNo > 31)
132 return MCDisassembler::Fail;
133 unsigned Reg = IntRegDecoderTable[RegNo];
134 Inst.addOperand(MCOperand::CreateReg(Reg));
135 return MCDisassembler::Success;
136}
137
138
139static DecodeStatus DecodeFPRegsRegisterClass(MCInst &Inst,
140 unsigned RegNo,
141 uint64_t Address,
142 const void *Decoder) {
143 if (RegNo > 31)
144 return MCDisassembler::Fail;
145 unsigned Reg = FPRegDecoderTable[RegNo];
146 Inst.addOperand(MCOperand::CreateReg(Reg));
147 return MCDisassembler::Success;
148}
149
150
151static DecodeStatus DecodeDFPRegsRegisterClass(MCInst &Inst,
152 unsigned RegNo,
153 uint64_t Address,
154 const void *Decoder) {
155 if (RegNo > 31)
156 return MCDisassembler::Fail;
157 unsigned Reg = DFPRegDecoderTable[RegNo];
158 Inst.addOperand(MCOperand::CreateReg(Reg));
159 return MCDisassembler::Success;
160}
161
162
163static DecodeStatus DecodeQFPRegsRegisterClass(MCInst &Inst,
164 unsigned RegNo,
165 uint64_t Address,
166 const void *Decoder) {
167 if (RegNo > 31)
168 return MCDisassembler::Fail;
169
170 unsigned Reg = QFPRegDecoderTable[RegNo];
Venkatraman Govindaraju0b9debf2014-01-12 04:34:31 +0000[diff] [blame]171 if (Reg == ~0U)
Venkatraman Govindarajudfcccc72014-01-06 08:08:58 +0000[diff] [blame]172 return MCDisassembler::Fail;
173 Inst.addOperand(MCOperand::CreateReg(Reg));
174 return MCDisassembler::Success;
175}
176
Venkatraman Govindarajufb548212014-03-01 07:46:33 +0000[diff] [blame^]177static DecodeStatus DecodeLoadInt(MCInst &Inst, unsigned insn, uint64_t Address,
178 const void *Decoder);
179static DecodeStatus DecodeLoadFP(MCInst &Inst, unsigned insn, uint64_t Address,
180 const void *Decoder);
181static DecodeStatus DecodeLoadDFP(MCInst &Inst, unsigned insn, uint64_t Address,
182 const void *Decoder);
183static DecodeStatus DecodeLoadQFP(MCInst &Inst, unsigned insn, uint64_t Address,
184 const void *Decoder);
185static DecodeStatus DecodeStoreInt(MCInst &Inst, unsigned insn,
186 uint64_t Address, const void *Decoder);
187static DecodeStatus DecodeStoreFP(MCInst &Inst, unsigned insn,
188 uint64_t Address, const void *Decoder);
189static DecodeStatus DecodeStoreDFP(MCInst &Inst, unsigned insn,
190 uint64_t Address, const void *Decoder);
191static DecodeStatus DecodeStoreQFP(MCInst &Inst, unsigned insn,
192 uint64_t Address, const void *Decoder);
Venkatraman Govindarajudfcccc72014-01-06 08:08:58 +0000[diff] [blame]193
194#include "SparcGenDisassemblerTables.inc"
195
196/// readInstruction - read four bytes from the MemoryObject
197/// and return 32 bit word.
198static DecodeStatus readInstruction32(const MemoryObject &region,
199 uint64_t address,
200 uint64_t &size,
201 uint32_t &insn) {
202 uint8_t Bytes[4];
203
204 // We want to read exactly 4 Bytes of data.
205 if (region.readBytes(address, 4, Bytes) == -1) {
206 size = 0;
207 return MCDisassembler::Fail;
208 }
209
210 // Encoded as a big-endian 32-bit word in the stream.
211 insn = (Bytes[3] << 0) |
212 (Bytes[2] << 8) |
213 (Bytes[1] << 16) |
214 (Bytes[0] << 24);
215
216 return MCDisassembler::Success;
217}
218
219
220DecodeStatus
221SparcDisassembler::getInstruction(MCInst &instr,
222 uint64_t &Size,
223 const MemoryObject &Region,
224 uint64_t Address,
225 raw_ostream &vStream,
226 raw_ostream &cStream) const {
227 uint32_t Insn;
228
229 DecodeStatus Result = readInstruction32(Region, Address, Size, Insn);
230 if (Result == MCDisassembler::Fail)
231 return MCDisassembler::Fail;
232
233
234 // Calling the auto-generated decoder function.
235 Result = decodeInstruction(DecoderTableSparc32, instr, Insn, Address,
236 this, STI);
237
238 if (Result != MCDisassembler::Fail) {
239 Size = 4;
240 return Result;
241 }
242
243 return MCDisassembler::Fail;
244}
Venkatraman Govindarajufb548212014-03-01 07:46:33 +0000[diff] [blame^]245
246
247typedef DecodeStatus (*DecodeFunc)(MCInst &MI, unsigned insn, uint64_t Address,
248 const void *Decoder);
249
250static DecodeStatus DecodeMem(MCInst &MI, unsigned insn, uint64_t Address,
251 const void *Decoder,
252 bool isLoad, DecodeFunc DecodeRD) {
253 unsigned rd = fieldFromInstruction(insn, 25, 5);
254 unsigned rs1 = fieldFromInstruction(insn, 14, 5);
255 bool isImm = fieldFromInstruction(insn, 13, 1);
256 unsigned rs2 = 0;
257 unsigned simm13 = 0;
258 if (isImm)
259 simm13 = SignExtend32<13>(fieldFromInstruction(insn, 0, 13));
260 else
261 rs2 = fieldFromInstruction(insn, 0, 5);
262
263 DecodeStatus status;
264 if (isLoad) {
265 status = DecodeRD(MI, rd, Address, Decoder);
266 if (status != MCDisassembler::Success)
267 return status;
268 }
269
270 // Decode rs1.
271 status = DecodeIntRegsRegisterClass(MI, rs1, Address, Decoder);
272 if (status != MCDisassembler::Success)
273 return status;
274
275 // Decode imm|rs2.
276 if (isImm)
277 MI.addOperand(MCOperand::CreateImm(simm13));
278 else {
279 status = DecodeIntRegsRegisterClass(MI, rs2, Address, Decoder);
280 if (status != MCDisassembler::Success)
281 return status;
282 }
283
284 if (!isLoad) {
285 status = DecodeRD(MI, rd, Address, Decoder);
286 if (status != MCDisassembler::Success)
287 return status;
288 }
289 return MCDisassembler::Success;
290}
291
292static DecodeStatus DecodeLoadInt(MCInst &Inst, unsigned insn, uint64_t Address,
293 const void *Decoder) {
294 return DecodeMem(Inst, insn, Address, Decoder, true,
295 DecodeIntRegsRegisterClass);
296}
297
298static DecodeStatus DecodeLoadFP(MCInst &Inst, unsigned insn, uint64_t Address,
299 const void *Decoder) {
300 return DecodeMem(Inst, insn, Address, Decoder, true,
301 DecodeFPRegsRegisterClass);
302}
303
304static DecodeStatus DecodeLoadDFP(MCInst &Inst, unsigned insn, uint64_t Address,
305 const void *Decoder) {
306 return DecodeMem(Inst, insn, Address, Decoder, true,
307 DecodeDFPRegsRegisterClass);
308}
309
310static DecodeStatus DecodeLoadQFP(MCInst &Inst, unsigned insn, uint64_t Address,
311 const void *Decoder) {
312 return DecodeMem(Inst, insn, Address, Decoder, true,
313 DecodeQFPRegsRegisterClass);
314}
315
316static DecodeStatus DecodeStoreInt(MCInst &Inst, unsigned insn,
317 uint64_t Address, const void *Decoder) {
318 return DecodeMem(Inst, insn, Address, Decoder, false,
319 DecodeIntRegsRegisterClass);
320}
321
322static DecodeStatus DecodeStoreFP(MCInst &Inst, unsigned insn, uint64_t Address,
323 const void *Decoder) {
324 return DecodeMem(Inst, insn, Address, Decoder, false,
325 DecodeFPRegsRegisterClass);
326}
327
328static DecodeStatus DecodeStoreDFP(MCInst &Inst, unsigned insn,
329 uint64_t Address, const void *Decoder) {
330 return DecodeMem(Inst, insn, Address, Decoder, false,
331 DecodeDFPRegsRegisterClass);
332}
333
334static DecodeStatus DecodeStoreQFP(MCInst &Inst, unsigned insn,
335 uint64_t Address, const void *Decoder) {
336 return DecodeMem(Inst, insn, Address, Decoder, false,
337 DecodeQFPRegsRegisterClass);
338}