| Tom Stellard | 40ce8af | 2015-01-28 16:04:26 +0000 | [diff] [blame] | 1 | ; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=kaveri | FileCheck --check-prefix=HSA %s |
| Tom Stellard | 347ac79 | 2015-06-26 21:15:07 +0000 | [diff] [blame] | 2 | ; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=kaveri -filetype=obj | llvm-readobj -s -sd | FileCheck --check-prefix=ELF %s |
| 3 | ; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=kaveri | llvm-mc -filetype=obj -triple amdgcn--amdhsa -mcpu=kaveri | llvm-readobj -s -sd | FileCheck %s --check-prefix=ELF |
| 4 | |
| 5 | ; The SHT_NOTE section contains the output from the .hsa_code_object_* |
| 6 | ; directives. |
| 7 | |
| 8 | ; ELF: SHT_NOTE |
| 9 | ; ELF: 0000: 04000000 08000000 01000000 414D4400 |
| 10 | ; ELF: 0010: 01000000 00000000 04000000 1B000000 |
| 11 | ; ELF: 0020: 03000000 414D4400 04000700 07000000 |
| 12 | ; ELF: 0030: 00000000 00000000 414D4400 414D4447 |
| 13 | ; ELF: 0040: 50550000 |
| 14 | |
| 15 | ; HSA: .hsa_code_object_version 1,0 |
| 16 | ; HSA: .hsa_code_object_isa 7,0,0,"AMD","AMDGPU" |
| Tom Stellard | 794c8c0 | 2014-12-02 17:05:41 +0000 | [diff] [blame] | 17 | |
| Tom Stellard | f151a45 | 2015-06-26 21:14:58 +0000 | [diff] [blame] | 18 | ; HSA: {{^}}simple: |
| Tom Stellard | ff7416b | 2015-06-26 21:58:31 +0000 | [diff] [blame^] | 19 | ; HSA: .amd_kernel_code_t |
| 20 | ; HSA: .end_amd_kernel_code_t |
| Tom Stellard | b5798b0 | 2015-06-26 21:15:03 +0000 | [diff] [blame] | 21 | ; HSA: s_load_dwordx2 s[{{[0-9]+:[0-9]+}}], s[0:1], 0x0 |
| Tom Stellard | 794c8c0 | 2014-12-02 17:05:41 +0000 | [diff] [blame] | 22 | ; Make sure we are setting the ATC bit: |
| 23 | ; HSA: s_mov_b32 s[[HI:[0-9]]], 0x100f000 |
| 24 | ; HSA: buffer_store_dword v{{[0-9]+}}, s[0:[[HI]]], 0 |
| 25 | |
| 26 | define void @simple(i32 addrspace(1)* %out) { |
| 27 | entry: |
| 28 | store i32 0, i32 addrspace(1)* %out |
| 29 | ret void |
| 30 | } |