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gerrit-public.fairphone.software / toolchain / llvm-project / 000c5af3e65bcd32305d51a32ccdbe6fdf7d3fdf / llvm / lib / Target / AMDGPU / AMDGPUSubtarget.cpp
  1. 000c5af AMDGPU: Add skeleton GlobalIsel implementation by Tom Stellard · 10 years ago
  2. df3a20c AMDGPU: Add a shader calling convention by Nicolai Haehnle · 10 years ago
  3. 0bc954e AMDGPU/SI: Enable lanemask tracking in misched by Tom Stellard · 10 years ago
  4. 3a61985 AMDGPU: More bits of frame index are known to be zero by Matt Arsenault · 10 years ago
  5. 9d82ee7 AMDGPU: Split vi-insts subtarget feature by Matt Arsenault · 10 years ago
  6. 61738cb AMDGPU: Implement readcyclecounter by Matt Arsenault · 10 years ago
  7. 24ee078 AMDGPU: Set element_size in private resource descriptor by Matt Arsenault · 10 years ago
  8. f639c32 AMDGPU: Match some med3 patterns by Matt Arsenault · 10 years ago
  9. b22828f AMDGPU: Fix default device handling by Matt Arsenault · 10 years ago
  10. 2a93bb6 AMDGPU: Remove Feature64BitPtr by Matt Arsenault · 10 years ago
  11. de008d3 AMDGPU/SI: Pass whether to use the SI scheduler via Target Attribute by Tom Stellard · 10 years ago
  12. e83690c AMDGPU: Add subtarget feature for instruction rates by Matt Arsenault · 10 years ago
  13. 5b50497 AMDGPU: add +xnack feature by Nicolai Haehnle · 10 years ago
  14. b41574a AMDGPU/SI: Use flat for global load/store when targeting HSA by Changpeng Fang · 10 years ago
  15. 4b0d24c Revert "AMDGPU/SI: Use flat for global load/store when targeting HSA" by Rafael Espindola · 10 years ago
  16. 9b8a9be AMDGPU/SI: Use flat for global load/store when targeting HSA by Changpeng Fang · 10 years ago
  17. f59e538 AMDGPU: Cleanup includes by Matt Arsenault · 10 years ago
  18. 0c90e95 AMDGPU: Create emergency stack slots during frame lowering by Matt Arsenault · 10 years ago
  19. 50f1723 Revert r247692: Replace Triple with a new TargetTuple in MCTargetDesc/* and related. NFC. by Daniel Sanders · 10 years ago
  20. 153010c Re-commit r247683: Replace Triple with a new TargetTuple in MCTargetDesc/* and related. NFC. by Daniel Sanders · 10 years ago
  21. c40de48 Revert r247684 - Replace Triple with a new TargetTuple ... by Daniel Sanders · 10 years ago
  22. 18d4b0d Replace Triple with a new TargetTuple in MCTargetDesc/* and related. NFC. by Daniel Sanders · 10 years ago
  23. c98ee20 AMDPGU/SI: Use AssertZext node to mask high bit for scratch offsets by Tom Stellard · 10 years ago
  24. 706f930 AMDGPU/SI: Add debugging subtarget feature for DS offsets by Matt Arsenault · 10 years ago
  25. 347ac79 AMDGPU/SI: Add hsa code object directives by Tom Stellard · 10 years ago
  26. 45bb48e R600 -> AMDGPU rename by Tom Stellard · 10 years ago[Renamed from llvm/lib/Target/R600/AMDGPUSubtarget.cpp]
  27. a73f1fd Replace string GNU Triples with llvm::Triple in MCSubtargetInfo and create*MCSubtargetInfo(). NFC. by Daniel Sanders · 10 years ago
  28. ec87f84 R600/SI: Fix bug with v_interp_p1_f32 instructions on 16 bank lds chips by Tom Stellard · 10 years ago
  29. d1f0f02 R600/SI: Add assembler support for all CI and VI VOP1 instructions by Tom Stellard · 11 years ago
  30. d7e6f13 R600/SI: Initial support for assembler and inline assembly by Tom Stellard · 11 years ago
  31. 4d00dd2 R600/SI: Limit SGPRs to 80 on Tonga and Iceland by Marek Olsak · 11 years ago
  32. 111de89 80-column fixups. by Eric Christopher · 11 years ago
  33. 7792e32 Reuse a bunch of cached subtargets and remove getSubtarget calls by Eric Christopher · 11 years ago
  34. b035a57 R600/SI: Add subtarget feature for if f32 fma is fast by Matt Arsenault · 11 years ago
  35. 83f0bce R600/SI: Define a schedule model and enable the generic machine scheduler by Tom Stellard · 11 years ago
  36. 40ce8af R600: Move DataLayout to AMDGPUTargetMachine by Tom Stellard · 11 years ago
  37. eba5648 R600: Use a Southern Islands GPU as the default for the amdgcn target by Tom Stellard · 11 years ago
  38. 8b77065 Move DataLayout back to the TargetMachine from TargetSubtargetInfo by Eric Christopher · 11 years ago
  39. e99fb65 R600/SI: Add subtarget feature to enable VGPR spilling for all shader types by Tom Stellard · 11 years ago
  40. d990388 [cleanup] Re-sort all the #include lines in LLVM using utils/sort_includes.py. by Chandler Carruth · 11 years ago
  41. b8fd6ef R600/SI: Emit amd_kernel_code_t header for AMDGPU environment by Tom Stellard · 11 years ago
  42. 794c8c0 R600/SI: Set the ATC bit on all resource descriptors for the HSA runtime by Tom Stellard · 11 years ago
  43. 4103328 R600/SI: Add load / store machine optimizer pass. by Matt Arsenault · 11 years ago
  44. 3f98140 R600/SI: Add preliminary support for flat address space by Matt Arsenault · 11 years ago
  45. 515c24b Correct comment by Matt Arsenault · 11 years ago
  46. 34aaf97 Move the R600 intrinsic support back to the target machine - there's by Eric Christopher · 11 years ago
  47. ac4b69e Move R600 subtarget dependent variables onto the subtarget. by Eric Christopher · 11 years ago
  48. f171cf2 R600: Add denormal handling subtarget features. by Matt Arsenault · 11 years ago
  49. d9a23ab R600: Add option to disable promote alloca by Matt Arsenault · 11 years ago
  50. d782d05 R600: Move trivial getters into header, use initializer list by Matt Arsenault · 11 years ago
  51. 880a80a R600: Use LDS and vectors for private memory by Tom Stellard · 11 years ago
  52. 2e59a45 R600: Move AMDGPUInstrInfo from AMDGPUTargetMachine into AMDGPUSubtarget by Tom Stellard · 11 years ago
  53. e01fdff R600: Remove unused function AMDGPUSubtarget::getDefaultSize() by Tom Stellard · 12 years ago
  54. e96dd89 [Modules] Make Support/Debug.h modular. This requires it to not change by Chandler Carruth · 12 years ago
  55. 348273d R600: Recommit 199842: Add work-around for the CF stack entry HW bug by Tom Stellard · 12 years ago
  56. 31e1638 Revert "R600: Add work-around for the CF stack entry HW bug" by Tom Stellard · 12 years ago
  57. e89373e R600: Add work-around for the CF stack entry HW bug by Tom Stellard · 12 years ago
  58. a40f971 R600: Refactor stack size calculation by Tom Stellard · 12 years ago
  59. 8c347b0 R600: Add wavefront size property to the subtargets v2 by Tom Stellard · 12 years ago
  60. ceb0c49 Turn AMDGPUSubtarget::getDataLayout into a static function. by Rafael Espindola · 12 years ago
  61. 99952a0 Fix an index array check. by Eric Christopher · 12 years ago
  62. 66df8a2 R600: Enable the IR structurizer by default by Tom Stellard · 12 years ago
  63. 783893a R600: Add a SubtargetFeatture for disabling the ifcvt pass. by Tom Stellard · 12 years ago
  64. ed0ceec R600: Use StructurizeCFGPass for non SI targets by Tom Stellard · 12 years ago
  65. fd15582 SelectionDAG: Use correct pointer size when lowering function arguments v2 by Tom Stellard · 12 years ago
  66. 8b2a3d1 Remove unused stdio.h includes by Dmitri Gribenko · 12 years ago
  67. a6c6e1b R600: Rework subtarget info and remove AMDILDevice classes by Tom Stellard · 12 years ago
  68. 3498e4f R600: Fix the fetch limits for R600 generation GPUs by Tom Stellard · 12 years ago
  69. ae8faf2 Temporary fix to get rid of gcc warning. by Patrik Hagglund · 12 years ago
  70. f9f4e1e R600: Factorize Fetch size limit inside AMDGPUSubTarget by Vincent Lejeune · 12 years ago
  71. c299164 R600: Add FetchInst bit to instruction defs to denote vertex/tex instructions by Vincent Lejeune · 13 years ago
  72. 75aadc2 Add R600 backend by Tom Stellard · 13 years ago