1. 84db5d9 AMDGPU/SI: Fix read2 merging into a super register. by Matt Arsenault · 10 years ago
  2. 5010ebf Make TargetTransformInfo keeping a reference to the Module DataLayout by Mehdi Amini · 10 years ago
  3. db7781c AMDGPU: Run SIInsertWaits as pre-emit pass by Matt Arsenault · 10 years ago
  4. 45bb48e R600 -> AMDGPU rename by Tom Stellard · 10 years ago[Renamed (99%) from llvm/lib/Target/R600/AMDGPUTargetMachine.cpp]
  5. 3e5de88 Replace string GNU Triples with llvm::Triple in TargetMachine. NFC. by Daniel Sanders · 10 years ago
  6. ed64d62 Replace string GNU Triples with llvm::Triple in computeDataLayout(). NFC. by Daniel Sanders · 10 years ago
  7. a73f1fd Replace string GNU Triples with llvm::Triple in MCSubtargetInfo and create*MCSubtargetInfo(). NFC. by Daniel Sanders · 10 years ago
  8. 28d13a4 R600/SI: add pass to mark CF live ranges as non-spillable by Tom Stellard · 10 years ago
  9. 8024d03 Grab a subtarget off of an AMDGPUTargetMachine rather than a by Eric Christopher · 11 years ago
  10. 93e1ea1 Move the DataLayout to the generic TargetMachine, making it mandatory. by Mehdi Amini · 11 years ago
  11. 30d69c2 [PM] Remove the old 'PassManager.h' header file at the top level of by Chandler Carruth · 11 years ago
  12. de5b7b1 R600: Split AMDGPUPassConfig into R600PassConfig and GCNPassConfig by Tom Stellard · 11 years ago
  13. c65b360 R600: Create an R600TargetMachine for pre-gcn GPUs by Tom Stellard · 11 years ago
  14. 8b04c0d [multiversion] Switch all of the targets over to use the by Chandler Carruth · 11 years ago
  15. 93dcdc4 [PM] Switch the TargetMachine interface from accepting a pass manager by Chandler Carruth · 11 years ago
  16. 705b185 [PM] Change the core design of the TTI analysis to use a polymorphic by Chandler Carruth · 11 years ago
  17. 40ce8af R600: Move DataLayout to AMDGPUTargetMachine by Tom Stellard · 11 years ago
  18. 42fb60e R600/SI: Spill VGPRs to scratch space for compute shaders by Tom Stellard · 11 years ago
  19. 49f8bfd R600/SI: Add a stub GCNTargetMachine by Tom Stellard · 11 years ago
  20. 7e37a5f [CodeGen] Add print and verify pass after each MachineFunctionPass by default by Matthias Braun · 11 years ago
  21. 01c7361 This reverts commit r224043 and r224042. by Rafael Espindola · 11 years ago
  22. a7c82a9 [CodeGen] Add print and verify pass after each MachineFunctionPass by default by Matthias Braun · 11 years ago
  23. 05cd445 R600/SI: Move SIInsertWaits into AMDGPUPassConfig::addPreSched2() by Tom Stellard · 11 years ago
  24. 92105e8 R600/SI: Don't run SI passes on R600 subtargets by Tom Stellard · 11 years ago
  25. 691ae3d R600/SI: Fix running SILowerI1Copies a second time by Matt Arsenault · 11 years ago
  26. 6596ba7 R600/SI: Add SIFoldOperands pass by Tom Stellard · 11 years ago
  27. 162c101 R600/SI: Move SIFixSGPRCopies to inst selector passes by Matt Arsenault · 11 years ago
  28. a271932 This patch changes the ownership of TLOF from TargetLoweringBase to TargetMachine so that different subtargets could share the TLOF effectively by Aditya Nandakumar · 11 years ago
  29. 5cbb53c Reapply: R600: Make sure to inline all internal functions by Tom Stellard · 11 years ago
  30. 9abe268 Revert "R600: Make sure to inline all internal functions" by Reid Kleckner · 11 years ago
  31. aa73831 R600: Make sure to inline all internal functions by Tom Stellard · 11 years ago
  32. 4103328 R600/SI: Add load / store machine optimizer pass. by Matt Arsenault · 11 years ago
  33. 60024a0 R600/SI: Fix the FixSGPRLiveRanges pass by Tom Stellard · 11 years ago
  34. 8c90fd7 Add override to overriden virtual methods, remove virtual keywords. by Benjamin Kramer · 11 years ago
  35. 34aaf97 Move the R600 intrinsic support back to the target machine - there's by Eric Christopher · 11 years ago
  36. ac4b69e Move R600 subtarget dependent variables onto the subtarget. by Eric Christopher · 11 years ago
  37. 1aaad69 R600/SI: Add instruction shrinking pass by Tom Stellard · 11 years ago
  38. b02094e R600/SI: Use scratch memory for large private arrays by Tom Stellard · 11 years ago
  39. d9a23ab R600: Add option to disable promote alloca by Matt Arsenault · 11 years ago
  40. b2de94e R600/SI: Adjsut SGPR live ranges before register allocation by Tom Stellard · 11 years ago
  41. 880a80a R600: Use LDS and vectors for private memory by Tom Stellard · 11 years ago
  42. bc5b537 R600: Remove AMDIL instruction and register definitions by Tom Stellard · 11 years ago
  43. 2e59a45 R600: Move AMDGPUInstrInfo from AMDGPUTargetMachine into AMDGPUSubtarget by Tom Stellard · 11 years ago
  44. 46b51b7 R600: Add definition for flat address space ID. by Matt Arsenault · 11 years ago
  45. 1bd8072 R600/SI: Use VALU instructions for copying i1 values by Tom Stellard · 12 years ago
  46. 5656db4 [C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. R600 edition by Craig Topper · 12 years ago
  47. 062a2ba [C++] Use 'nullptr'. Target edition. by Craig Topper · 12 years ago
  48. 422b93d Use unique_ptr to manage objects owned by the ScheduleDAGMI. by David Blaikie · 12 years ago
  49. 1583409 R600/SI: Handle MUBUF instructions in SIInstrInfo::moveToVALU() by Tom Stellard · 12 years ago
  50. d0ce2bd R600: Make check clearer. by Matt Arsenault · 12 years ago
  51. 5ad5f15 [cleanup] Move the Dominators.h and Verifier.h headers into the IR by Chandler Carruth · 12 years ago
  52. d7f890e Factor MI-Sched in preparation for post-ra scheduling support. by Andrew Trick · 12 years ago
  53. 4fa7975 Small simplification, p0 is the same as p. by Rafael Espindola · 12 years ago
  54. a98cd6a R600/SI: Make private pointers be 32-bit. by Matt Arsenault · 12 years ago
  55. e89b414 One last cleanup of LLVM's DataLayout strings. by Rafael Espindola · 12 years ago
  56. 0eb1ebe Structure R600's computeDataLayout more like every other target. by Rafael Espindola · 12 years ago
  57. bccb9d4 The preferred alignment defaults to the abi alignment. Omit if it is the same. by Rafael Espindola · 12 years ago
  58. f057093 Don't duplicate the DataLayout defaults for integer, floats and vectors. by Rafael Espindola · 12 years ago
  59. 8afbb28 On DataLayout, omit the default of p:64:64:64. by Rafael Espindola · 12 years ago
  60. ceb0c49 Turn AMDGPUSubtarget::getDataLayout into a static function. by Rafael Espindola · 12 years ago
  61. f2ba972 R600: Register AMDGPUCFGStructurizer pass by Tom Stellard · 12 years ago
  62. 1de5582 R600: Register R600EmitClauseMarkers pass by Tom Stellard · 12 years ago
  63. 92b0a64 Add a RequireStructuredCFG Field to TargetMachine. by Vincent Lejeune · 12 years ago
  64. 66df8a2 R600: Enable the IR structurizer by default by Tom Stellard · 12 years ago
  65. 783893a R600: Add a SubtargetFeatture for disabling the ifcvt pass. by Tom Stellard · 12 years ago
  66. af77543 R600: Fix handling of vector kernel arguments by Tom Stellard · 12 years ago
  67. 26a3b67 R600: Simplify handling of private address space by Tom Stellard · 12 years ago
  68. 4ee6dd6 R600/SI: Add SinkingPass before ISel by Vincent Lejeune · 12 years ago
  69. ed0ceec R600: Use StructurizeCFGPass for non SI targets by Tom Stellard · 12 years ago
  70. a4da6fb R600: add a pass that merges clauses. by Vincent Lejeune · 12 years ago
  71. 978674b Allow subtarget selection of the default MachineScheduler and document the interface. by Andrew Trick · 12 years ago
  72. 9fa1791 R600/SI: Convert v16i8 resource descriptors to i128 by Tom Stellard · 12 years ago
  73. 2f7cdda R600/SI: Use VSrc_* register classes as the default classes for types by Tom Stellard · 12 years ago
  74. aa664d9 Factor FlattenCFG out from SimplifyCFG by Tom Stellard · 12 years ago
  75. 8b1e021 SimplifyCFG: Use parallel-and and parallel-or mode to consolidate branch conditions by Tom Stellard · 12 years ago
  76. 960a622 R600: Simplify AMDILCFGStructurize by removing templates and assuming single exit by Vincent Lejeune · 12 years ago
  77. ce49974 R600: Do not predicated basic block with multiple alu clause by Vincent Lejeune · 12 years ago
  78. d46fce1 Move StructurizeCFG out of R600 to generic Transforms. by Matt Arsenault · 12 years ago
  79. a6c6e1b R600: Rework subtarget info and remove AMDILDevice classes by Tom Stellard · 12 years ago
  80. dec1875 R600: Add a pass that merge Vector Register by Vincent Lejeune · 12 years ago
  81. beef23f Revert "R600: Add a pass that merge Vector Register" by Rafael Espindola · 12 years ago
  82. a45aafa R600: Add a pass that merge Vector Register by Vincent Lejeune · 12 years ago
  83. 39aca62 Fix a leak on the r600 backend. by Rafael Espindola · 12 years ago
  84. d3eed66 R600: Improve texture handling by Vincent Lejeune · 12 years ago
  85. 227144c Remove the MachineMove class. by Rafael Espindola · 12 years ago
  86. 2b971eb R600: Remove AMDILPeeopholeOptimizer and replace optimizations with tablegen patterns by Tom Stellard · 12 years ago
  87. 147700b R600: Packetize instructions by Vincent Lejeune · 13 years ago
  88. bfaa63a6 R600: Add support for native control flow by Vincent Lejeune · 13 years ago
  89. f43bc57 R600: Emit CF_ALU and use true kcache register. by Vincent Lejeune · 13 years ago
  90. 99ee0f4 R600/SI: rework input interpolation v2 by Christian Konig · 13 years ago
  91. 68b6b6d R600: initial scheduler code by Vincent Lejeune · 13 years ago
  92. 0b72f10 R600: Remove LowerConstCopyPass and lower CONST_COPY right after ISel. by Vincent Lejeune · 13 years ago
  93. c756cb99 R600/SI: cleanup literal handling v3 by Christian Konig · 13 years ago
  94. f3b2a1e R600: Support for indirect addressing v4 by Tom Stellard · 13 years ago
  95. df063e6 R600: Fold remaining CONST_COPY after expand pseudo inst by Tom Stellard · 13 years ago
  96. 365366f R600: rework handling of the constants by Tom Stellard · 13 years ago
  97. c4cabef R600: Proper insert S_WAITCNT instructions by Tom Stellard · 13 years ago
  98. f879435 R600: New control flow for SI v2 by Tom Stellard · 13 years ago
  99. 75aadc2 Add R600 backend by Tom Stellard · 13 years ago