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gerrit-public.fairphone.software / toolchain / llvm-project / 15732b718bada82b45e78dacd8ebd5401ad1a49b / llvm / utils / TableGen / CodeGenTarget.cpp
  1. 0848b23 [tablegen] Use categories on options that only matter to one emitter. by Daniel Sanders · 9 years ago
  2. 4a86d45 TableGen: Use StringRef instead of const std::string& in return vals. by Matthias Braun · 9 years ago
  3. 57d35bf Add IntrInaccessibleMemOnly property for intrinsics by Andrew Kaylor · 9 years ago
  4. 32ab3a8 Re-apply r286384, "X86: Introduce the "relocImm" ComplexPattern, which represents a relocatable immediate.", with a fix for 32-bit x86. by Peter Collingbourne · 9 years ago
  5. a9caded Revert r286384, "X86: Introduce the "relocImm" ComplexPattern, which represents a relocatable immediate." by Peter Collingbourne · 9 years ago
  6. 4c15db4 X86: Introduce the "relocImm" ComplexPattern, which represents a relocatable immediate. by Peter Collingbourne · 9 years ago
  7. caaceef Expandload and Compressstore intrinsics by Elena Demikhovsky · 9 years ago
  8. cffc0d2 GlobalISel: Remove explicit enumerator values from .def file. by Tim Northover · 9 years ago
  9. 92a8c61 IR: Sort generic intrinsics before target specific ones by Justin Bogner · 9 years ago
  10. 1e64161 TableGen: Fix a confusing use of both i and I as variables. NFC by Justin Bogner · 9 years ago
  11. 47646c0 Add a 'Returned' intrinsic property corresponding to the 'returned' argument attribute by Hal Finkel · 9 years ago
  12. 84c9f99 Add writeonly IR attribute by Nicolai Haehnle · 9 years ago
  13. 4fb996e TableGen: Use StringRef instead of std::string by Matt Arsenault · 9 years ago
  14. 9778802 Split IntrReadArgMem into IntrReadMem and IntrArgMemOnly by Nicolai Haehnle · 9 years ago
  15. b48275f Add IntrWrite[Arg]Mem intrinsic property by Nicolai Haehnle · 9 years ago
  16. 9154b88 Minor code cleanup. NFC. by Junmo Park · 9 years ago
  17. f6d32496 SelectionDAG: Make Properties a field of SDPatternOperator by Matt Arsenault · 10 years ago
  18. f24d409 Unify the target opcode enum in TargetOpcodes.h and the FixedInstrs array in by David L Kreitzer · 10 years ago
  19. 45b6159 Minor performance tweaks to llvm-tblgen (and a few that might be a good idea) by Reid Kleckner · 10 years ago
  20. 86ff268 Sort intrinsics by LLVM intrinsic name, rather than tablegen def name by Reid Kleckner · 10 years ago
  21. 2d7fa70 [GlobalISel] Add a generic machine opcode for ADD. by Quentin Colombet · 10 years ago
  22. 8cc904d [TableGen] Replace instructions() with getInstructionsByEnumValue(). No need to make an iterator_range when we already have a function that returns an ArrayRef. NFC by Craig Topper · 10 years ago
  23. 47c1bae Add names for the new vector types in CodeGenTarget.cpp by Krzysztof Parzyszek · 10 years ago
  24. d324d75 Revert change that accidentally snuck into r253955. by Craig Topper · 10 years ago
  25. 0304188 [TableGen] Use array_pod_sort. NFC by Craig Topper · 10 years ago
  26. 917c738 [TableGen] Allow TokenTy in intrinsic signatures by Joseph Tremoulet · 10 years ago
  27. 6038179 Rename llvm.frameescape and llvm.framerecover to localescape and localrecover by Reid Kleckner · 10 years ago
  28. c63244d [CodeGen] Introduce a FAULTING_LOAD_OP pseudo-op. by Sanjoy Das · 10 years ago
  29. 664f6a0 [TableGen] Rename ListInit::getSize to just 'size' to be more consistent. by Craig Topper · 10 years ago
  30. 85fa7d5 Add initial support for the convergent attribute. by Owen Anderson · 10 years ago
  31. e452e27 Fix tablegen's PrintFatalError function to run registered file cleanups. by James Y Knight · 10 years ago
  32. f4669f5 Add support for v1i128 type. by Kit Barton · 10 years ago
  33. 75a4f35 Intrinsics: introduce llvm_any_ty aka ValueType Any by Ramkumar Ramachandra · 11 years ago
  34. e9b8931 Add the llvm.frameallocate and llvm.recoverframeallocation intrinsics by Reid Kleckner · 11 years ago
  35. fb81b93 Masked Load/Store - Changed the order of parameters in intrinsics. by Elena Demikhovsky · 11 years ago
  36. 48a8e64 Use unique_ptr instead of DeleteContainerSeconds. by Craig Topper · 11 years ago
  37. 8a417c1 Use range-based for loops. NFC. by Craig Topper · 11 years ago
  38. f1de34b Masked Load / Store Intrinsics - the CodeGen part. by Elena Demikhovsky · 11 years ago
  39. dacea4b Simplify ownership of RegClasses by using list<CodeGenRegisterClass> instead of vector<CodeGenRegisterClass*> by David Blaikie · 11 years ago
  40. c0bb5ca Range-for some stuff related to RegClasses, and comment cases where range-for isn't suitable. by David Blaikie · 11 years ago
  41. 0365f1a [Statepoints 2/4] Statepoint infrastructure for garbage collection: MI & x86-64 Backend by Philip Reames · 11 years ago
  42. 9bc81fb Revert "Masked Vector Load and Store Intrinsics." by Duncan P. N. Exon Smith · 11 years ago
  43. 313a96f Use unique_ptr to simplify deletion. by Craig Topper · 11 years ago
  44. 9e5089a Masked Vector Load and Store Intrinsics. by Elena Demikhovsky · 11 years ago
  45. e5b6e0d [stack protector] Fix a potential security bug in stack protector where the by Akira Hatanaka · 11 years ago
  46. 4e63fc4 TableGen: introduce support for MSBuiltin by Saleem Abdulrasool · 11 years ago
  47. 2406477 [C++11] More 'nullptr' conversion. In some cases just using a boolean check instead of comparing to nullptr. by Craig Topper · 11 years ago
  48. 48e7e85 tblgen: Twinify PrintFatalError. by Benjamin Kramer · 12 years ago
  49. aa3cf1e Intrinsics: expand semantics of LLVMExtendedVectorType (& trunc) by Tim Northover · 12 years ago
  50. 2281ef9 Expose "noduplicate" attribute as a property for intrinsics. by Eli Bendersky · 12 years ago
  51. b1f25f1 Replace PROLOG_LABEL with a new CFI_INSTRUCTION. by Rafael Espindola · 12 years ago
  52. c994c6a clang-format a bit of code to make the next patch easier to read. by Rafael Espindola · 12 years ago
  53. 3a377bc Now that we have C++11, turn simple functors into lambdas and remove a ton of boilerplate. by Benjamin Kramer · 12 years ago
  54. f1aab45 Delete all of the CodeGenInstructions from CodeGenTarget destructor. by Craig Topper · 12 years ago
  55. 1129d45 Fix a doxygen comment referencing the wrong method name. by Craig Topper · 12 years ago
  56. 8561de9 Replace tablegen uses of EVT with MVT. Add isOverloaded() to MVT to facilitate. Remove TGValueTypes.cpp since its unused now (and may have been before). by Craig Topper · 12 years ago
  57. 81e6fcc Support little-endian encodings in the FixedLenDecoderEmitter by Hal Finkel · 12 years ago
  58. 74f4c74 Lower stackmap intrinsics directly to their target opcode in the DAG builder. by Andrew Trick · 12 years ago
  59. d543817 Add v4f16 to supported value types. by Pete Cooper · 12 years ago
  60. 63dc840 Initial support for Neon scalar instructions. by Jiangning Liu · 12 years ago
  61. 52f2bea [Mips][msa] Value types for MSA support. by Jack Carter · 12 years ago
  62. 06b3b66 Add 'const' qualifier to some arrays. by Craig Topper · 12 years ago
  63. c2ec072 Extend 'readonly' and 'readnone' to work on function arguments as well as by Nick Lewycky · 12 years ago
  64. 13d4a07 Use ArrayRef<MVT::SimpleValueType> when possible. by Jakob Stoklund Olesen · 13 years ago
  65. 517afbf Added 6 more value types: v32i1, v64i1, v32i16, v32i8, v64i8, v8f64 by Elena Demikhovsky · 13 years ago
  66. 91d19d8 Sort the #include lines for utils/... by Chandler Carruth · 13 years ago
  67. 635debe Remove exception handling usage from tblgen. by Joerg Sonnenberger · 13 years ago
  68. 75e29c4 Add in new data types that are used by AMDIL/ANL among others. by Micah Villmow · 13 years ago
  69. ccd682c Compute a map from register names to registers, rather than scanning the list of registers every time we want to look up a register by name. by Owen Anderson · 13 years ago
  70. 7c277da Add a new optimization pass: Stack Coloring, that merges disjoint static allocations (allocas). Allocas are known to be by Nadav Rotem · 13 years ago
  71. 9dc03bb Add CodeGenTarget::guessInstructionProperties. by Jakob Stoklund Olesen · 13 years ago
  72. 87255e3 I'm introducing a new machine model to simultaneously allow simple by Andrew Trick · 13 years ago
  73. 91118a6 whitespace by Andrew Trick · 13 years ago
  74. ff9e08b rdar://11542750 - llvm.trap should be marked no return. by Chris Lattner · 13 years ago
  75. 53733cd Revert "Emit the SubRegTable with the smallest possible integer type." by Jim Grosbach · 14 years ago
  76. c80c3fd Emit the SubRegTable with the smallest possible integer type. by Benjamin Kramer · 14 years ago
  77. c4965bc Convert assert(0) to llvm_unreachable by Craig Topper · 14 years ago
  78. 9bcb721 Added MVT::v2f16 by Pete Cooper · 14 years ago
  79. 85d684a Split AsmParser into two components - AsmParser and AsmParserVariant by Devang Patel · 14 years ago
  80. 94580ab Add basic generic CodeGen support for half. by Dan Gohman · 14 years ago
  81. 2a81dd4 First chunk of MachineInstr bundle support. by Evan Cheng · 14 years ago
  82. ca2f78a Rename MVT::untyped to MVT::Untyped to match similar nomenclature. by Owen Anderson · 14 years ago
  83. 84c287e Move TableGen's parser and entry point into a library by Peter Collingbourne · 14 years ago
  84. 19be2ab Switch to ArrayRef<CodeGenRegisterClass*>. by Jakob Stoklund Olesen · 14 years ago
  85. af8ee2c Unconstify Inits by David Greene · 14 years ago
  86. 1aa0e3e [AVX] Constify Inits by David Greene · 14 years ago
  87. 71520a8 Revert r134921, 134917, 134908 and 134907. They're causing failures by Eric Christopher · 14 years ago
  88. af973b4 [AVX] Make Inits Foldable by David Greene · 14 years ago
  89. a84be6c Add support for alternative register names, useful for instructions whose operands are logically equivalent to existing registers, but happen to be printed specially. For example, an instruciton that prints d0[0] instead of s0. by Owen Anderson · 14 years ago
  90. 8e188be Store CodeGenRegisters as pointers so they won't be reallocated. by Jakob Stoklund Olesen · 14 years ago
  91. f5a0ca4 Fix formatting. by Owen Anderson · 14 years ago
  92. 96adc4a Add a new MVT::untyped. This will be used in future work for modelling ISA features like register pairs and lists with "interesting" constraints (such as ARM NEON contiguous register lists or even-odd paired registers). We need to be able to generate these instructions (often from intrinsics), but don't want to have to assign a legal type to them. Instead, we'll use an "untyped" edge to bypass the type-checking and simply ensure that the register classes match. by Owen Anderson · 14 years ago
  93. d7bc5c2 Give CodeGenRegisterClass a real sorted member set. by Jakob Stoklund Olesen · 14 years ago
  94. 22ea424 Move the list of register classes into CodeGenRegBank as well. by Jakob Stoklund Olesen · 14 years ago
  95. 84bd44e Move the list of registers into CodeGenRegBank. by Jakob Stoklund Olesen · 14 years ago
  96. 76a5a71 Move some sub-register index calculations to CodeGenRegisters.cpp by Jakob Stoklund Olesen · 14 years ago
  97. 68d6d8a Move TableGen's register bank classes to their own source file. by Jakob Stoklund Olesen · 14 years ago
  98. 75703ca Make it possible to have unallocatable register classes. by Jakob Stoklund Olesen · 14 years ago
  99. 375dcc9 Change how tblgen generates attributes for intrinsics to use a single by John McCall · 14 years ago
  100. c8c4ded Teach TableGen to automatically generate missing SubRegIndex instances. by Jakob Stoklund Olesen · 14 years ago