1. 56b31bd Split TargetLowering into a CodeGen and a SelectionDAG part. by Benjamin Kramer · 13 years ago
  2. 0539435 Change TargetLowering::getRepRegClassFor to take an MVT, instead of EVT. by Patrik Hagglund · 13 years ago
  3. e98b7a0 Revert EVT->MVT changes, r169836-169851, due to buildbot failures. by Patrik Hagglund · 13 years ago
  4. 57b1694 Change TargetLowering::getRepRegClassFor to take an MVT, instead of EVT. by Patrik Hagglund · 13 years ago
  5. ed0881b Use the new script to sort the includes of every file under lib. by Chandler Carruth · 13 years ago
  6. a538d83 Add a getName function to MachineFunction. Use it in places that previously did getFunction()->getName(). Remove includes of Function.h that are no longer needed. by Craig Topper · 13 years ago
  7. 54038d7 Switch all register list clients to the new MC*Iterator interface. by Jakob Stoklund Olesen · 14 years ago
  8. 3c52f02 Add an MF argument to TRI::getPointerRegClass() and TII::getRegClass(). by Jakob Stoklund Olesen · 14 years ago
  9. 645bdd4 Tweak MachineLICM heuristics for cheap instructions. by Jakob Stoklund Olesen · 14 years ago
  10. a3e86a6 Only check for PHI uses inside the current loop. by Jakob Stoklund Olesen · 14 years ago
  11. 7fede87 Post-ra LICM should take care not to hoist an instruction that would clobber a by Evan Cheng · 14 years ago
  12. 1d32658 Use uint16_t to store register overlaps to reduce static data. by Craig Topper · 14 years ago
  13. 248c299 Fix 80-column violation. by Chad Rosier · 14 years ago
  14. fd7d1b4 Revert r150288, "Allow Post-RA LICM to hoist reserved register reads." by Jakob Stoklund Olesen · 14 years ago
  15. fd338e9 Allow Post-RA LICM to hoist reserved register reads. by Jakob Stoklund Olesen · 14 years ago
  16. c8046c0 Don't read PreRegAlloc before it is initialized. by Jakob Stoklund Olesen · 14 years ago
  17. 1fa5bcb Codegen pass definition cleanup. No functionality. by Andrew Trick · 14 years ago
  18. c40815d Move pass configuration out of pass constructors: MachineLICM. by Andrew Trick · 14 years ago
  19. 5209c73 whitespace by Andrew Trick · 14 years ago
  20. 5e1ac45 Require non-NULL register masks. by Jakob Stoklund Olesen · 14 years ago
  21. 20948fa Fix PR11829. PostRA LICM was too aggressive. by Jakob Stoklund Olesen · 14 years ago
  22. 9082353 Simplify debug output. by Jakob Stoklund Olesen · 14 years ago
  23. 6b17ef5 Support register masks in MachineLICM. by Jakob Stoklund Olesen · 14 years ago
  24. 86ae07f Extract method for detecting constant unallocatable physregs. by Jakob Stoklund Olesen · 14 years ago
  25. da46832 80 col violation. by Evan Cheng · 14 years ago
  26. 1c3b1ef Hoisted some loop invariant smallvector lookups out of a MachineLICM loop by Pete Cooper · 14 years ago
  27. 1eed5b5 Changed MachineLICM to use a worklist list MachineCSE instead of recursion. by Pete Cooper · 14 years ago
  28. 7f8e563 Add bundle aware API for querying instruction properties and switch the code by Evan Cheng · 14 years ago
  29. 2a81dd4 First chunk of MachineInstr bundle support. by Evan Cheng · 14 years ago
  30. ca2f78a Rename MVT::untyped to MVT::Untyped to match similar nomenclature. by Owen Anderson · 14 years ago
  31. 7313337 Disable LICM speculation in high register pressure situation again now that Devang has fixed other issues. by Evan Cheng · 14 years ago
  32. 1d8ab46 As Evan suggested, loads from constant pool are safe to speculate. by Devang Patel · 14 years ago
  33. 830c776 Add a comment. by Devang Patel · 14 years ago
  34. aa563df Constraint register class with constrainRegClass() to CSE a virtual into another. rdar://10293289 by Evan Cheng · 14 years ago
  35. 69a4565 It is safe to speculate load from GOT. This fixes performance regression caused by r141689. by Devang Patel · 14 years ago
  36. 404feb9 Tabs to spaces. by Nick Lewycky · 14 years ago
  37. b35afca Disable machine LICM speculation check (for profitability) until I have time to investigate the regressions. by Evan Cheng · 14 years ago
  38. 918cea2 Expand the check for a landing pad so that it looks at the basic block's by Bill Wendling · 14 years ago
  39. af13895 Fix r141744. by Evan Cheng · 14 years ago
  40. f192ca0 Refine r141689 with a tri-state variable. by Evan Cheng · 14 years ago
  41. 579ff6c N.B. This is with the new EH scheme: by Bill Wendling · 14 years ago
  42. 453d401 Add dominance check for the instruction being hoisted. by Devang Patel · 14 years ago
  43. 478d5bc Revert r141569 and r141576. by Devang Patel · 14 years ago
  44. 2689f95 If loop header is also loop exiting block then it may not be safe to hoist instructions. by Devang Patel · 14 years ago
  45. e554d599 Add dominance check for the instruction being hoisted. by Devang Patel · 14 years ago
  46. 90da66b Teach MachineLICM reg pressure tracking code to deal with MVT::untyped. Sorry, I can't come up with a small test case. rdar://10043690 by Evan Cheng · 14 years ago
  47. 8264e27 Sink SubtargetFeature and TargetInstrItineraries (renamed MCInstrItineraries) into MC. by Evan Cheng · 14 years ago
  48. 6cc775f - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and by Evan Cheng · 14 years ago
  49. 8d71a75 More refactoring. Move getRegClass from TargetOperandInfo to TargetInstrInfo. by Evan Cheng · 14 years ago
  50. ef42bea Look pass copies when determining whether hoisting would end up inserting more copies. rdar://9266679 by Evan Cheng · 15 years ago
  51. df61694 Move getRegPressureLimit() from TargetLoweringInfo to TargetRegisterInfo. by Cameron Zwarich · 15 years ago
  52. b8b0ad8 Sorry, several patches in one. by Evan Cheng · 15 years ago
  53. 2fb5b31 Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic. by Jakob Stoklund Olesen · 15 years ago
  54. 4162e3e Add a FIXME comment. by Dan Gohman · 15 years ago
  55. 5c86d22 MachineLICM should not claim to be preserving the CFG when it can split critical by Jakob Stoklund Olesen · 15 years ago
  56. e96b8d7 Use instruction itinerary to determine what instructions are 'cheap'. by Evan Cheng · 15 years ago
  57. 87066f0 More accurate estimate / tracking of register pressure. by Evan Cheng · 15 years ago
  58. a94cc6d Make CodeGen TBAA-aware. by Dan Gohman · 15 years ago
  59. 63c7608 Re-enable register pressure aware machine licm with fixes. Hoist() may have by Evan Cheng · 15 years ago
  60. 6c18d1a Get rid of static constructors for pass registration. Instead, every pass exposes an initializeMyPassFunction(), which by Owen Anderson · 15 years ago
  61. 418204e Revert r116781 "- Add a hook for target to determine whether an instruction def by Daniel Dunbar · 15 years ago
  62. 2006bbe Fix for machine licm assert: RCCost <= RegPressure[RCId] by Andrew Trick · 15 years ago
  63. 8249dfe - Add a hook for target to determine whether an instruction def is by Evan Cheng · 15 years ago
  64. 4443630 More machine LICM work. It now tracks register pressure for path from preheader to current BB and use the information determine whether hoisting is worthwhile. by Evan Cheng · 15 years ago
  65. d62719c Register pressure and instruction latency aware machine LICM. Work in progress. by Evan Cheng · 15 years ago
  66. 8ac477f Begin adding static dependence information to passes, which will allow us to by Owen Anderson · 15 years ago
  67. 4ac0d16 Don't waste time unfolding simple loads. The unfolded copy won't be hoisted. by Evan Cheng · 15 years ago
  68. df7a4f2 Now with fewer extraneous semicolons! by Owen Anderson · 15 years ago
  69. a7aed18 Reapply r110396, with fixes to appease the Linux buildbot gods. by Owen Anderson · 15 years ago
  70. bda59bd Revert r110396 to fix buildbots. by Owen Anderson · 15 years ago
  71. 755aceb Don't use PassInfo* as a type identifier for passes. Instead, use the address of the static by Owen Anderson · 15 years ago
  72. 329d474 Comment typo. by Dale Johannesen · 15 years ago
  73. a57b97e Fix batch of converting RegisterPass<> to INTIALIZE_PASS(). by Owen Anderson · 15 years ago
  74. 6e5ec62 Fix test for switch statements and increase threshold a bit per experimentation. by Dale Johannesen · 15 years ago
  75. 08645f1 Don't hoist things out of a large switch inside a by Dale Johannesen · 15 years ago
  76. d542414 Teach ProcessImplicitDefs to transform more COPY instructions into IMPLICIT_DEF (and subsequently eliminate them). This allows machine LICM to hoist IMPLICIT_DEF's. PR7620. by Evan Cheng · 15 years ago
  77. 0b7ae20 change machinelicm to use MachineInstr::isSafeToMove. No by Chris Lattner · 15 years ago
  78. 7929c44 Fix MachineLICM to actually visit inner loops. by Dan Gohman · 15 years ago
  79. 3570f81 Move PHIElimination's SplitCriticalEdge for MachineBasicBlocks out by Dan Gohman · 15 years ago
  80. 032f326 Doh. Machine LICM is re-initializing the CSE map over and over. Patch by Anna Zaks. rdar://8037934. by Evan Cheng · 16 years ago
  81. c90f51c Teach MachineLICM and MachineSink how to clear kill flags conservatively by Dan Gohman · 16 years ago
  82. 011207a When MachineLICM is hoisting a physical register after regalloc, make sure the by Jakob Stoklund Olesen · 16 years ago
  83. 5fdb57c Postra machine licm must add registers defined by loop invariants to *all* of by Evan Cheng · 16 years ago
  84. 87585d7 Fast path implicit_def check. by Evan Cheng · 16 years ago
  85. cce672c Avoid variable shadowing. by Evan Cheng · 16 years ago
  86. 89e7479 Expand postra machine licm's capability a little more. If an instruction's register operands are all loop invariants, then it's safe to hoist it. by Evan Cheng · 16 years ago
  87. 0a2aff2 Teach postra machine licm to hoist more obvious invariants, e.g. instructions with no source operands. by Evan Cheng · 16 years ago
  88. 9d2d053 Eliminate MachineBasicBlock::const_livein_iterator and make by Dan Gohman · 16 years ago
  89. d0b5c6c Plug trivial leak. by Benjamin Kramer · 16 years ago
  90. 87f8207 Delete this obsolete comment. by Dan Gohman · 16 years ago
  91. 058b9f0 Make post regalloc machine licm functional. It now passes all of MultiSource. by Evan Cheng · 16 years ago
  92. 5ed6792 Add comments for missed opportunities. by Evan Cheng · 16 years ago
  93. fcbcc0b Fix typo. by Evan Cheng · 16 years ago
  94. 6ea5949 Post regalloc LICM. Work in progress. by Evan Cheng · 16 years ago
  95. e9c46c2 - Change MachineInstr::isIdenticalTo to take a new option that determines whether it should skip checking defs or at least virtual register defs. This subsumes part of the TargetInstrInfo::isIdentical functionality. by Evan Cheng · 16 years ago
  96. 34021b7 Don't try to replace physical registers when doing CSE. by Dan Gohman · 16 years ago
  97. 6fb6a59 Don't unconditionally suppress hoisting of instructions with implicit by Dan Gohman · 16 years ago
  98. b06015a move target-independent opcodes out of TargetInstrInfo by Chris Lattner · 16 years ago
  99. 55cf95c by David Greene · 16 years ago
  100. 18fa568 Add Loop contains utility methods for testing whether a loop by Dan Gohman · 16 years ago