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gerrit-public.fairphone.software / toolchain / llvm-project / 1f307f49efc6cb93aedb5b5b9fb017a2b1421960 / llvm / lib / CodeGen / PostRASchedulerList.cpp
  1. 6b104f8 Move the PostRA scheduler's fixupKills function for reuse. by Andrew Trick · 12 years ago
  2. 4fd3b1d Add two additional hazard recognizer functions by Hal Finkel · 12 years ago
  3. 811a2ef After PostRA scheduling, don't set kill flags on undef operands. by Andrew Trick · 12 years ago
  4. a53e101 mi-sched: Don't call MBB.size() in initSUnits. The driver already has instr count. by Andrew Trick · 12 years ago
  5. abdb1d6 Simplify logic now that r182490 is in place. No functional change intended. by Chad Rosier · 12 years ago
  6. c338679 Remove special-casing of return blocks for liveness. by Jakob Stoklund Olesen · 13 years ago
  7. f623e98 Use MachineInstrBuilder in a few CodeGen passes. by Jakob Stoklund Olesen · 13 years ago
  8. ed0881b Use the new script to sort the includes of every file under lib. by Chandler Carruth · 13 years ago
  9. 4b1f9e3 misched: Don't consider artificial edges weak edges. by Andrew Trick · 13 years ago
  10. f1ff84c misched: Infrastructure for weak DAG edges. by Andrew Trick · 13 years ago
  11. c30a9af Switch most getReservedRegs() clients to the MRI equivalent. by Jakob Stoklund Olesen · 13 years ago
  12. 19f49ac Release build: guard dump functions with by Manman Ren · 13 years ago
  13. 742534c Release build: guard dump functions with "ifndef NDEBUG" by Manman Ren · 13 years ago
  14. a538d83 Add a getName function to MachineFunction. Use it in places that previously did getFunction()->getName(). Remove includes of Function.h that are no longer needed. by Craig Topper · 13 years ago
  15. 05ff466 Move RegisterClassInfo.h. by Andrew Trick · 13 years ago
  16. 628a39f Remove unused private fields found by clang's new -Wunused-private-field. by Benjamin Kramer · 13 years ago
  17. 54038d7 Switch all register list clients to the new MC*Iterator interface. by Jakob Stoklund Olesen · 13 years ago
  18. 9a09147 This patch fixes a problem which arose when using the Post-RA scheduler by Preston Gurd · 14 years ago
  19. 8c207e4 misched interface: rename Begin/End to RegionBegin/RegionEnd since they are not private. by Andrew Trick · 14 years ago
  20. 9a0c583 misched prep: Expose the ScheduleDAGInstrs interface so targets may by Andrew Trick · 14 years ago
  21. a316faa misched prep: rename InsertPos to End. by Andrew Trick · 14 years ago
  22. 52226d4 misched preparation: rename core scheduler methods for consistency. by Andrew Trick · 14 years ago
  23. 60cf03e misched preparation: clarify ScheduleDAG and ScheduleDAGInstrs roles. by Andrew Trick · 14 years ago
  24. e932bb7 misched preparation: modularize schedule emission. by Andrew Trick · 14 years ago
  25. edee68c misched preparation: modularize schedule printing. by Andrew Trick · 14 years ago
  26. 46a5866 misched preparation: modularize schedule verification. by Andrew Trick · 14 years ago
  27. 4b02a29 Convert more GenRegisterInfo tables from unsigned to uint16_t to reduce static data size. by Craig Topper · 14 years ago
  28. ef8bf39 BitVectorize loop. by Benjamin Kramer · 14 years ago
  29. 796fd46 post-ra-sched: Turn the KillIndices vector into a bitvector, it only stored two meaningful states. by Benjamin Kramer · 14 years ago
  30. 21974b1 post-ra-sched: Replace a std::set of regs with a bitvector. by Benjamin Kramer · 14 years ago
  31. a793a59 Make calls scheduling boundaries post-ra. by Jakob Stoklund Olesen · 14 years ago
  32. 28d4803 Handle regmasks in FixupKills. by Jakob Stoklund Olesen · 14 years ago
  33. 760b134 Make all pointers to TargetRegisterClass const since they are all pointers to static data that should not be modified. by Craig Topper · 14 years ago
  34. 1fa5bcb Codegen pass definition cleanup. No functionality. by Andrew Trick · 14 years ago
  35. df7e376 Move pass configuration out of pass constructors: PostRAScheduler. by Andrew Trick · 14 years ago
  36. 1d028a3 misched: Added ScheduleDAGInstrs::IsPostRA by Andrew Trick · 14 years ago
  37. 7fae11b - Add MachineInstrBundle.h and MachineInstrBundle.cpp. This includes a function by Evan Cheng · 14 years ago
  38. 7f8e563 Add bundle aware API for querying instruction properties and switch the code by Evan Cheng · 14 years ago
  39. 1f97a5a Remove all remaining uses of Value::getNameStr(). by Benjamin Kramer · 14 years ago
  40. 0d639a2 Rename TargetSubtarget to TargetSubtargetInfo for consistency. by Evan Cheng · 14 years ago
  41. 4f5f84c Teach antidependency breakers to use RegisterClassInfo. by Jakob Stoklund Olesen · 14 years ago
  42. f02a376 Update DBG_VALUEs while breaking anti dependencies. by Devang Patel · 14 years ago
  43. 18c9b37 Add an issue width check to the postRA scheduler. Patch by Max Kazakov! by Andrew Trick · 14 years ago
  44. 84f9ad9 Typo: Reviewed by Alistair. by Andrew Trick · 15 years ago
  45. aab77fe Post-RA scheduler compile time fix. Quadratic computation of DAG node depth. by Andrew Trick · 15 years ago
  46. 10ffc2b Various bits of framework needed for precise machine-level selection by Andrew Trick · 15 years ago
  47. bf40707 Teach if-converter to be more careful with predicating instructions that would by Evan Cheng · 15 years ago
  48. a7aed18 Reapply r110396, with fixes to appease the Linux buildbot gods. by Owen Anderson · 15 years ago
  49. bda59bd Revert r110396 to fix buildbots. by Owen Anderson · 15 years ago
  50. 755aceb Don't use PassInfo* as a type identifier for passes. Instead, use the address of the static by Owen Anderson · 15 years ago
  51. dd5e9d8 Use std::vector instead of TargetRegisterInfo::FirstVirtualRegister. by Bill Wendling · 15 years ago
  52. 2d51c7c Allow ARM if-converter to be run after post allocation scheduling. by Evan Cheng · 15 years ago
  53. 078f4ce - Do away with SimpleHazardRecognizer.h. It's not used and offers little value. by Evan Cheng · 15 years ago
  54. e60273f Allow target to provide its own hazard recognizer to post-ra scheduler. by Evan Cheng · 15 years ago
  55. 3858451 - Change MachineInstr::findRegisterDefOperandIdx so it can also look for defs by Evan Cheng · 15 years ago
  56. 63d4f68 Remove dbg_value workaround and associated command line option by Jim Grosbach · 15 years ago
  57. f985114 Enable preserving debug information through post-RA scheduling by Jim Grosbach · 15 years ago
  58. d772bde 80 column and trailing whitespace cleanup by Jim Grosbach · 15 years ago
  59. 25749ad add cmd line option to leave dbgvalues in during post-RA sceduling. Useful by Jim Grosbach · 15 years ago
  60. 25c1653 Get rid of the EdgeMapping map. Instead, just check for BasicBlock by Dan Gohman · 16 years ago
  61. 4e5eb5a As a temporary workaround for post-RA not handling DebugValue instructions, by Bob Wilson · 16 years ago
  62. e414897 Remove a #include. by Dan Gohman · 16 years ago
  63. 2061c84 Fix some more places where dbg_value affected codegen. by Dale Johannesen · 16 years ago
  64. aa8ce38 Change errs() to dbgs(). by David Greene · 16 years ago
  65. a45fe67 <rdar://problem/7453528>. Track only physical registers that are valid for the target. by David Goodwin · 16 years ago
  66. 8392456 Don't hang on to pointers or references after vector::push_back. by Jakob Stoklund Olesen · 16 years ago
  67. 80a03cc Remove some old experimental code that is no longer needed. Remove additional, speculative scheduling pass as its cost did not translate into significant performance improvement. Minor tweaks. by David Goodwin · 16 years ago
  68. b9fe5d5 Allow target to specify regclass for which antideps will only be broken along the critical path. by David Goodwin · 16 years ago
  69. da83f7d Rename registers to break output dependencies in addition to anti-dependencies. by David Goodwin · 16 years ago
  70. 0d412c2 Fixed to address code review. No functional changes. by David Goodwin · 16 years ago
  71. cf89db1 Allow targets to specify register classes whose member registers should not be renamed to break anti-dependencies. by David Goodwin · 16 years ago
  72. 7d8878a Break anti-dependencies using free registers in a round-robin manner to avoid introducing new anti-dependencies. by David Goodwin · 16 years ago
  73. 8501dbbe Do a scheduling pass ignoring anti-dependencies to identify candidate registers that should be renamed. by David Goodwin · 16 years ago
  74. 34341e6 Make -print-machineinstrs more readable. by Dan Gohman · 16 years ago
  75. e30ed53 Make AntiDepReg.h internal. by David Goodwin · 16 years ago
  76. e056d10 Allow the aggressive anti-dep breaker to process the same region multiple times. This is necessary because new anti-dependencies are exposed when "current" ones are broken. by David Goodwin · 16 years ago
  77. 661ea98 Define virtual destructor in *.cpp file. by David Goodwin · 16 years ago
  78. de11f36 Add aggressive anti-dependence breaker. Currently it is not the default for any target. Enable with -break-anti-dependencies=all. by David Goodwin · 16 years ago
  79. 8370485 Break anti-dependence breaking out into its own class. by David Goodwin · 16 years ago
  80. 974e12b Remove includes of Support/Compiler.h that are no longer needed after the by Nick Lewycky · 16 years ago
  81. 02d5f77 Remove VISIBILITY_HIDDEN from class/struct found inside anonymous namespaces. by Nick Lewycky · 16 years ago
  82. 02ad4cb Allow the target to select the level of anti-dependence breaking that should be performed by the post-RA scheduler. The default is none. by David Goodwin · 16 years ago
  83. 682a2d1 Revert r84658 and r84691. They were causing llvm-gcc bootstrap to fail. by Dan Gohman · 16 years ago
  84. 4388beb Respect src register allocation requirements when breaking anti-dependencies. Remove some dead code. by David Goodwin · 16 years ago
  85. baf6dd2 Checkpoint more aggressive anti-dependency breaking for post-ra scheduler. by David Goodwin · 16 years ago
  86. 007ceb4 Change createPostRAScheduler so it can be turned off at llc -O1. by Evan Cheng · 16 years ago
  87. 8b61476 If post-alloc scheduler is not enabled, it should return false, not true. by Evan Cheng · 16 years ago
  88. 4c98efb Add debugging output. by David Goodwin · 16 years ago
  89. 26e9b89 Fix a missing initialization of PostRAScheduler's AA member. by Dan Gohman · 16 years ago
  90. 87b02d5 Factor out LiveIntervalAnalysis' code to determine whether an instruction by Dan Gohman · 16 years ago
  91. 3b008a3 Fix a use-after-free in post-ra-scheduling. by Benjamin Kramer · 16 years ago
  92. d725159 All callee-saved registers are live-out of a return block. by David Goodwin · 16 years ago
  93. 1cc6dd9 Remove neonfp attribute and instead set default based on CPU string. Add -arm-use-neon-fp to override the default. by David Goodwin · 16 years ago
  94. 9a051a5 Restore the -post-RA-scheduler flag as an override for the target specification. Remove -mattr for setting PostRAScheduler enable and instead use CPU string. by David Goodwin · 16 years ago
  95. be3039e Use MachineFrameInfo.getPristineRegs() to determine which callee-saved registers are available for anti-dependency breaking. Some cleanup. by David Goodwin · 16 years ago
  96. 4fb2891 Observe hasExtraSrcRegAllocReq and hasExtraDefRegAllocReq. Do not change by Evan Cheng · 16 years ago
  97. 8ff5c19 Fix integer overflow in instruction scheduling. This can happen if we have by Reid Kleckner · 16 years ago
  98. 17199b5 Remove -post-RA-schedule flag and add a TargetSubtarget method to enable post-register-allocation scheduling. By default it is off. For ARM, enable/disable with -mattr=+/-postrasched. Enable by default for cortex-a8. by David Goodwin · 16 years ago
  99. 0bb5af3 Use KILL instead of IMPLICIT_DEF in LowerSubregs pass. by Jakob Stoklund Olesen · 16 years ago
  100. a4c98a3 Fix bug in kill flag updating for post-register-allocation scheduling. When the kill flag of a superreg needs to be cleared because there are one or more subregs live, we instead add implicit-defs of those subregs and leave the kill flag on the superreg. This allows us to end the live-range of the superreg without ending the live-ranges of the subregs. by David Goodwin · 16 years ago