1. 20a631f Refactor TargetMachine, pushing handling of TargetData into the target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference. by Owen Anderson · 20 years ago
  2. 6c1321c relax assertion by Chris Lattner · 20 years ago
  3. e602552 Allow targets to compute masked bits for intrinsics. by Chris Lattner · 20 years ago
  4. 051f786 Was returning the wrong type. by Chris Lattner · 20 years ago
  5. f144dac Modify the TargetLowering::getPackedTypeBreakdown method to also return the by Chris Lattner · 20 years ago
  6. 549fb16 Implement TargetLowering::getPackedTypeBreakdown by Chris Lattner · 20 years ago
  7. 4b5b4e3 Typo by Evan Cheng · 20 years ago
  8. ad74844 set TransformToType correctly for vector types. by Chris Lattner · 20 years ago
  9. af598d2 Add LSR hooks. by Evan Cheng · 20 years ago
  10. 3d761b6 I can't convince myself that this is safe, remove the recursive call. by Chris Lattner · 20 years ago
  11. c726a5c Do not fold (add (shl x, c1), (shl c2, c1)) -> (shl (add x, c2), c1), by Chris Lattner · 20 years ago
  12. a7fb285 Number of NodeTypes now exceeds 128. by Evan Cheng · 20 years ago
  13. 4a2eeea Add interfaces for targets to provide target-specific dag combiner optimizations. by Chris Lattner · 20 years ago
  14. ab81640 Implement bit propagation through sub nodes, this (re)implements by Chris Lattner · 20 years ago
  15. a60751d Check RHS simplification before LHS simplification to avoid infinitely looping by Chris Lattner · 20 years ago
  16. 27220f8 Just like we use the RHS of an AND to simplify the LHS, use the LHS to by Chris Lattner · 20 years ago
  17. 118ddba Add a bunch of missed cases. Perhaps the most significant of which is that by Chris Lattner · 20 years ago
  18. 2a9e1e3 Recognize memory operand codes by Chris Lattner · 20 years ago
  19. 2e124af Don't return registers from register classes that aren't legal. by Chris Lattner · 20 years ago
  20. 7ad77df split register class handling from explicit physreg handling. by Chris Lattner · 20 years ago
  21. 7bb4696 Updates to match change of getRegForInlineAsmConstraint prototype by Chris Lattner · 20 years ago
  22. 983ca89 Add a fold for add that exchanges it with a constant shift if possible, so by Nate Begeman · 20 years ago
  23. 0d62ebd Fix bug noticed by VC++. by Jeff Cohen · 20 years ago
  24. 8a77efe Rework the SelectionDAG-based implementations of SimplifyDemandedBits by Nate Begeman · 20 years ago
  25. 4b40a42 Rename maxStoresPerMemSet to maxStoresPerMemset, etc. by Evan Cheng · 20 years ago
  26. ee1dadb implementation of some methods for inlineasm by Chris Lattner · 20 years ago
  27. 20a8942 Implement some feedback from sabre by Nate Begeman · 20 years ago
  28. dc7bba9 Add a framework for eliminating instructions that produces undemanded bits. by Nate Begeman · 20 years ago
  29. e0c60d6 Implement MaskedValueIsZero for ANY_EXTEND nodes by Chris Lattner · 20 years ago
  30. 7ed3101 Beef up the interface to inline asm constraint parsing, making it more general, useful, and easier to use. by Chris Lattner · 20 years ago
  31. f0b24d2 Move MaskedValueIsZero from the DAGCombiner to the TargetLowering interface,making isMaskedValueZeroForTargetNode simpler, and useable from other partsof the compiler. by Chris Lattner · 20 years ago
  32. c6fa028 adjust prototype by Chris Lattner · 20 years ago
  33. 8a4a3de clean up interface to ValueTypeActions by Chris Lattner · 20 years ago
  34. 32fef53 Implement a method for inline asm support by Chris Lattner · 20 years ago
  35. d07c864 initialize an instance var, apparently I forgot to commit this long ago by Chris Lattner · 20 years ago
  36. 030e002 Set SchedulingForLatency to be the default scheduling preference for all. by Evan Cheng · 20 years ago
  37. 1872908 Lefted out TargetLowering:: by Evan Cheng · 20 years ago
  38. 9cdc16c * Fix a GlobalAddress lowering bug. by Evan Cheng · 20 years ago
  39. 6af0263 Added a hook to print out names of target specific DAG nodes. by Evan Cheng · 20 years ago
  40. 89b049a Add the majority of the vector machien value types we expect to support, by Nate Begeman · 20 years ago
  41. 07890bb Rather than attempting to legalize 1 x float, make sure the SD ISel never by Nate Begeman · 20 years ago
  42. 4dd3831 Invert the TargetLowering flag that controls divide by consant expansion. by Nate Begeman · 20 years ago
  43. 59dc1e0 initialize new flag by Chris Lattner · 20 years ago
  44. 85d93a3 Change the names of member variables per Chris' instructions, and document by Reid Spencer · 20 years ago
  45. ade5254 Adjust to new interface by Chris Lattner · 20 years ago
  46. d37d854 For: memory operations -> stores by Reid Spencer · 20 years ago
  47. 10468d8 Remove trailing whitespace by Misha Brukman · 21 years ago
  48. a05cd83 Add a hook to find out how the target handles shift amounts that are out of by Chris Lattner · 21 years ago
  49. 5f180e4 Shift and setcc types default to the pointer type. by Chris Lattner · 21 years ago
  50. 6f80979 Use enums, move virtual dtor out of line. by Chris Lattner · 21 years ago
  51. 8ec1dc5 Set up identity transforms. by Chris Lattner · 21 years ago
  52. 1bc93ba Move some information out of LegalizeDAG into the generic Target interface. by Chris Lattner · 21 years ago
  53. 4cbf1f0 Clear the whole array, always. by Chris Lattner · 21 years ago
  54. 3a4d1b2 First draft of new Target interface by Chris Lattner · 21 years ago