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gerrit-public.fairphone.software / toolchain / llvm-project / 265e94e65798b24038ea01fe92ff37be550e2c9c / llvm / lib / Target / ARM / Disassembler / ARMDisassembler.cpp
  1. 6b9aeda [ARM][MVE] Decoding of uqrshl and sqrshl accepts unpredictable encodings by Oliver Stannard · 6 years ago
  2. b8b8b46 [ARM] MVE VPNOT by David Green · 6 years ago
  3. fdedf24 [ARM] Rename NEONModImm to VMOVModImm. NFC by David Green · 6 years ago
  4. 0b001f9 [ARM] Add <saturate> operand to SQRSHRL and UQRSHLL by Mikhail Maltsev · 6 years ago
  5. 29ff1b4 [ARM] Fix integer UB in MVE load/store immediate handling. by Simon Tatham · 6 years ago
  6. ffb2b34 [ARM] Fix handling of zero offsets in LOB instructions. by Simon Tatham · 6 years ago
  7. e5ce56f [ARM] Make coprocessor number restrictions consistent. by Simon Tatham · 6 years ago
  8. 02449f9 [ARM] Tighten restrictions on use of SP in v8.1-M CSEL. by Simon Tatham · 6 years ago
  9. 86b7a1e [ARM] Add remaining miscellaneous MVE instructions. by Simon Tatham · 6 years ago
  10. e682416 [ARM] Add MVE vector load/store instructions. by Simon Tatham · 6 years ago
  11. fe80176 [ARM] Add MVE interleaving load/store family. by Simon Tatham · 6 years ago
  12. bdea883 Fix MSVC "result of 32-bit shift implicitly converted to 64 bits" warning. NFCI. by Simon Pilgrim · 6 years ago
  13. 0c7af66 [ARM] Add MVE 64-bit GPR <-> vector move instructions. by Simon Tatham · 6 years ago
  14. bafb105 [ARM] Add MVE vector instructions that take a scalar input. by Simon Tatham · 6 years ago
  15. a6b6a15 [ARM] Add a batch of similarly encoded MVE instructions. by Simon Tatham · 6 years ago
  16. d5cf95e [ARM] Fix -Wimplicit-fallthrough after D62675 by Fangrui Song · 6 years ago
  17. 7d76f8a [ARM] Add MVE vector compare instructions. by Simon Tatham · 6 years ago
  18. c9b2cd4 [ARM] Add a batch of MVE floating-point instructions. by Simon Tatham · 6 years ago
  19. 232db11 [ARM] Add a batch of MVE integer instructions. by Simon Tatham · 6 years ago
  20. d88e28d [llvm-objdump] Switch between ARM/Thumb based on mapping symbols. by Eli Friedman · 6 years ago
  21. 2f5188f [ARM] Add MVE vector bit-operations (register inputs). by Simon Tatham · 6 years ago
  22. ed4a602 [ARM] Rename MVE instructions in Tablegen for consistency. by Simon Tatham · 6 years ago
  23. 286e1d2 [ARM] Set up infrastructure for MVE vector instructions. by Simon Tatham · 6 years ago
  24. 848d3d0 [ARM] Refactor handling of IT mask operands. by Simon Tatham · 6 years ago
  25. 7bd5c55 [ARM] First MVE instructions: scalar shifts. by Mikhail Maltsev · 6 years ago
  26. 8c865ca [ARM] Add the non-MVE instructions in Arm v8.1-M. by Simon Tatham · 6 years ago
  27. 4b0b261 Revert CMake: Make most target symbols hidden by default by Tom Stellard · 6 years ago
  28. 3745713 CMake: Make most target symbols hidden by default by Tom Stellard · 6 years ago
  29. 67065c5 Revert rL362953 and its followup rL362955. by Simon Tatham · 6 years ago
  30. baeea91 [ARM] Add the non-MVE instructions in Arm v8.1-M. by Simon Tatham · 6 years ago
  31. 760df47 [ARM] Replace fp-only-sp and d16 with fp64 and d32. by Simon Tatham · 6 years ago
  32. f3011b9 [ARM] Create a TargetInfo header. NFC by Richard Trieu · 6 years ago
  33. 6af366b ARM: disallow add/sub to sp unless Rn is also sp. by Tim Northover · 6 years ago
  34. c20c37b [ARM][FIX] Fix vfmal.f16 and vfmsl.f16 operand by Diogo N. Sampaio · 7 years ago
  35. b70fc0c [ARM] Make fullfp16 instructions not conditionalisable. by Simon Tatham · 7 years ago
  36. 2946cd7 Update the file headers across all of the LLVM projects in the monorepo by Chandler Carruth · 7 years ago
  37. f78650a Remove trailing space by Fangrui Song · 7 years ago
  38. b73efb8 ARM: correctly decode VFP instructions following unpredictable t2IT by Tim Northover · 7 years ago
  39. bf54858 ARM: diagnose unpredictable IT instructions by Tim Northover · 7 years ago
  40. 75c6bfe [ARM]Decoding MSR with unpredictable destination register causes an assert by Simi Pallipurath · 8 years ago
  41. 133b608 [ARM] Re-commit r324600 with fixed LLVMBuild.txt by Oliver Stannard · 8 years ago
  42. 3c11ecb Revert r324600 as it breaks a buildbot by Oliver Stannard · 8 years ago
  43. db982b2 [ARM] Fix disassembly of invalid banked register moves by Oliver Stannard · 8 years ago
  44. 011de9c [ARM] Armv8.2-A FP16 code generation (part 1/3) by Sjoerd Meijer · 8 years ago
  45. 0e6694d Silence a bunch of implicit fallthrough warnings by Adrian Prantl · 8 years ago
  46. d4a2570 [ARM] Fix disassembly for conditional VMRS and VMSR instructions in ARM mode by Andre Vieira · 8 years ago
  47. 963da5b [ARM] v8.3-a complex number support by Sam Parker · 8 years ago
  48. 640527f [ARM] Fix assembly and disassembly for VMRS/VMSR by Andre Vieira · 8 years ago
  49. 076468c [ARM] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC). by Eugene Zelenko · 8 years ago
  50. 7426c97 [ARM] Assembler support for the ARMv8.2a dot product instructions by Sjoerd Meijer · 8 years ago
  51. f370f2e Revert "[ARM] Fix assembly and disassembly for VMRS/VMSR" by Tim Northover · 8 years ago
  52. 7dffb9b [ARM] Fix assembly and disassembly for VMRS/VMSR by Andre Vieira · 8 years ago
  53. 6269d39 [llvm-objdump] Handle invalid instruction gracefully on ARM by Eugene Leviant · 8 years ago
  54. 6bda14b Sort the remaining #include lines in include/... and lib/.... by Chandler Carruth · 8 years ago
  55. aea3a99 ARMDisassembler: loop over ARM decode tables by Sjoerd Meijer · 9 years ago
  56. e79c077 [ARM] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC). by Eugene Zelenko · 9 years ago
  57. f42454b Move the global variables representing each Target behind accessor function by Mehdi Amini · 9 years ago
  58. cd1d5aa Replace a few more "fall through" comments with LLVM_FALLTHROUGH by Justin Bogner · 9 years ago
  59. 39d2d09 [ARM] Add support for mrrc/mrrc2 intrinsics. by Ranjeet Singh · 9 years ago
  60. 0db7be8 Reverting r272778 because there's an assertion by Ranjeet Singh · 9 years ago
  61. 351364f [ARM] Add support for mrrc/mrrc2 intrinsics. by Ranjeet Singh · 9 years ago
  62. 933e1aa [ARM] Reverting r272544 because clang patch needs by Ranjeet Singh · 9 years ago
  63. 8feacb3 [ARM] Add mrrc/mrrc2 co-processor intrinsics by Ranjeet Singh · 9 years ago
  64. d906bf1 RAS extensions are part of ARMv8.2-A. This change enables them by introducing a by Sjoerd Meijer · 9 years ago
  65. f57c197 Reflect the MC/MCDisassembler split on the include/ level. by Benjamin Kramer · 10 years ago
  66. f277c8a [ARM] Add new system registers to ARMv8-M Baseline/Mainline by Bradley Smith · 10 years ago
  67. 65b8538 [ARM] Add ARMv8.2-A FP16 scalar instructions by Oliver Stannard · 10 years ago
  68. 47f2452 # This is a combination of 2 commits. # The first commit's message is: by Reid Kleckner · 10 years ago
  69. 42f6e90 [ARM] Add new system registers to ARMv8-M Baseline/Mainline by Bradley Smith · 10 years ago
  70. 187d33e Revert "[ARM] Add ARMv8.2-A FP16 scalar instructions" by Reid Kleckner · 10 years ago
  71. 2de8c16 [ARM] Add ARMv8.2-A FP16 vector instructions by Oliver Stannard · 10 years ago
  72. 48568cb [ARM] Add ARMv8.2-A FP16 scalar instructions by Oliver Stannard · 10 years ago
  73. 67cf33d Test commit by Vinicius Tinti · 10 years ago
  74. b4398107 [ARM] Allow SP in rGPR, starting from ARMv8 by Artyom Skrobov · 10 years ago
  75. cf29644 [ARM] Handle +t2dsp feature as an ArchExtKind in ARMTargetParser.def by Artyom Skrobov · 10 years ago
  76. f97999d Explicitly clear the MI operand list when getInstruction() is called. Call MI.clear() within MCD::OPC_Decode case and inside of translateInstruction() for the X86 target. Remove now unnecessary MI.clear() from ARMDisassembler. by Cameron Esfahani · 10 years ago
  77. f00654e Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) by Alexander Kornienko · 10 years ago
  78. 70bc5f1 Fixed/added namespace ending comments using clang-tidy. NFC by Alexander Kornienko · 10 years ago
  79. db0712f Use std::bitset for SubtargetFeatures. by Michael Kuperstein · 10 years ago
  80. e9119e4 MC: Modernize MCOperand API naming. NFC. by Jim Grosbach · 10 years ago
  81. c3434b3 Reverting r237234, "Use std::bitset for SubtargetFeatures" by Michael Kuperstein · 10 years ago
  82. aba4a34 Use std::bitset for SubtargetFeatures by Michael Kuperstein · 10 years ago
  83. 0e0f8d2 [ARM] Add v8.1a "Privileged Access Never" extension by Vladimir Sukharev · 11 years ago
  84. f817c1c Use 'override/final' instead of 'virtual' for overridden methods by Alexander Kornienko · 11 years ago
  85. 29704e7 Revert "Use std::bitset for SubtargetFeatures" by Michael Kuperstein · 11 years ago
  86. 774b441 Use std::bitset for SubtargetFeatures by Michael Kuperstein · 11 years ago
  87. efd7a96 Reverting r229831 due to multiple ARM/PPC/MIPS build-bot failures. by Michael Kuperstein · 11 years ago
  88. ba5b04c Use std::bitset for SubtargetFeatures by Michael Kuperstein · 11 years ago
  89. 3131e85 [ARM] SSAT/USAT with an 'asr #32' shift should result in an undefined encoding rather than unpredictable by Bradley Smith · 11 years ago
  90. cdfa931 Remove unused function. by Asiri Rathnayake · 11 years ago
  91. 30895f9 Add post-decode checking of HVC instruction. by Charlie Turner · 11 years ago
  92. 7fc5b87 Pass an ArrayRef to MCDisassembler::getInstruction. by Rafael Espindola · 11 years ago
  93. 4aa6bea Misc style fixes. NFC. by Rafael Espindola · 11 years ago
  94. f2572c5 [ARM] Remove dead code identified by the Clang static analyzer. by Tilmann Scheller · 11 years ago
  95. 9e89d8c [ARM] Honor FeatureD16 in the assembler and disassembler by Oliver Stannard · 11 years ago
  96. 39a85ab [Thumb2] Improve disassembly of memory hints by Oliver Stannard · 11 years ago
  97. 92c816c Thumb2 M-class MSR instruction support changes by Renato Golin · 11 years ago
  98. ee843ef ARM: implement MRS/MSR (banked reg) system instructions. by Tim Northover · 11 years ago
  99. 137ce60 Allow only disassembling of M-class MSR masks that the assembler knows how to assemble back. by James Molloy · 11 years ago
  100. 84e68b2 [Modules] Fix potential ODR violations by sinking the DEBUG_TYPE by Chandler Carruth · 11 years ago