1. 290183d [ARM] More care with Thumb1 writeback in ARMLoadStoreOptimizer by Scott Douglass · 10 years ago
  2. 5d485db [ARM] Register ARMPreAllocLoadStoreOpt pass with LLVM pass manager. by Chad Rosier · 10 years ago
  3. 9659de3 [ARM] Remove an unused reference to MachineRegisterInfo. NFC. by Chad Rosier · 10 years ago
  4. d9c1bc9 [ARM] Register (existing) ARMLoadStoreOpt pass with LLVM pass manager. by David Gross · 10 years ago
  5. 2ad5d17 Test commit. by David Gross · 10 years ago
  6. a50d220 ARMLoadStoreOpt: Merge subs/adds into LDRD/STRD; Factor out common code by Matthias Braun · 10 years ago
  7. e40d89e ARMLoadStoreOptimizer: Create LDRD/STRD on thumb2 by Matthias Braun · 10 years ago
  8. 731e359 Revert "ARMLoadStoreOptimizer: Create LDRD/STRD on thumb2" by Matthias Braun · 10 years ago
  9. 84e2897 Revert "ARMLoadStoreOpt: Merge subs/adds into LDRD/STRD; Factor out common code" by Matthias Braun · 10 years ago
  10. 22f3960 Revert "ARM: Use SpecificBumpPtrAllocator to fix leak introduced in r241920" by Matthias Braun · 10 years ago
  11. bd7287e Move most user of TargetMachine::getDataLayout to the Module one by Mehdi Amini · 10 years ago
  12. e3c8161 Clear kill flags in ARMLoadStoreOptimizer. by Pete Cooper · 10 years ago
  13. 6d8f785 Removing several -Wunused-but-set-variable warnings; NFC intended. by Aaron Ballman · 10 years ago
  14. e5a112f ARM: Use SpecificBumpPtrAllocator to fix leak introduced in r241920 by Matthias Braun · 10 years ago
  15. d9bd22b ARMLoadStoreOpt: Merge subs/adds into LDRD/STRD; Factor out common code by Matthias Braun · 10 years ago
  16. e4ba6b8 ARMLoadStoreOptimizer: Create LDRD/STRD on thumb2 by Matthias Braun · 10 years ago
  17. a4a3182d ARMLoadStoreOptimizer: Rewrite LDM/STM matching logic. by Matthias Braun · 10 years ago
  18. 83f0fbc ARM: add correct kill flags when combining stm instructions by Tim Northover · 10 years ago
  19. ba3ecc3 ARMLoadStoreOptimizer: Fix errata 602117 handling and make testcase actually test for it by Matthias Braun · 10 years ago
  20. d86e004 [ARM] ARMLoadStoreOpt::UpdateBaseRegUses should stop on def by John Brawn · 10 years ago
  21. f00654e Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) by Alexander Kornienko · 10 years ago
  22. 70bc5f1 Fixed/added namespace ending comments using clang-tidy. NFC by Alexander Kornienko · 10 years ago
  23. 113b2a9 [ARM] Make helper function static. by Benjamin Kramer · 11 years ago
  24. 125c9f5 ARM: Thumb2 LDRD/STRD supports independent input/output regs by Matthias Braun · 11 years ago
  25. 3a7bec8 Revert "ARM: Thumb2 LDRD/STRD supports independent input/output regs" by Renato Golin · 11 years ago
  26. e20dc1c ARM: Thumb2 LDRD/STRD supports independent input/output regs by Matthias Braun · 11 years ago
  27. ec50fa6 ARMLoadStoreOptimizer: Fix doxygen comments; NFC by Matthias Braun · 11 years ago
  28. e41e146 CodeGen: Use mop_iterator instead of MIOperands/ConstMIOperands by Matthias Braun · 11 years ago
  29. aa9fa35 ARMLoadStoreOptimizer: Code cleanup; NFC by Matthias Braun · 11 years ago
  30. fa3872e MachineInstr: Change return value of getOpcode() to unsigned. by Matthias Braun · 11 years ago
  31. 799003b Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used. by Benjamin Kramer · 11 years ago
  32. ae32649 In preparation for moving ARM's TargetRegisterInfo to the TargetMachine by Eric Christopher · 11 years ago
  33. b9887ef Improve handling of stack accesses in Thumb-1 by Renato Golin · 11 years ago
  34. 1b21f00 Migrate ARM except for TTI, AsmPrinter, and frame lowering by Eric Christopher · 11 years ago
  35. 8b77065 Move DataLayout back to the TargetMachine from TargetSubtargetInfo by Eric Christopher · 11 years ago
  36. 229eb4c Fix load-store optimizer on thumbv4t by Jonathan Roelofs · 11 years ago
  37. 7c558cf Grab the subtarget info off of the MachineFunction rather than by Eric Christopher · 11 years ago
  38. f5d0c7c [Thumb] Make load/store optimizer less conservative. by Moritz Roth · 11 years ago
  39. eef9f4d ARM load/store optimizer: Don't materialize a new base register with by Moritz Roth · 11 years ago
  40. dfdda0d Thumb1 load/store optimizer: Improve code to materialize new base register. by Moritz Roth · 11 years ago
  41. 71b7b68 Repace SmallPtrSet with SmallPtrSetImpl in function arguments to avoid needing to mention the size. by Craig Topper · 11 years ago
  42. 6230691 Revert "Repace SmallPtrSet with SmallPtrSetImpl in function arguments to avoid needing to mention the size." by Craig Topper · 11 years ago
  43. 5229cfd Repace SmallPtrSet with SmallPtrSetImpl in function arguments to avoid needing to mention the size. by Craig Topper · 11 years ago
  44. 8f37656 ARM: Fix and re-enable load/store optimizer for Thumb1. by Moritz Roth · 11 years ago
  45. 378a43b ARM load/store optimizer: Compute BaseKill correctly. by Moritz Roth · 11 years ago
  46. fc6de42 Have MachineFunction cache a pointer to the subtarget to make lookups by Eric Christopher · 11 years ago
  47. d913448 Remove the TargetMachine forwards for TargetSubtargetInfo based by Eric Christopher · 11 years ago
  48. c1fd09b Fix memory leak of RegScavenger accidentally added in r211037. by James Molloy · 11 years ago
  49. f6419cf Refactor the disabling of Thumb-1 LDM/STM generation by James Molloy · 11 years ago
  50. 65eea55 Fix a bug in the Thumb1 ARM Load/Store optimizer by Renato Golin · 11 years ago
  51. 556763d Fix the Load/Store optimization pass to work with Thumb1. by James Molloy · 12 years ago
  52. 92a1507 Enable the Load/Store optimization pass for Thumb1 but make it return immediately for now. by James Molloy · 12 years ago
  53. bb73c23 Fix a few comment typos and style issues. by James Molloy · 12 years ago
  54. 062a2ba [C++] Use 'nullptr'. Target edition. by Craig Topper · 12 years ago
  55. 84e68b2 [Modules] Fix potential ODR violations by sinking the DEBUG_TYPE by Chandler Carruth · 12 years ago
  56. a925326 Prune includes in ARM target. by Craig Topper · 12 years ago
  57. 6bc27bf [C++11] Add 'override' keyword to virtual methods that override their base class. by Craig Topper · 12 years ago
  58. b6d0bd4 [C++11] Replace llvm::next and llvm::prior with std::next and std::prev. by Benjamin Kramer · 12 years ago
  59. 3a377bc Now that we have C++11, turn simple functors into lambdas and remove a ton of boilerplate. by Benjamin Kramer · 12 years ago
  60. 569f69d ARM: correct liveness flags during ARMLoadStoreOpt by Tim Northover · 12 years ago
  61. d7e8d92 Swift: Only build vldm/vstm with q register aligned register lists by Arnold Schwaighofer · 12 years ago
  62. b94011f Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector size. by Craig Topper · 12 years ago
  63. 9ae4707 Simplify code. by Craig Topper · 12 years ago
  64. af0dea1 Use SmallVectorImpl::iterator/const_iterator instead of SmallVector to avoid specifying the vector size. by Craig Topper · 12 years ago
  65. 663150f ARM: Remove a (false) dependency on the memoryoperand's value as we do not use by Quentin Colombet · 12 years ago
  66. a2ff698 Fix for PR14824, An ARM Load/Store Optimization bug by Hao Liu · 13 years ago
  67. 91de828 Reverting 178851 as it broke buildbots by Renato Golin · 13 years ago
  68. 6b53a2f Buildbot fix for r178851: mistake was in wrong TargetRegisterInfo::getRegClass usage. by Stepan Dyatkovskiy · 13 years ago
  69. b309b3b3 Fix for PR14824: "Optimization arm_ldst_opt inserts newly generated instruction vldmia at incorrect position". by Stepan Dyatkovskiy · 13 years ago
  70. ace9c5d [arm load/store optimizer] When trying to merge a base update load/store, make by Chad Rosier · 13 years ago
  71. ab28b9a Radar numbers don't belong in source code. by Evan Cheng · 13 years ago
  72. 9fb823b Move all of the header files which are involved in modelling the LLVM IR by Chandler Carruth · 13 years ago
  73. 33f5d14 Add an MF argument to MI::copyImplicitOps(). by Jakob Stoklund Olesen · 13 years ago
  74. ed0881b Use the new script to sort the includes of every file under lib. by Chandler Carruth · 13 years ago
  75. cdfe20b Move TargetData to DataLayout. by Micah Villmow · 13 years ago
  76. 6ac277c Remove getARMRegisterNumbering and replace with calls into by Eric Christopher · 13 years ago
  77. 3c52f02 Add an MF argument to TRI::getPointerRegClass() and TII::getRegClass(). by Jakob Stoklund Olesen · 14 years ago
  78. 1e75fc1 ARM: Nuke remnant bogus code. by Jim Grosbach · 14 years ago
  79. c7242e0 Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change since they are equivalent. by Craig Topper · 14 years ago
  80. 8f99bc3a ARM LDR/LDRT has the same encoding collision as STR/STRT. by Jim Grosbach · 14 years ago
  81. d6a1a1d ARM: Don't form a t2LDRi8 or t2STRi8 with an offset of zero. by Jim Grosbach · 14 years ago
  82. b6a7a89 Don't kill the base register when expanding strd. by Jakob Stoklund Olesen · 14 years ago
  83. cdee326 Preserve implicit defs in ARMLoadStoreOptimizer. by Jakob Stoklund Olesen · 14 years ago
  84. 8cb9752 Revert r153516: "Invalidate liveness in Thumb2ITBlockPass." by Jakob Stoklund Olesen · 14 years ago
  85. 4acbcb3 ARMLoadStoreOptimizer invalidates register liveness. by Jakob Stoklund Olesen · 14 years ago
  86. f6e7e12 Remove unnecessary llvm:: qualifications by Craig Topper · 14 years ago
  87. 5fa0caa Prune includes and replace uses of ARMRegisterInfo.h with ARMBaeRegisterInfo.h by Craig Topper · 14 years ago
  88. b22310f Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. by Jia Liu · 14 years ago
  89. 45d8f8a0 Do not fold ADD / SUB into load / store (to form pre-indexed, post-indexed by Evan Cheng · 14 years ago
  90. 46a9f01 More dead code removal (using -Wunreachable-code) by David Blaikie · 14 years ago
  91. 642f0f6 ARM Ld/St Optimizer fix. by Andrew Trick · 14 years ago
  92. 7f8e563 Add bundle aware API for querying instruction properties and switch the code by Evan Cheng · 14 years ago
  93. 989eaf6 ARMLoadStoreOptimizer.cpp: Fix MSVC(Debug) build. by NAKAMURA Takumi · 14 years ago
  94. 28c1d18 Preserve MachineMemOperands in ARMLoadStoreOptimizer. by Andrew Trick · 14 years ago
  95. 94307f6 Hide cpu name checking in ARMSubtarget. by Evan Cheng · 14 years ago
  96. c3770ac Add workaround for Cortex-M3 errata 602117 by replacing ldrd x, y, [x] with ldm or ldr pairs. by Evan Cheng · 14 years ago
  97. 243274c Apply the same fix for the change in LDR_PRE_IMM/LDRB_PRE_IMM operand encodings to the load-store optimizer that I applied to the instruction selector in r138758. Fixes ary3 from the nightly test suite. by Owen Anderson · 14 years ago
  98. 6314343 Update the load-store optimizer for changes to the operands on LDR_PRE_IMM and LDRB_PRE_IMM in r138653. by Owen Anderson · 14 years ago
  99. 16d33f3 invalid-LDR_PRE-arm.txt was already passing, but for the wrong reasons. We were failing to specify enough fixed bits of LDR_PRE/LDRB_PRE, resulting in decoding conflicts. Separate them into immediate vs. register versions, allowing us to specify the necessary fixed bits. This in turn results in the test being decoded properly, and being rejected as UNPREDICTABLE rather than a hard failure. by Owen Anderson · 14 years ago
  100. 2325474 ARM STR_POST_IMM offset encoding fix in load/store optimizer. by Jim Grosbach · 14 years ago