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gerrit-public.fairphone.software / toolchain / llvm-project / 31edb51a4f274e97a9c54ae830b1896c690b8cf7 / llvm / utils / TableGen / CodeGenTarget.cpp
  1. 13d4a07 Use ArrayRef<MVT::SimpleValueType> when possible. by Jakob Stoklund Olesen · 13 years ago
  2. 517afbf Added 6 more value types: v32i1, v64i1, v32i16, v32i8, v64i8, v8f64 by Elena Demikhovsky · 13 years ago
  3. 91d19d8 Sort the #include lines for utils/... by Chandler Carruth · 13 years ago
  4. 635debe Remove exception handling usage from tblgen. by Joerg Sonnenberger · 13 years ago
  5. 75e29c4 Add in new data types that are used by AMDIL/ANL among others. by Micah Villmow · 13 years ago
  6. ccd682c Compute a map from register names to registers, rather than scanning the list of registers every time we want to look up a register by name. by Owen Anderson · 13 years ago
  7. 7c277da Add a new optimization pass: Stack Coloring, that merges disjoint static allocations (allocas). Allocas are known to be by Nadav Rotem · 13 years ago
  8. 9dc03bb Add CodeGenTarget::guessInstructionProperties. by Jakob Stoklund Olesen · 13 years ago
  9. 87255e3 I'm introducing a new machine model to simultaneously allow simple by Andrew Trick · 13 years ago
  10. 91118a6 whitespace by Andrew Trick · 13 years ago
  11. ff9e08b rdar://11542750 - llvm.trap should be marked no return. by Chris Lattner · 13 years ago
  12. 53733cd Revert "Emit the SubRegTable with the smallest possible integer type." by Jim Grosbach · 14 years ago
  13. c80c3fd Emit the SubRegTable with the smallest possible integer type. by Benjamin Kramer · 14 years ago
  14. c4965bc Convert assert(0) to llvm_unreachable by Craig Topper · 14 years ago
  15. 9bcb721 Added MVT::v2f16 by Pete Cooper · 14 years ago
  16. 85d684a Split AsmParser into two components - AsmParser and AsmParserVariant by Devang Patel · 14 years ago
  17. 94580ab Add basic generic CodeGen support for half. by Dan Gohman · 14 years ago
  18. 2a81dd4 First chunk of MachineInstr bundle support. by Evan Cheng · 14 years ago
  19. ca2f78a Rename MVT::untyped to MVT::Untyped to match similar nomenclature. by Owen Anderson · 14 years ago
  20. 84c287e Move TableGen's parser and entry point into a library by Peter Collingbourne · 14 years ago
  21. 19be2ab Switch to ArrayRef<CodeGenRegisterClass*>. by Jakob Stoklund Olesen · 14 years ago
  22. af8ee2c Unconstify Inits by David Greene · 14 years ago
  23. 1aa0e3e [AVX] Constify Inits by David Greene · 14 years ago
  24. 71520a8 Revert r134921, 134917, 134908 and 134907. They're causing failures by Eric Christopher · 14 years ago
  25. af973b4 [AVX] Make Inits Foldable by David Greene · 14 years ago
  26. a84be6c Add support for alternative register names, useful for instructions whose operands are logically equivalent to existing registers, but happen to be printed specially. For example, an instruciton that prints d0[0] instead of s0. by Owen Anderson · 14 years ago
  27. 8e188be Store CodeGenRegisters as pointers so they won't be reallocated. by Jakob Stoklund Olesen · 14 years ago
  28. f5a0ca4 Fix formatting. by Owen Anderson · 14 years ago
  29. 96adc4a Add a new MVT::untyped. This will be used in future work for modelling ISA features like register pairs and lists with "interesting" constraints (such as ARM NEON contiguous register lists or even-odd paired registers). We need to be able to generate these instructions (often from intrinsics), but don't want to have to assign a legal type to them. Instead, we'll use an "untyped" edge to bypass the type-checking and simply ensure that the register classes match. by Owen Anderson · 14 years ago
  30. d7bc5c2 Give CodeGenRegisterClass a real sorted member set. by Jakob Stoklund Olesen · 14 years ago
  31. 22ea424 Move the list of register classes into CodeGenRegBank as well. by Jakob Stoklund Olesen · 14 years ago
  32. 84bd44e Move the list of registers into CodeGenRegBank. by Jakob Stoklund Olesen · 14 years ago
  33. 76a5a71 Move some sub-register index calculations to CodeGenRegisters.cpp by Jakob Stoklund Olesen · 14 years ago
  34. 68d6d8a Move TableGen's register bank classes to their own source file. by Jakob Stoklund Olesen · 14 years ago
  35. 75703ca Make it possible to have unallocatable register classes. by Jakob Stoklund Olesen · 14 years ago
  36. 375dcc9 Change how tblgen generates attributes for intrinsics to use a single by John McCall · 14 years ago
  37. c8c4ded Teach TableGen to automatically generate missing SubRegIndex instances. by Jakob Stoklund Olesen · 14 years ago
  38. 6b3396f Don't allow per-register spill size and alignment. by Jakob Stoklund Olesen · 15 years ago
  39. 0e34c1d Prefer cheap registers for busy live ranges. by Jakob Stoklund Olesen · 15 years ago
  40. eb52c23 Make the register enum value part of the CodeGenRegister struct. by Jim Grosbach · 15 years ago
  41. f910bf2 Trailing whitespace. by Jim Grosbach · 15 years ago
  42. 2a0a3b4 Flag -> Glue, the ongoing saga by Chris Lattner · 15 years ago
  43. 3e5fbd7 rename MVT::Flag to MVT::Glue. "Flag" is a terrible name for by Chris Lattner · 15 years ago
  44. 89dcb68 various cleanups to tblgen, patch by Garrison Venn! by Chris Lattner · 15 years ago
  45. 77d369c eliminate the Records global variable, patch by Garrison Venn! by Chris Lattner · 15 years ago
  46. 77d3ead a bunch of random cleanup, move a helper to CGT where it belongs. by Chris Lattner · 15 years ago
  47. a397716 eliminate the old InstFormatName which is always "AsmString", by Chris Lattner · 15 years ago
  48. 0e023ea fix a long standing wart: all the ComplexPattern's were being by Chris Lattner · 15 years ago
  49. 3538021 Add an MVT::x86mmx type. It will take the place of all current MMX vector types. by Bill Wendling · 15 years ago
  50. 02b701f Fix whitespace, because I'm OCD. by Bill Wendling · 15 years ago
  51. ddb2d65 Remove IntrWriteMem, as it's the default. Rename IntrWriteArgMem by Dan Gohman · 15 years ago
  52. 499f797 Rename DBG_LABEL PROLOG_LABEL, because it's only used during prolog emission and by Bill Wendling · 15 years ago
  53. 676a15b Add a new target independent COPY instruction and code to lower it. by Jakob Stoklund Olesen · 15 years ago
  54. 3b1657b Clean up TargetOpcodes.h a bit, and limit the number of places where the full by Jakob Stoklund Olesen · 15 years ago
  55. d1d7ed6 Add StringRef::compare_numeric and use it to sort TableGen register records. by Jakob Stoklund Olesen · 15 years ago
  56. edab242 Replace the tablegen RegisterClass field SubRegClassList with an alist-like data by Jakob Stoklund Olesen · 15 years ago
  57. 670a410 Adding a v8i64 512-bit vector type. This will be used to model ARM NEON intrinsics which translate into a pair of vld / vst instructions that can load / store 8 consecutive 64-bit (D) registers. by Evan Cheng · 15 years ago
  58. 6656153 Add a pseudo instruction REG_SEQUENCE that takes a list of registers and by Evan Cheng · 16 years ago
  59. 4a5f7be fix CodeGenTarget::getRegisterVTs to not return the by Chris Lattner · 16 years ago
  60. b424faa reject void in intrinsic type lists. by Chris Lattner · 16 years ago
  61. 2109cb4 Change intrinsic result type for void to store it as an empty list by Chris Lattner · 16 years ago
  62. 3e2bb70 Revert r99009 temporarily it seems to be breaking the bots. by Eric Christopher · 16 years ago
  63. 933b2cf Change intrinsic result type for void to store it as an empty list by Chris Lattner · 16 years ago
  64. 83aeaab add a new SDNPVariadic SDNP node flag, and use it in by Chris Lattner · 16 years ago
  65. 1802b17 Finally change the instruction looking map to be a densemap from by Chris Lattner · 16 years ago
  66. 4763dbe make inst_begin/inst_end iterate over InstructionsByEnumValue. by Chris Lattner · 16 years ago
  67. 2d822ab revert 98912 by Chris Lattner · 16 years ago
  68. 45e2fc5 make inst_begin/inst_end iterate over InstructionsByEnumValue. by Chris Lattner · 16 years ago
  69. 918be52 change Target.getInstructionsByEnumValue to return a reference by Chris Lattner · 16 years ago
  70. c9ae94c factor copy and paste code. by Chris Lattner · 16 years ago
  71. 9aec14b look up instructions by record, not by name. by Chris Lattner · 16 years ago
  72. cabe037 Completely rewrite tblgen's type inference mechanism, by Chris Lattner · 16 years ago
  73. b06015a move target-independent opcodes out of TargetInstrInfo by Chris Lattner · 16 years ago
  74. 881ba0b Remove DEBUG_DECLARE, looks like we don't need it. by Dale Johannesen · 16 years ago
  75. 237254d Add DEBUG_DECLARE. Not used yet. by Dale Johannesen · 16 years ago
  76. 8f04740 Add DEBUG_VALUE. Not used yet. by Dale Johannesen · 16 years ago
  77. b91411c Remove the CPAttrParentAsRoot code, which is unused, and inconvenient by Dan Gohman · 16 years ago
  78. dc9efe8 Introduce the TargetInstrInfo::KILL machine instruction and get rid of the by Jakob Stoklund Olesen · 16 years ago
  79. 9f94459 Split EVT into MVT and EVT, the former representing _just_ a primitive type, while by Owen Anderson · 16 years ago
  80. 781797f Fix a few more places in TableGen that need to handle EVT::vAny types. by Bob Wilson · 16 years ago
  81. 2cd5da8 Add a new overloaded EVT::vAny type for use in TableGen to allow intrinsic by Bob Wilson · 16 years ago
  82. 53aa7a9 Rename MVT to EVT, in preparation for splitting SimpleValueType out into its own struct type. by Owen Anderson · 16 years ago
  83. 0033199 Match X86 register names to number. by Daniel Dunbar · 16 years ago
  84. 9ad1594 Remove the v3i32 and v3f32 value types: they are not by Duncan Sands · 16 years ago
  85. c6026b5 Revert 75308. by Bob Wilson · 16 years ago
  86. 73fd66c Add new vector types for 192-bit, 348-bit and 512-bit sizes. by Bob Wilson · 16 years ago
  87. bf8e4c1 Refactor TableGen's llvm::getName to share code with llvm::getEnumName, by Bob Wilson · 16 years ago
  88. 5832e7f Add new ValueType for metadata. by Devang Patel · 16 years ago
  89. 38a22bf Replace std::iostreams with raw_ostream in TableGen. by Daniel Dunbar · 16 years ago
  90. f92ba97 by David Greene · 16 years ago
  91. 5234d37 Revert 72707 and 72709, for the moment. by Dale Johannesen · 16 years ago
  92. 0b8ca79 Make the implicit inputs and outputs of target-independent by Dale Johannesen · 16 years ago
  93. b8c370a Fix PR3994: LLVMMatchType arguments do not refer to absolute return value by Bob Wilson · 17 years ago
  94. 6c14263 Rename COPY_TO_SUBCLASS to COPY_TO_REGCLASS, and generalize by Dan Gohman · 17 years ago
  95. 60a446a Add a new TargetInstrInfo MachineInstr opcode, COPY_TO_SUBCLASS. by Dan Gohman · 17 years ago
  96. b842d52 Reapply 63765. Patches for clang and llvm-gcc to follow. by Dale Johannesen · 17 years ago
  97. ae616c2 Reverting 63765. This broke the build of both clang and llvm-gcc. by Dale Johannesen · 17 years ago
  98. 6ae3aa8 New feature: add support for target intrinsics being defined in the by Nate Begeman · 17 years ago
  99. 9a3113a add nocapture attribute to llvm.mem* intrinsics and have tblgen by Chris Lattner · 17 years ago
  100. f76486a Improve support for type-generic vector intrinsics by teaching TableGen how by Bob Wilson · 17 years ago