- a20cde3 Sink ARMMCExpr and ARMAddressingModes into MC layer. First step to separate ARM MC code from target. by Evan Cheng · 14 years ago
- 68b0e84 Fix off-by-one error. by Jim Grosbach · 14 years ago
- 4def704 Pseudo-ize t2MOVCC[ri]. by Jim Grosbach · 14 years ago
- e9cc901 Refact ARM Thumb1 tMOVr instruction family. by Jim Grosbach · 14 years ago
- ed5134a Size reducing SP adjusting t2ADDri needs to check predication. by Jim Grosbach · 14 years ago
- a8a8067 Remove redundant Thumb2 ADD/SUB SP instruction definitions. by Jim Grosbach · 14 years ago
- 6cc775f - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and by Evan Cheng · 14 years ago
- 1d0c257 use the MachineInstrBuilder operator-> to simplify some code. by Chris Lattner · 15 years ago
- a2881ee Avoid some 's' 16-bit instruction which partially update CPSR by Bob Wilson · 15 years ago
- acca7ad Handle MI flags inside Thumb2SizeReduction pass. by Anton Korobeynikov · 15 years ago
- 4ebf471 Revert both r121082 (which broke a bunch of constant pool stuff) and r125074 (which worked around it). This should get us back to the old, correct behavior, though it will make the integrated assembler unhappy for the time being. by Owen Anderson · 15 years ago
- 558ccef Temporary workaround for a bad bug introduced by r121082 which replaced by Evan Cheng · 15 years ago
- 092a7bd The tLDR et al instructions were emitting either a reg/reg or reg/imm by Bill Wendling · 15 years ago
- 327cf8e Refactor the ARM CMPz* patterns to just use the normal CMP instructions when by Jim Grosbach · 15 years ago
- 99ea8a3 Second attempt at converting Thumb2's LDRpci, including updating the gazillion places that need to know about it. by Owen Anderson · 15 years ago
- ed854ba The Thumb tADDrSPi instruction is not valid when the destination is SP. by Bob Wilson · 15 years ago
- 5bae054 Correctly size-reduce the t2CMPzrr instruction to tCMPzr when possible. by Jim Grosbach · 15 years ago
- bc6af0c Reduce t2 ldr/str instructions to the correct t1 versions when there's an by Jim Grosbach · 15 years ago
- 2a862cd Size reduction for tPUSH come from t2STMDB_UPD, not t2STMIA_UPD. by Jim Grosbach · 15 years ago
- a68e3a5 Encode the multi-load/store instructions with their respective modes ('ia', by Bill Wendling · 15 years ago
- bc7eeaf Clarify comment by Jim Grosbach · 15 years ago
- 88628e9 To shrink a t2LDM instruction to the 16-bit wide tLDM instruction, the base by Jim Grosbach · 15 years ago
- a7aed18 Reapply r110396, with fixes to appease the Linux buildbot gods. by Owen Anderson · 15 years ago
- bda59bd Revert r110396 to fix buildbots. by Owen Anderson · 15 years ago
- 755aceb Don't use PassInfo* as a type identifier for passes. Instead, use the address of the static by Owen Anderson · 15 years ago
- 279e55f PR7458: Try commuting Thumb2 instruction operands to put them into 2-address by Bob Wilson · 15 years ago
- 57c6fd4 fix typo by Jim Grosbach · 15 years ago
- a1cf9fe Use MachineBasicBlock::isLiveIn. by Dan Gohman · 16 years ago
- 13f4db8 Fix another warning. There is a functionality change but I believe it's correct. by Benjamin Kramer · 16 years ago
- 947f04b Change ARM ld/st multiple instructions to have variant instructions for by Bob Wilson · 16 years ago
- f7279bd Radar 7417921 by Jim Grosbach · 16 years ago
- 267430f Fix PR5694. The CMN instructions set the flags differently from CMP, so they by Jim Grosbach · 16 years ago
- a48f44d improve portability to avoid conflicting with std::next in c++'0x. by Chris Lattner · 16 years ago
- 2522908 Materialize global addresses via movt/movw pair, this is always better by Anton Korobeynikov · 16 years ago
- 2a6c92f Shrink ldr / str [sp, imm0-1024] to 16-bit instructions. by Evan Cheng · 16 years ago
- 974e12b Remove includes of Support/Compiler.h that are no longer needed after the by Nick Lewycky · 16 years ago
- 02d5f77 Remove VISIBILITY_HIDDEN from class/struct found inside anonymous namespaces. by Nick Lewycky · 16 years ago
- 83e0d48 Make ARM and Thumb2 32-bit immediate materialization into a single 32-bit pseudo by Evan Cheng · 16 years ago
- cf61d68 Cast MO.getImm() to unsigned before comparing with an unsigned limit. by Evan Cheng · 16 years ago
- 89720bb Remove some not-really-used variables, as warned by Duncan Sands · 16 years ago
- a6f074f remove various std::ostream version of printing methods from by Chris Lattner · 16 years ago
- 2c64130 Fix use after free in Thumb2SizeReduction (PR4707). A MachineInstr was used after erasure. by Benjamin Kramer · 16 years ago
- 6ddd7bc Turn on if-conversion for thumb2. by Evan Cheng · 16 years ago
- db73d68 Shrink ADR and LDR from constantpool late during constantpool island pass. by Evan Cheng · 16 years ago
- aee7e49 PredCC is meant to be 2 bits wide, like PredCC1. by Evan Cheng · 16 years ago
- bb2af35 Shrink Thumb2 movcc instructions. by Evan Cheng · 16 years ago
- 1e6c2a1 Shrink ADDS, ADC, RSB, and SUBS. by Evan Cheng · 16 years ago
- f6a9d06 Shrinkify Thumb2 r = add sp, imm. by Evan Cheng · 16 years ago
- cc9ca35 Shrinkify Thumb2 load / store multiple instructions. by Evan Cheng · 16 years ago
- 806845d Fix the previous accidental commit. Now shrinking common Thumb2 load / store instructions. by Evan Cheng · 16 years ago
- 3606467 Fix Thumb2 load / store addressing mode matching code. Do not use so_reg form to by Evan Cheng · 16 years ago
- 5bb93ce Watch out for empty BB. by Evan Cheng · 16 years ago
- 8a640ae rev, rev16, and revsh do not set CPSR. by Evan Cheng · 16 years ago
- f16a1d5 Duh. Most 16-bit Thumb rr instructions are two-address. Fix table. by Evan Cheng · 16 years ago
- 1f5bee1 CPSR can be livein; transfer predicate operands correctly; tMUL is two-address. by Evan Cheng · 16 years ago
- 51cbd2d Add support to reduce most of 32-bit Thumb2 arithmetic instructions. by Evan Cheng · 16 years ago
- d461c1c Add support to convert 32-bit instructions to 16-bit non-two-address ones. by Evan Cheng · 16 years ago
- 1be453b Add a skeleton Thumb2 instruction size reduction pass. by Evan Cheng · 16 years ago