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gerrit-public.fairphone.software / toolchain / llvm-project / 3a4be0fdefc64931e6ae95165c529a916e4dd32d / llvm / lib / CodeGen / SelectionDAG / TargetLowering.cpp
  1. 3a4be0f Rename MRegisterInfo to TargetRegisterInfo. by Dan Gohman · 18 years ago
  2. 47a7d6f Factor the addressing mode and the load/store VT out of LoadSDNode by Dan Gohman · 18 years ago
  3. 2b3bc30 Handle 'X' constraint in asm's better. by Dale Johannesen · 18 years ago
  4. ec3da55 Forgot these. by Evan Cheng · 18 years ago
  5. bc6cf9e remove extraneous &'s. by Chris Lattner · 18 years ago
  6. 1ea55cf This commit changes: by Chris Lattner · 18 years ago
  7. ee8df1f Add support for targets that have a legal ISD::TRAP. by Chris Lattner · 18 years ago
  8. 53c954f Output sinl for a long double FSIN node, not sin. by Duncan Sands · 18 years ago
  9. 96317d2 fix typo duncan noticed! by Chris Lattner · 18 years ago
  10. f3ebc3f Remove attribution from file headers, per discussion on llvmdev. by Chris Lattner · 18 years ago
  11. 3b6a821 Fold comparisons against a constant nan, and optimize ORD/UNORD by Chris Lattner · 18 years ago
  12. de272b1 initial code for forming an FGETSIGN node. This is disabled until by Chris Lattner · 18 years ago
  13. 843cad4 Add a new FGETSIGN operation, which defaults to expand on all targets. by Chris Lattner · 18 years ago
  14. 6f026a6 Support returning non-power-of-2 vectors to unblock some work by Nate Begeman · 18 years ago
  15. 797d56f Much improved pic jumptable codegen: by Evan Cheng · 18 years ago
  16. f14006f Didn't mean to check these in. by Evan Cheng · 18 years ago
  17. 1bf16631 Bug fix. Passive nodes are not in SUnitMap. by Evan Cheng · 18 years ago
  18. fa0df55 Move the LowerMEMCPY and LowerMEMCPYCall to a common place. by Rafael Espindola · 18 years ago
  19. 4646aa3 Make labels work in asm blocks; allow labels as by Dale Johannesen · 18 years ago
  20. fd66486 Add runtime library names for pow. by Dan Gohman · 18 years ago
  21. a160361 Migrate X86 and ARM from using X86ISD::{,I}DIV and ARMISD::MULHILO{U,S} to by Dan Gohman · 18 years ago
  22. c0154c0 First round of ppc long double. call/return and by Dale Johannesen · 18 years ago
  23. 25a00a6 Add sqrt and powi intrinsics for long double. by Dale Johannesen · 18 years ago
  24. 5e1a428 Move the setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand) and by Dan Gohman · 18 years ago
  25. b3d01d2 initialize SetCCResultContents, fixing PR1693 by Chris Lattner · 18 years ago
  26. 7d67e54 More long double fixes. x86_64 should build now. by Dale Johannesen · 18 years ago
  27. e2f23a3 Add lengthof and endof templates that hide a lot of sizeof computations. by Owen Anderson · 18 years ago
  28. d8c9cb9 rename isOperandValidForConstraint to LowerAsmOperandForConstraint, by Chris Lattner · 18 years ago
  29. ba1a98a long double 9 of N. This finishes up the X86-32 bits by Dale Johannesen · 18 years ago
  30. 6decfbf Initialize the IndexedModeActions array with memset before by Dan Gohman · 18 years ago
  31. 7867793 Add new TargetLowering code to provide the final register type that an by Dan Gohman · 18 years ago
  32. a866514 Generalize MVT::ValueType and associated functions to be able to represent by Dan Gohman · 18 years ago
  33. 309d3d5 Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from by Dan Gohman · 18 years ago
  34. 8e8d34b Tidy up ValueType names in comments. by Dan Gohman · 18 years ago
  35. 04deef3 Rename TargetLowering::getNumElements and friends to by Dan Gohman · 18 years ago
  36. 397c4d9 Fix CodeGen/PowerPC/2007-05-30-dagcombine-miscomp.ll, and PR1473. by Chris Lattner · 19 years ago
  37. 1fa8276 same patch as the previous one, but the symmetric case by Chris Lattner · 19 years ago
  38. b08cbbd7 Disable the (A == (B-A)) -> 2*A == B xform when the sub has multiple uses (in by Chris Lattner · 19 years ago
  39. 1796f1f Qualify several calls to functions in the MVT namespace, for consistency. by Dan Gohman · 19 years ago
  40. 0184f88 disable MaskedValueIsZero, ComputeMaskedBits, and SimplifyDemandedBits for by Chris Lattner · 19 years ago
  41. 429178d Add target hook to specify block size limit for if-conversion. by Evan Cheng · 19 years ago
  42. 44a2ed6 Allow i/s to match (gv+c). This fixes CodeGen/PowerPC/2007-05-03-InlineAsm-S-Constraint.ll by Chris Lattner · 19 years ago
  43. 15c1b82 fix a pasto by Chris Lattner · 19 years ago
  44. 4aff52b Fix a bug in my previous patch, grabbing the shift amount width from the by Chris Lattner · 19 years ago
  45. 9a861a8 Fold (x << c1)>> c2 into a single shift if the bits shifted out aren't used. by Chris Lattner · 19 years ago
  46. fb80151 Removed tabs everywhere except autogenerated & external files. Add make by Anton Korobeynikov · 19 years ago
  47. 784a68a Fix weirdness handling single element vectors. by Chris Lattner · 19 years ago
  48. 35f0417 remove dead target hooks. by Chris Lattner · 19 years ago
  49. 39f6533 remove some dead target hooks, subsumed by isLegalAddressingMode by Chris Lattner · 19 years ago
  50. f2d71d4 switch TL::getValueType to use MVT::getValueType. by Chris Lattner · 19 years ago
  51. ac3f815 add one addressing mode description hook to rule them all. by Chris Lattner · 19 years ago
  52. c2cba18 Remove isLegalAddressImmediate. by Evan Cheng · 19 years ago
  53. 3d7efa2 implement initial support for the silly X constraint. Testcase here: CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll by Chris Lattner · 19 years ago
  54. 843e445 Implement CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.ll by Chris Lattner · 19 years ago
  55. d685514 switch TargetLowering::getConstraintType to take the entire constraint, by Chris Lattner · 19 years ago
  56. 0c6bb5e repair x86 performance, dejagnu problems from previous change by Dale Johannesen · 19 years ago
  57. bacf4ac do not share old induction variables when this would result in invalid by Dale Johannesen · 19 years ago
  58. a2a2fd1 Added isLegalAddressExpression hook to test if the given expression can be by Evan Cheng · 19 years ago
  59. b7004fd More flexible TargetLowering LSR hooks for testing whether an immediate is a legal target address immediate or scale. by Evan Cheng · 19 years ago
  60. 168c585 initialize a instance variable by Chris Lattner · 19 years ago
  61. d7ef3f8 Fix CodeGen/Generic/2007-02-23-DAGCombine-Miscompile.ll and PR1219 by Chris Lattner · 19 years ago
  62. 3e3a65b Need to init. by Jim Laskey · 19 years ago
  63. a9f917a Implement i/n/s constraints correctly. This fixes by Chris Lattner · 19 years ago
  64. d84d35b For PR1195: by Reid Spencer · 19 years ago
  65. d08d31f Fix PR1198, by adding initial i128 support. Patch by Dan Gohman. by Chris Lattner · 19 years ago
  66. 92658d5 Move SimplifySetCC to TargetLowering and allow it to be shared with legalizer. by Evan Cheng · 19 years ago
  67. 296a83c Fit in 80 columns by Chris Lattner · 19 years ago
  68. 53026f1 Allow the target to override the ISD::CondCode that's to be used to test the by Evan Cheng · 19 years ago
  69. ddf1421b8 Move a function out of line. by Reid Spencer · 19 years ago
  70. 61a4be8 Minor fix. by Evan Cheng · 19 years ago
  71. 31cbddf Store default libgcc routine names and allow them to be redefined by target. by Evan Cheng · 19 years ago
  72. 3b7c257 Cleaned setjmp/longjmp lowering interfaces. Now we're producing right by Anton Korobeynikov · 19 years ago
  73. 4eee724 Preliminary soft float support. by Evan Cheng · 19 years ago
  74. 5d5916b Fix the dag combiner bug corresponding to PR1014. by Chris Lattner · 19 years ago
  75. d550248 Add a mechanism to specify whether a target supports a particular indexed load / store. by Evan Cheng · 19 years ago
  76. de46e48 For PR786: by Reid Spencer · 19 years ago
  77. 8c6949e Change the prototype for TargetLowering::isOperandValidForConstraint by Chris Lattner · 19 years ago
  78. ab51cf2 Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode. by Evan Cheng · 19 years ago
  79. d35734b Naming consistency. by Evan Cheng · 19 years ago
  80. e71fe34d Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes. by Evan Cheng · 19 years ago
  81. a389a61 initialize ivar by Chris Lattner · 19 years ago
  82. 5d9fd97 Combine ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD into ISD::LOADX. Add an by Evan Cheng · 19 years ago
  83. 0dce331 Change the default to 0, which means 'default'. by Chris Lattner · 19 years ago
  84. 373be1d forgot this by Duraid Madina · 19 years ago
  85. 85ea83e Add some advice by Chris Lattner · 19 years ago[Renamed from llvm/lib/Target/TargetLowering.cpp]
  86. af5ae57 Fix a typo that causes 2006-07-07-ComputeMaskedBits.ll to fail. by Evan Cheng · 19 years ago
  87. c5bb8ab Port some bugfixes in shift handling from SimplifyDemandedBits over to by Chris Lattner · 19 years ago
  88. 8cac9cd TargetLowering::ComputeMaskedBits was not clearing reciprocal bits on shifts. by Jim Laskey · 19 years ago
  89. 0e57b2c Start on my todo list by Andrew Lenharth · 19 years ago
  90. 19aaaca Another typo. Pointed out by Nate Begeman. by Evan Cheng · 20 years ago
  91. 6dcec44 Fix an obvious bug in getPackedTypeBreakdown. Return 1 if type is legal. by Evan Cheng · 20 years ago
  92. 20eb2ce this should be 128 I think by Andrew Lenharth · 20 years ago
  93. 1dc9ec5 Move this code to a common place by Andrew Lenharth · 20 years ago
  94. 8c2c1e9 Refactor a bunch of includes so that TargetMachine.h doesn't have to include by Owen Anderson · 20 years ago
  95. 10c6537 When tracking demanded bits, if any bits from the sext of an SRA are demanded, by Chris Lattner · 20 years ago
  96. cd4a643 Use ComputeMaskedBits to determine # sign bits as a fallback. This allows us by Chris Lattner · 20 years ago
  97. 4f3de3e Add some more sign propagation cases by Chris Lattner · 20 years ago
  98. f860757 Add some more simple sign bit propagation cases. by Chris Lattner · 20 years ago
  99. 7206d74 Add some really really simple code for computing sign-bit propagation. by Chris Lattner · 20 years ago
  100. 86a1467 Fold (trunc (srl x, c)) -> (srl (trunc x), c) by Chris Lattner · 20 years ago