1. 5bf46ac1 AMDGPU/SI: add llvm.amdgcn.image.atomic.* intrinsics by Nikolay Haustov · 10 years ago
  2. f0f2462 Revert "[AMDGPU] Using table-driven amd_kernel_code_t field parser in assembler." by Nikolay Haustov · 10 years ago
  3. 73447a9 [AMDGPU] Using table-driven amd_kernel_code_t field parser in assembler. by Nikolay Haustov · 10 years ago
  4. ea8febd [TableGen] AsmMatcher: Skip optional operands in the midle of instruction if it is not present by Nikolay Haustov · 10 years ago
  5. 2f684f1 [AMDGPU] Assembler: Basic support for MIMG by Nikolay Haustov · 10 years ago
  6. 2e4c729 [AMDGPU] Assembler: Simplify handling of optional operands by Nikolay Haustov · 10 years ago
  7. 3d3d0f4 Revert r261742, "[AMDGPU] Assembler: Simplify handling of optional operands" by NAKAMURA Takumi · 10 years ago
  8. 4f073ca [AMDGPU] Assembler: Simplify handling of optional operands by Nikolay Haustov · 10 years ago
  9. d93a34f [AMDGPU][llvm-mc] Support for 32-bit inline literals by Tom Stellard · 10 years ago
  10. 10813a4 Test commit access. by Nikolay Haustov · 10 years ago
  11. ac5e36f Fix uninitialized memory read. by Benjamin Kramer · 10 years ago
  12. e993451 [AMDGPU] Fix for "v_div_scale_f64 reg, vcc, ..." parsing by Tom Stellard · 10 years ago
  13. a90b952 [AMDGPU] Assembler: Fix VOP3 only instructions by Tom Stellard · 10 years ago
  14. 3d2c852 AMDGPU: waitcnt operand fixes by Tom Stellard · 10 years ago
  15. b3e8a6d Move MCTargetAsmParser.h to llvm/MC/MCParser where it belongs. by Benjamin Kramer · 10 years ago
  16. 2b65ed3 AMDGPU/SI: Fix encoding for FLAT_SCRATCH registers on VI by Tom Stellard · 10 years ago
  17. 9760f03 AMDGPU/SI: Emit constant arrays in the .hsrodata_readonly_agent section by Tom Stellard · 10 years ago
  18. 00f2f91 AMDGPU/SI: Correctly emit agent global segment variables when targeting HSA by Tom Stellard · 10 years ago
  19. 3b15967 AMDGPU: Disallow flat_scr in SI assembler by Matt Arsenault · 10 years ago
  20. b11ef08 Reduce the size of MCRelaxableFragment. by Akira Hatanaka · 10 years ago
  21. bd9fc28 [MCTargetAsmParser] Move the member varialbes that reference by Akira Hatanaka · 10 years ago
  22. 1e1b05d AMDGPU/SI: Emit HSA kernels with symbol type STT_AMDGPU_HSA_KERNEL by Tom Stellard · 10 years ago
  23. 68802d3 AMDGPU: Disallow s[102:103] on VI in assembler by Matt Arsenault · 10 years ago
  24. aac9b49 AMDGPU: Make flat_scratch name consistent by Matt Arsenault · 10 years ago
  25. 967c2f5 AMDGPU: Fix asserts on invalid register ranges by Matt Arsenault · 10 years ago
  26. 3473c72 AMDGPU: Fix off by one error in register parsing by Matt Arsenault · 10 years ago
  27. 2ea0a23 AMDGPU: Print modifiers when dumping AMDGPUOperand by Matt Arsenault · 10 years ago
  28. 382557e AMDGPU: Fix parsing of 32-bit literals with sign bit set by Matt Arsenault · 10 years ago
  29. 88e0b25 AMDGPU/SI: Add 64-bit versions of v_nop and v_clrexcp by Tom Stellard · 10 years ago
  30. e135ffd AMDGPU/SI: Use .hsatext section instead of .text for HSA by Tom Stellard · 10 years ago
  31. 4e9b03d6 Don't pass StringRefs around by const reference. Pass by value instead per coding standards. NFC by Craig Topper · 10 years ago
  32. 57116cc AMDGPU: Use StringRef value by Matt Arsenault · 10 years ago
  33. 86d336e AMDGPU/SI: Fix input vcc operand for VOP2b instructions by Matt Arsenault · 10 years ago
  34. cbd7537 AMDGPU: Implement AMDGPUOperand::print() by Matt Arsenault · 10 years ago
  35. 217361c AMDGPU/SI: Add support for 32-bit immediate SMRD offsets on CI by Tom Stellard · 10 years ago
  36. fe2c8b8 [llvm-mc] Pushing plumbing through for --fatal-warnings flag. by Colin LeMahieu · 10 years ago
  37. 86ecbb7 Reverting r241058 because it's causing buildbot failures. by Ranjeet Singh · 10 years ago
  38. 5b11909 There are a few places where subtarget features are still by Ranjeet Singh · 10 years ago
  39. ff7416b AMDGPU/SI: Update amd_kernel_code_t definition and add assembler support by Tom Stellard · 10 years ago
  40. 833ae4f AMDGPU/SI: Remove unused variable by Tom Stellard · 10 years ago
  41. 347ac79 AMDGPU/SI: Add hsa code object directives by Tom Stellard · 10 years ago
  42. f00654e Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) by Alexander Kornienko · 10 years ago
  43. 70bc5f1 Fixed/added namespace ending comments using clang-tidy. NFC by Alexander Kornienko · 10 years ago
  44. 45bb48e R600 -> AMDGPU rename by Tom Stellard · 10 years ago[Renamed (99%) from llvm/lib/Target/R600/AsmParser/AMDGPUAsmParser.cpp]
  45. 12a1910 R600/SI: Add assembler support for FLAT instructions by Tom Stellard · 10 years ago
  46. 13760bd MC: Clean up MCExpr naming. NFC. by Jim Grosbach · 10 years ago
  47. db0712f Use std::bitset for SubtargetFeatures. by Michael Kuperstein · 10 years ago
  48. 6f48200 MC: Clean up method names in MCContext. by Jim Grosbach · 10 years ago
  49. e9119e4 MC: Modernize MCOperand API naming. NFC. by Jim Grosbach · 10 years ago
  50. c3434b3 Reverting r237234, "Use std::bitset for SubtargetFeatures" by Michael Kuperstein · 10 years ago
  51. aba4a34 Use std::bitset for SubtargetFeatures by Michael Kuperstein · 10 years ago
  52. 21cce29 R600/SI: Use a better error message for unsupported instructions in the assembler by Tom Stellard · 11 years ago
  53. 7130ef4 R600/SI: Improve AsmParser support for forced e64 encoding by Tom Stellard · 11 years ago
  54. d7e6f13 R600/SI: Initial support for assembler and inline assembly by Tom Stellard · 11 years ago
  55. 9f380a3 Fix uses of reserved identifiers starting with an underscore followed by an uppercase letter by David Blaikie · 11 years ago
  56. 49f8bfd R600/SI: Add a stub GCNTargetMachine by Tom Stellard · 11 years ago
  57. 589ceee Minor cleanup to all the switches after MatchInstructionImpl in all the AsmParsers. by Craig Topper · 11 years ago
  58. 9d7ddd5 R600/SI: Start implementing an assembler by Tom Stellard · 11 years ago