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gerrit-public.fairphone.software / toolchain / llvm-project / 6023d5990d063ddf6df37bb54d9bd1d1752a3138 / llvm / lib / Target / AMDGPU / Utils / AMDGPUBaseInfo.cpp
  1. 6023d59 [AMDGPU][MC] Enable lds_direct operand for v_readfirstlane_b32, v_readlane_b32 and v_writelane_b32 by Dmitry Preobrazhensky · 7 years ago
  2. d704727 AMDGPU: Remove GCN features and predicates by Matt Arsenault · 7 years ago
  3. 2946cd7 Update the file headers across all of the LLVM projects in the monorepo by Chandler Carruth · 7 years ago
  4. 76504a4 [AMDGPU] Extend the SI Load/Store optimizer to combine more things. by Neil Henning · 7 years ago
  5. a7b0005 AMDGPU: Divergence-driven selection of scalar buffer load intrinsics by Nicolai Haehnle · 7 years ago
  6. 1a94cbb AMDGPU/InsertWaitcnts: Untangle some semi-global state by Nicolai Haehnle · 7 years ago
  7. cac749a [AMDGPU] Add FixupVectorISel pass, currently Supports SREGs in GLOBAL LD/ST by Ron Lieberman · 7 years ago
  8. af7b5d7 AMDHSA: More code object v3 fixes: by Konstantin Zhuravlyov · 7 years ago
  9. bc233f5 Revert "AMDGPU: Divergence-driven selection of scalar buffer load intrinsics" by Nicolai Haehnle · 7 years ago
  10. 108927b AMDGPU: Add sram-ecc feature by Konstantin Zhuravlyov · 7 years ago
  11. c4a2ff0 AMDGPU: Divergence-driven selection of scalar buffer load intrinsics by Nicolai Haehnle · 7 years ago
  12. 71e43ee AMDGPU: Re-apply r341982 after fixing the layering issue by Konstantin Zhuravlyov · 7 years ago
  13. 9506649 Revert "AMDGPU: Move isa version and EF_AMDGPU_MACH_* determination into TargetParser." by Ilya Biryukov · 7 years ago
  14. 941615e AMDGPU: Move isa version and EF_AMDGPU_MACH_* determination into TargetParser. by Konstantin Zhuravlyov · 7 years ago
  15. 0da6350 AMDGPU: Remove remnants of old address space mapping by Matt Arsenault · 7 years ago
  16. 4f703f5 [AMDGPU] New buffer intrinsics by Tim Renouf · 7 years ago
  17. 894c8fd [AMDGPU] Optimize _L image intrinsic to _LZ when lod is zero by Ryan Taylor · 7 years ago
  18. c5a154d AMDGPU: Separate R600 and GCN TableGen files by Tom Stellard · 7 years ago
  19. 1e8c2c7 [AMDGPU] Update assembler for HSA Code Object v3 by Scott Linder · 7 years ago
  20. 7a9c03f AMDGPU: Select MIMG instructions manually in SITargetLowering by Nicolai Haehnle · 7 years ago
  21. 0ab200b AMDGPU: Refactor MIMG instruction TableGen using generic tables by Nicolai Haehnle · 7 years ago
  22. e741d7e AMDGPU: Use generic tables instead of SearchableTable by Nicolai Haehnle · 7 years ago
  23. 00f2cb1 AMDHSA: Code object v3 updates by Konstantin Zhuravlyov · 7 years ago
  24. c72ece6 AMDGPU : Recalculate SGPRs when trap handler is supported by Konstantin Zhuravlyov · 7 years ago
  25. 5f8f34e4 Remove \brief commands from doxygen comments. by Adrian Prantl · 8 years ago
  26. 0084adc AMDGPU: Add Vega12 and Vega20 by Matt Arsenault · 8 years ago
  27. 8b20b7d [AMDGPU] Enabled v2.16 literals for VOP3P by Stanislav Mekhanoshin · 8 years ago
  28. 6183065 AMDGPU: Remove max_scratch_backing_memory_byte_size from kernel header by Konstantin Zhuravlyov · 8 years ago
  29. 4254d45 AMDGPU: Make isIntrinsicSourceOfDivergence table-driven by Nicolai Haehnle · 8 years ago
  30. 0f72225 [AMDGPU] Add default ISA version targets by Stanislav Mekhanoshin · 8 years ago
  31. 2e5eece Pass Divergence Analysis data to Selection DAG to drive divergence by Alexander Timofeev · 8 years ago
  32. 331f97e17 AMDGPU: Bring processors and features in sync with the spec by Konstantin Zhuravlyov · 8 years ago
  33. 0124b54 [AMDGPU] Change constant addr space to 4 by Yaxun Liu · 8 years ago
  34. 923712b Reapply "AMDGPU: Add 32-bit constant address space" by Matt Arsenault · 8 years ago
  35. bcf7bec AMDGPU: Fix layering issue by Matt Arsenault · 8 years ago
  36. f4e3f3e Revert "AMDGPU: Add 32-bit constant address space" by Rafael Espindola · 8 years ago
  37. 871c30e AMDGPU: Add 32-bit constant address space by Marek Olsak · 8 years ago
  38. 0a1ff46 [AMDGPU][MC] Corrected dst/data size for MIMG opcodes with d16 modifier by Dmitry Preobrazhensky · 8 years ago
  39. e3271ae [AMDGPU][MC] Added validation of d16 and r128 modifiers of MIMG opcodes by Dmitry Preobrazhensky · 8 years ago
  40. 2a22c5d [AMDGPU] Switch to the new addr space mapping by default by Yaxun Liu · 8 years ago
  41. 0b4eb1e [AMDGPU][MC] Added support of 64-bit image atomics by Dmitry Preobrazhensky · 8 years ago
  42. 3afbd82 [AMDGPU][MC][GFX8][GFX9] Added XNACK_MASK support by Dmitry Preobrazhensky · 8 years ago
  43. 2713495 [AMDGPU][MC] Added support of 256- and 512-bit tuples of ttmp registers by Dmitry Preobrazhensky · 8 years ago
  44. cad7fa8 AMDGPU: Partially fix disassembly of MIMG instructions by Matt Arsenault · 8 years ago
  45. ac2b026 [AMDGPU][MC][GFX9] Corrected encoding of ttmp registers, disabled tba/tma by Dmitry Preobrazhensky · 8 years ago
  46. c40d9f2 AMDGPU/GCN: Bring processors in sync with AMDGPUUsage by Konstantin Zhuravlyov · 8 years ago
  47. 435151a AMDGPU: Fix set but not used warnings related to AMDGPUAS by Konstantin Zhuravlyov · 8 years ago
  48. f9ab3dd [AMDGPU] Clean up symbols in the global namespace. by Benjamin Kramer · 8 years ago
  49. eda425e AMDGPU: Do not emit deprecated notes for code object v3 by Konstantin Zhuravlyov · 8 years ago
  50. 9c05b2b AMDGPU: Add support for isa version note by Konstantin Zhuravlyov · 8 years ago
  51. ef1ae8f [AMDGPU] calling conventions for AMDPAL OS type by Tim Renouf · 8 years ago
  52. 8728c5f AMDGPU: Cleanup subtarget features by Matt Arsenault · 8 years ago
  53. 894e53d AMDGPU: Fix using SMRD instructions for argument loads in functions by Matt Arsenault · 8 years ago
  54. 00deef8 [AMDGPU][MC] Optimized IsRegIntersect function by Dmitry Preobrazhensky · 8 years ago
  55. 94b3b47 Revert "AMDGPU: Do not test for SI in getIsaVersion" by Konstantin Zhuravlyov · 8 years ago
  56. a462419 AMDGPU: Do not test for SI in getIsaVersion by Konstantin Zhuravlyov · 8 years ago
  57. dc4ac82 [AMDGPU][MC] Corrected V_*QSAD* instructions to check that dest register is different than any of the src by Dmitry Preobrazhensky · 8 years ago
  58. 7c3e511 AMDGPU : Fix ISA Version Definitions. by Wei Ding · 8 years ago
  59. 264b5d9 Move Object format code to lib/BinaryFormat. by Zachary Turner · 8 years ago
  60. 6bda14b Sort the remaining #include lines in include/... and lib/.... by Chandler Carruth · 8 years ago
  61. 5b0bf2ff AMDGPU: Remove deprecated and unused elf definitions by Konstantin Zhuravlyov · 8 years ago
  62. 8973a0a Revert "AMDGPU: Fold CI-specific complex SMRD patterns into existing complex patterns" by Marek Olsak · 8 years ago
  63. 7dadd86 AMDGPU: Fold CI-specific complex SMRD patterns into existing complex patterns by Marek Olsak · 8 years ago
  64. f7659d71 [AMDGPU] SDWA: Add assembler support for GFX9 by Sam Kolton · 8 years ago
  65. 2b1f9aa AMDGPU: Start defining a calling convention by Matt Arsenault · 8 years ago
  66. a302a736 AMDGPU: Add AMDGPU_HS calling convention by Marek Olsak · 9 years ago
  67. 3d1cc88 AMDGPU: Temporarily disable packed inlinable literals (v2f16, v2i16) by Konstantin Zhuravlyov · 9 years ago
  68. e622dc3 AMDGPU: Refactor argument lowering by Matt Arsenault · 9 years ago
  69. 678e111 AMDGPU: Fix crash when disassembling VOP3 mac by Matt Arsenault · 9 years ago
  70. 76ae47c [AMDGPU] Temporarily change constant address space from 4 to 2 by Yaxun Liu · 9 years ago
  71. 1a14bfa [AMDGPU] Get address space mapping by target triple environment by Yaxun Liu · 9 years ago
  72. 03880f8 [AMDGPU][MC] Fix for Bug 30829 + LIT tests by Dmitry Preobrazhensky · 9 years ago
  73. 182e9cc [AMDGPU] Change amd_kernel_code_t's minor version to 1 by Konstantin Zhuravlyov · 9 years ago
  74. 9be7b0d AMDGPU: Add VOP3P instruction format by Matt Arsenault · 9 years ago
  75. e823d92 AMDGPU: Merge initial gfx9 support by Matt Arsenault · 9 years ago
  76. 19f98c6 [AMDGPU] Fix MaxWorkGroupsPerCU for large workgroups by Stanislav Mekhanoshin · 9 years ago
  77. d96089b [MC] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC). by Eugene Zelenko · 9 years ago
  78. fd87137 [AMDGPU] Calculate number of min/max SGPRs/VGPRs for WavesPerEU instead of using switch statement by Konstantin Zhuravlyov · 9 years ago
  79. 9f89ede [AMDGPU] Add target information that is required by tools to metadata by Konstantin Zhuravlyov · 9 years ago
  80. 43b6156 [AMDGPU][mc] Fix AddressSanitizer leftover issue in gfx7_asm_all test by Artem Tamazov · 9 years ago
  81. ca16621 Re-commit AMDGPU/GlobalISel: Add support for simple shaders by Tom Stellard · 9 years ago
  82. 7a19d56 Revert "AMDGPU/GlobalISel: Add support for simple shaders" by Tom Stellard · 9 years ago
  83. e48f60a AMDGPU/GlobalISel: Add support for simple shaders by Tom Stellard · 9 years ago
  84. 33b01e9 [AMDGPU][mc] Fix memory corruption uncovered by AddressSanitizer during coverage/smoke Gfx7/8 testing. by Artem Tamazov · 9 years ago
  85. 08efb7e AMDGPU/SI: Move some ISel helpers into utils so they can be shared with GISel by Tom Stellard · 9 years ago
  86. 5d91019 AMDGPU: Set call_convention bit in kernel_code_t by Matt Arsenault · 9 years ago
  87. 9dffada [AMDGPU] Assembler: fix v_mac_f16 immediates by Sam Kolton · 9 years ago
  88. 31dbb03 [AMDGPU] Remove extra semicolon. NFC by Konstantin Zhuravlyov · 9 years ago
  89. 4bd7236 AMDGPU: Fix handling of 16-bit immediates by Matt Arsenault · 9 years ago
  90. 26faed3 AMDGPU: Consolidate inline immediate predicate functions by Matt Arsenault · 9 years ago
  91. b133fbb AMDGPU/SI: Handle hazard with > 8 byte VMEM stores by Tom Stellard · 9 years ago
  92. 94add85 AMDGPU: Refactor processor definition to use ISA version features by Yaxun Liu · 9 years ago
  93. 08326b6 [AMDGPU] Emit constant address space data in .rodata section and use relocations instead of fixups (amdhsa only) by Konstantin Zhuravlyov · 9 years ago
  94. c871550 [AMDGPU] Stop using MCRegisterClass::getSize() by Krzysztof Parzyszek · 9 years ago
  95. cdd4547 [AMDGPU] Refactor waitcnt encoding by Konstantin Zhuravlyov · 9 years ago
  96. 98317d2 AMDGPU/SI: Update ISA version numbers for Tonga and Polaris10/11. by Changpeng Fang · 9 years ago
  97. a3ec5c1 [AMDGPU] Assembler: support v_mac_f32 DPP and SDWA. Move getNamedOperandIdx to AMDGPUBaseInfo.h by Sam Kolton · 9 years ago
  98. 836cbff [AMDGPU] Choose VMCNT, EXPCNT, LGKMCNT masks and shifts based on the isa version by Konstantin Zhuravlyov · 9 years ago
  99. 1eeb11b AMDGPU] Assembler: better support for immediate literals in assembler. by Sam Kolton · 9 years ago
  100. 1d65026 [AMDGPU] Wave and register controls by Konstantin Zhuravlyov · 9 years ago