Log - 81fe1fbf4abd00b24e078a80cb15a2d2c1343f11 - toolchain/llvm-project

77a4adc Add Hurd target to Clang driver (2/2) by Kristina Brooks · 7 years ago
f8c264e [clang][ARC] Add ARCTargetInfo by Tatyana Krasnukha · 7 years ago
1d38c13 Use the container form llvm::sort(C, ...) by Fangrui Song · 7 years ago
db01c3a [Fixed Point Arithmetic] Fixed Point Precision Bits and Fixed Point Literals by Leonard Chan · 7 years ago
e54d0ff4 [TargetInfo] Sort target features before passing them to the backend by Eli Friedman · 7 years ago
bec8a66 [CUDA] Revert defining __CUDA_ARCH__ for amdgcn targets by Yaxun Liu · 7 years ago
8391387 [HIP] define __CUDA_ARCH_=1 for amdgcn targets by Yaxun Liu · 7 years ago
8a5fc15 [CUDA] Add amdgpu sub archs by Yaxun Liu · 7 years ago
3ec1743 Make march/target-cpu print a note with the list of valid values for ARM by Erich Keane · 8 years ago
3e1478f [RISCV] Create a LinuxTargetInfo when targeting Linux by Alex Bradbury · 8 years ago
71f4545 [RISCV] Add the RISCV target and compiler driver by Alex Bradbury · 8 years ago
051e966 [MINGW] normalize WIN32 macros by Martell Malone · 8 years ago
b086289 [Atomic][X8664] set max atomic inline width according to the target by Wei Mi · 8 years ago
31cac7a [AArch64] Add support for a MinGW AArch64 target by Martin Storsjo · 8 years ago
e2a247c [Targets] Move addCygMingDefines into the arch-independent Targets.cpp (NFC) by Martin Storsjo · 8 years ago
2b9657b Remove Bitrig: Clang Changes by Erich Keane · 8 years ago
ebba592 Break up Targets.cpp into a header/impl pair per target type[NFCI] by Erich Keane · 8 years ago
33e67ad [Hexagon] Add inline-asm constraint 'a' for modifier register class by Krzysztof Parzyszek · 8 years ago
d7a7382 [NVPTX] Add lowering of i128 params. by Artem Belevich · 8 years ago
9377b9f [X86] Put avx512vpopcntdq in the right spot in the validateCpuSupports string switch. by Craig Topper · 8 years ago
2c748cc Add isValidCPUName and isValidFeature to TargetInfo by Erich Keane · 8 years ago
daa40b9 [COFF, ARM64] Set the data type widths and the data layout string by Mandeep Singh Grang · 8 years ago
022e782 [AArch64] Add support for __builtin_ms_va_list on aarch64 by Martin Storsjo · 8 years ago
76976a7 [SystemZ] Add support for IBM z14 processor (2/3) by Ulrich Weigand · 8 years ago
cac24ab [SystemZ] Add support for IBM z14 processor (1/3) by Ulrich Weigand · 8 years ago
733fe19 Enable TLS support on OpenBSD, but default to the emulatated TLS model. by Brad Smith · 8 years ago
3544b3e [X86] Add 'movbe' to btver2 CPU. by Craig Topper · 8 years ago
ebe0290 [AArch64] Add support for handling the +sve target feature. by Amara Emerson · 8 years ago
3606ebf [mips] Create the correct profiling symbol on Linux MIPS by Simon Atanasyan · 8 years ago
cbf647c CodeGen: Fix address space of global variable by Yaxun Liu · 8 years ago
6139517 [X86] Replace 'fallthrough' comments with LLVM_FALLTHROUGH. by Craig Topper · 8 years ago
98ee785 This reverts r305820 (ARMv.2-A FP16 vector intrinsics) because it shows by Sjoerd Meijer · 8 years ago
6d6c480 [SystemZ] Simplify handling of ISA revisions by Ulrich Weigand · 8 years ago
25d1b43 [AMDGPU] Fix size and alignment of size_t and pointer types by Yaxun Liu · 8 years ago
3ba4a72 [AMDGPU] Fix regressions on mesa/clover with libclc due to address space by Yaxun Liu · 8 years ago
3170de0 fix trivial typos; NFC by Hiroshi Inoue · 8 years ago
dc77150 Changed Opts.EABIVersion type string to llvm::EABI enum class by Yuka Takahashi · 8 years ago
9dd7e80 [X86] Add RDRND feature to Goldmont. Add MOVBE to all Atom CPUs. by Craig Topper · 8 years ago
541075d [X86] Add a break to the last case of a few switches to prevent accidents in the future. NFC by Craig Topper · 8 years ago
f458bd2 [X86] Move all atom CPUs to the same section of the switch and use fallthroughs like we do for other CPU generations. NFC by Craig Topper · 8 years ago
cb75f61 ARMV8-A archkind and target defines helper functions by Sjoerd Meijer · 8 years ago
a046ef4 [Clang][X86][Goldmont]Adding new target-cpu: Goldmont by Michael Zuckerman · 8 years ago
2fd6b16 [COFF, ARM64] Add support for Windows ARM64 COFF format by Mandeep Singh Grang · 8 years ago
35d3c35 Reapply "Frontend support for Nios2 target" by Nikolai Bozhenov · 8 years ago
4dabea2 Add support for Ananas platform by Ed Schouten · 8 years ago
00b396c [MSP430] Fix data layout string. by Vadzim Dambrouski · 8 years ago
f10ca93 [AArch64] ADD ARMv.2-A FP16 vector intrinsics by Abderrazek Zaafrani · 8 years ago
d078254 Revert "Define _GNU_SOURCE for rtems c++" by Daniel Jasper · 8 years ago
02b0e9d Define _GNU_SOURCE for rtems c++ by James Y Knight · 8 years ago
de57795 Revert of r305066 "Reapply Frontend support for Nios2 target" by Nikolai Bozhenov · 8 years ago
b2de17c Reapply "Frontend support for Nios2 target" by Nikolai Bozhenov · 8 years ago
1c36934 Revert "Frontend support for Nios2 target" by Nikolai Bozhenov · 8 years ago
32dc6c8 Frontend support for Nios2 target. by Nikolai Bozhenov · 8 years ago
9b5d3b6 Reapply r304929 [mips] Add runtime options to enable/disable madd/sub.fmt by Petar Jovanovic · 8 years ago
53900b0 Revert r304929 [mips] Add runtime options to enable/disable madd/sub.fmt by Petar Jovanovic · 8 years ago
c6d9b04 [mips] Add runtime options to enable/disable madd.fmt and msub.fmt by Petar Jovanovic · 8 years ago
cc524bf [CodeGen] Add thumb-mode to target-features for arm/thumb triples. by Florian Hahn · 8 years ago
15b80a5 [ARM] Fix Neon vector type alignment to 64-bit by Javed Absar · 8 years ago
7dee171 [WebAssembly] Set MaxAtomicInlineWidth to 64. by Dan Gohman · 8 years ago
28f03bb [ARM] Add support for target("arm") and target("thumb"). by Florian Hahn · 8 years ago
a44a6ac Revert "[AArch64] Add ARMv8.2-A FP16 vefctor intrinsics" by Vedant Kumar · 8 years ago
a44e5f6 [AArch64] Add ARMv8.2-A FP16 vefctor intrinsics by Abderrazek Zaafrani · 8 years ago
fc2629a [OpenCL] Makes kernels use the SPIR_KERNEL CC by default. by Pekka Jaaskelainen · 8 years ago
089f678 Reverting Neon vector type 64-alignment fix by Javed Absar · 8 years ago
3d92d7a [ARM] Fix Neon vector type alignment to 64-bit by Javed Absar · 8 years ago
a40b38a Only define __SIZEOF_FLOAT128__ on x86 as intended in r304012 by Reid Kleckner · 8 years ago
9eabbb6 Enable __float128 for mingw for GCC compatibility and define __SIZEOF_FLOAT128__ on x86 by Reid Kleckner · 8 years ago
140c1fb [X86] Adding avx512_vpopcntdq feature set and its intrinsics by Oren Ben Simhon · 8 years ago
b6e946b Basic: fix whitespace in file header (NFC) by Saleem Abdulrasool · 8 years ago
3677c0f Removed fallthrough annotation which does not directly precede switch label. by Galina Kistanova · 8 years ago
078b301 Added LLVM_FALLTHROUGH to address gcc warning: this statement may fall through. by Galina Kistanova · 8 years ago
af3d4db [AMDGPU] Do not require opencl triple environment for OpenCL by Yaxun Liu · 8 years ago
6d96f163 CodeGen: Cast alloca to expected address space by Yaxun Liu · 8 years ago
eb96e44 [SPARC] Support 'f' and 'e' inline asm constraints. by James Y Knight · 8 years ago
3511348 [X86][LWP] Add clang support for LWP instructions. by Simon Pilgrim · 8 years ago
be380c7 [ARM] Limit the diagnose when an ISR calls a regular function by Weiming Zhao · 8 years ago
16b1ac9 Darwin: Define __STDC_NO_THREADS__ on Darwin targets by Duncan P. N. Exon Smith · 8 years ago
233310f [ARM,AArch64] Define __ELF__ for arm-none-eabihf and AArch64 by Oliver Stannard · 8 years ago
d26d883 When we turn on vsx it should also turn on altivec explicitly, same by Eric Christopher · 8 years ago
e668b1c [AMDGPU][GFX9] Set +fp32-denormals for >=gfx900 unless -cl-denorms-are-zero is set by Konstantin Zhuravlyov · 8 years ago
b34ec82 [OpenCL] Map default address space to alloca address space by Yaxun Liu · 8 years ago
b122ed9 [AMDGPU] Temporarily change constant address space from 4 to 2 for the new address space mapping by Yaxun Liu · 8 years ago
fc6ffed Default enable the rtm feature only on skylake and later for now because Intel disabled the feature on some haswell and broadwell processors: by Eric Christopher · 8 years ago
1e6fedb _CALL_LINUX is only defined on 64-bit ppc linux platforms, not 32-bit. by Eric Christopher · 9 years ago
354097b [AMDGPU] Make AMDGPUTargetInfo::AS private by Yaxun Liu · 9 years ago
19d8c1f Update the comment on not yet generated preprocessor defines to remove __LONGDOUBLE128. by Eric Christopher · 9 years ago
ee21410 Add the __LONGDOUBLE128 define for ppc targets that have 128 bit long doubles. by Eric Christopher · 9 years ago
0d36116 Define __HAVE_BSWAP__ on ppc to match gcc since we support both builtins as well. by Eric Christopher · 9 years ago
3464f92 [AMDGPU] Switch address space mapping by triple environment amdgiz by Yaxun Liu · 9 years ago
2fd2eda Add the _CALL_LINUX preprocessor define for ppc linux platforms. by Eric Christopher · 9 years ago
153dad4 __BIGGEST_ALIGNMENT__ has always been 16 on all power platforms rather by Eric Christopher · 9 years ago
b70819e Add preprocessor defines for a bare powerpc64le triple/cpu. by Eric Christopher · 9 years ago
3646e62 Move setting of LangOpts based on target flags out of CompilerInstance by Eric Christopher · 9 years ago
758aad7 Remove the -faltivec alias option and replace it with -maltivec everywhere. by Eric Christopher · 9 years ago
74fa24f Turn on HTM on power8 and later (including powerpc64le) since it's by Eric Christopher · 9 years ago
ff7f667 [Hexagon] Recognize hexagonv62 as a valid target CPU by Krzysztof Parzyszek · 9 years ago
bf5e3e4 AMDGPU: Make 0 the private nullptr value by Matt Arsenault · 9 years ago
4d86799 [AMDGPU] Add builtin functions readlane ds_permute mov_dpp by Yaxun Liu · 9 years ago
d1ba16e [DebugInfo] Add address space when creating DIDerivedTypes by Konstantin Zhuravlyov · 9 years ago
8e55bd5 Set the Int64Type / IntMaxType types correctly for OpenBSD/mips64 by Brad Smith · 9 years ago