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gerrit-public.fairphone.software / toolchain / llvm-project / 81fe1fbf4abd00b24e078a80cb15a2d2c1343f11 / llvm / lib / Target / ARM / A15SDOptimizer.cpp
  1. fffa9b5 [ARM] Add new feature to enable optimizing the VFP registers by Evandro Menezes · 7 years ago
  2. d34e60c Rename DEBUG macro to LLVM_DEBUG. by Nicola Zaghen · 7 years ago
  3. f1caa28 MachineFunction: Return reference from getFunction(); NFC by Matthias Braun · 8 years ago
  4. 9d419d3 [CodeGen] Rename functions PrintReg* to printReg* by Francis Visoiu Mistrih · 8 years ago
  5. b3bde2e Fix a bunch more layering of CodeGen headers that are in Target by David Blaikie · 8 years ago
  6. 37b2286 [ARM] Tidy-up Cortex-A15 DPR-SPR optimizer implementation by Javed Absar · 8 years ago
  7. 4f8c3e1 [ARM] CodeGen: Remove AddDefaultPred. NFC. by Diana Picus · 9 years ago
  8. 117296c Use StringRef in Pass/PassManager APIs (NFC) by Mehdi Amini · 9 years ago
  9. 29c5249 ARM: Remove implicit iterator conversions, NFC by Duncan P. N. Exon Smith · 9 years ago
  10. bdc4956 Pass DebugLoc and SDLoc by const ref. by Benjamin Kramer · 9 years ago
  11. a2b9111 Add optimization bisect opt-in calls for ARM passes by Andrew Kaylor · 9 years ago
  12. 799003b Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used. by Benjamin Kramer · 11 years ago
  13. 63b4488 Cleanup and remove a chunk of getARMSubtarget calls in the by Eric Christopher · 11 years ago
  14. 4c67d5a Include map into the A15SDOptimizer rather than pick it up by Eric Christopher · 11 years ago
  15. fc6de42 Have MachineFunction cache a pointer to the subtarget to make lookups by Eric Christopher · 11 years ago
  16. d913448 Remove the TargetMachine forwards for TargetSubtargetInfo based by Eric Christopher · 11 years ago
  17. 35b2f75 Convert some assert(0) to llvm_unreachable or fold an 'if' condition into the assert. by Craig Topper · 11 years ago
  18. 062a2ba [C++] Use 'nullptr'. Target edition. by Craig Topper · 11 years ago
  19. 84e68b2 [Modules] Fix potential ODR violations by sinking the DEBUG_TYPE by Chandler Carruth · 11 years ago
  20. 1a59711 Tidy up. Trailing whitespace. by Jim Grosbach · 11 years ago
  21. a925326 Prune includes in ARM target. by Craig Topper · 12 years ago
  22. 40b5ab8 [ARM]Fix an assertion failure in A15SDOptimizer about DPair reg class by treating DPair as QPR. by Hao Liu · 12 years ago
  23. 16c6bf4 Phase 2 of the great MachineRegisterInfo cleanup. This time, we're changing by Owen Anderson · 12 years ago
  24. 6bc27bf [C++11] Add 'override' keyword to virtual methods that override their base class. by Craig Topper · 12 years ago
  25. 8a8cd2b Re-sort all of the includes with ./utils/sort_includes.py so that by Chandler Carruth · 12 years ago
  26. f907b89 Correct word hyphenations by Alp Toker · 12 years ago
  27. 13654dd ARM: Teach A15 SDOptimizer to properly handle D-reg by-lane. by Jim Grosbach · 12 years ago
  28. 31ee586 Use SmallVectorImpl::iterator/const_iterator instead of SmallVector to avoid specifying the vector size. by Craig Topper · 12 years ago
  29. 82dd6ac Adding an A15 specific optimization pass for interactions between S/D/Q registers. The pass handles all the required transformations pre-regalloc. by Silviu Baranga · 13 years ago