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gerrit-public.fairphone.software / toolchain / llvm-project / 81fe1fbf4abd00b24e078a80cb15a2d2c1343f11 / llvm / lib / Target / PowerPC / PPCInstrInfo.cpp
  1. f2d9df6 [PowerPC] Remove the implicit use of the register if it is replaced by Imm by QingShan Zhang · 7 years ago
  2. 5ede950 [PowerPC] fix register class after converting X-FORM instruction to D-FORM instruction by Chen Zheng · 7 years ago
  3. 44ace92 [PowerPC] Exploit power9 new instruction setb by Kewen Lin · 7 years ago
  4. cf4d477 [PowerPC] Fix assert from machine verify pass that missing undef register flag by Zi Xuan Wu · 7 years ago
  5. 5198641 [PowerPC] Fix inconsistent ImmMustBeMultipleOf for same instruction by Kang Zhang · 7 years ago
  6. 840e98f Revert "[PowerPC] Fix inconsistent ImmMustBeMultipleOf for same instruction" by Kang Zhang · 7 years ago
  7. e98d4f5 [PowerPC] Fix inconsistent ImmMustBeMultipleOf for same instruction by Kang Zhang · 7 years ago
  8. 674581a [PowerPC][NFC] Fix bugs in r+r to r+i conversion by Nemanja Ivanovic · 7 years ago
  9. 5d32a86 [PowerPC] Folding XForm to DForm loads requires alignment for some DForm loads. by Stefan Pintilie · 7 years ago
  10. 87c31a6 [PowerPC] Do not emit record-form rotates when record-form andi/andis suffices by Nemanja Ivanovic · 7 years ago
  11. 6a39d32 [PowerPC] Optimize compares fed by ANDISo by Nemanja Ivanovic · 7 years ago
  12. f384606 [PowerPC] Emit xscpsgndp instead of xxlor when copying floating point scalar registers for P9 by Stefan Pintilie · 7 years ago
  13. f8f9af7 [PowerPC] Add a peephole post RA to transform the inst that fed by add by QingShan Zhang · 7 years ago
  14. f78650a Remove trailing space by Fangrui Song · 7 years ago
  15. d52990c Introduce codegen for the Signal Processing Engine by Justin Hibbits · 7 years ago
  16. 080c350 [PowerPC] Materialize more constants with CR-field set in late peephole by Nemanja Ivanovic · 7 years ago
  17. 9f0fe9a If the arch is P9, we will select the DFLOADf32/DFLOADf64 pseudo instruction when we are loading a floating, by QingShan Zhang · 7 years ago
  18. 0f7f59f [PowerPC] fix trivial typos in comment, NFC by Hiroshi Inoue · 7 years ago
  19. d34e60c Rename DEBUG macro to LLVM_DEBUG. by Nicola Zaghen · 7 years ago
  20. c564dc0 [PowerPC] Fix condition for 64-bit rotate when replacing r+r instr with r+i by Nemanja Ivanovic · 7 years ago
  21. 26d4f92 [PowerPC] Infrastructure work. Implement getting the opcode for a spill in one place. by Stefan Pintilie · 8 years ago
  22. 6535993 Re-commit: [MachineLICM] Add functions to MachineLICM to hoist invariant stores by Zaara Syeda · 8 years ago
  23. 01f414b Revert [MachineLICM] This reverts commit rL327856 by Zaara Syeda · 8 years ago
  24. ff05e2b [MachineLICM] Add functions to MachineLICM to hoist invariant stores by Zaara Syeda · 8 years ago
  25. 6cc31ca [PowerPC] Do not emit record-form rotates when record-form andi suffices by Nemanja Ivanovic · 8 years ago
  26. 309124e [PowerPC] Don't miscompile rotate+mask into an ANDIo if it can't recreate the immediate by Benjamin Kramer · 8 years ago
  27. 4e1f5e0 [PowerPC] Fix for PR35688 - handle out-of-range values for r+r to r+i conversion by Nemanja Ivanovic · 8 years ago
  28. f1caa28 MachineFunction: Return reference from getFunction(); NFC by Matthias Braun · 8 years ago
  29. 6ab32de Fix the second build bot break introduced by r320791. by Nemanja Ivanovic · 8 years ago
  30. 1794cdc Fix code causing fallthrough warnings in the PPC back end. by Nemanja Ivanovic · 8 years ago
  31. 74ecf59 Fix the build bot break introduced by r320791. by Nemanja Ivanovic · 8 years ago
  32. 6995e5d [PowerPC] Convert r+r instructions to r+i (pre and post RA) by Nemanja Ivanovic · 8 years ago
  33. 5df3bbf [CodeGen] Print global addresses as @foo in both MIR and debug output by Francis Visoiu Mistrih · 8 years ago
  34. f842297 Rename LiveIntervalAnalysis.h to LiveIntervals.h by Matthias Braun · 8 years ago
  35. a8a83d1 [CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register. by Francis Visoiu Mistrih · 8 years ago
  36. 93ef145 [CodeGen] Print "%vreg0" as "%0" in both MIR and debug output by Francis Visoiu Mistrih · 8 years ago
  37. aab3ef7 [PowerPC] Relax the checking on AND/AND8 in isSignOrZeroExtended. by Sean Fertile · 8 years ago
  38. 9d7bb0c [CodeGen] Print register names in lowercase in both MIR and debug output by Francis Visoiu Mistrih · 8 years ago
  39. f94d58d [PowerPC] Remove redundant TOC saves by Zaara Syeda · 8 years ago
  40. 438bf4a [PPC] Heuristic to choose between a X-Form VSX ld/st vs a X-Form FP ld/st. by Tony Jiang · 8 years ago
  41. b72b1fb [PowerPC] Use record-form instruction for Less-or-Equal -1 and Greater-or-Equal 1 by Hiroshi Inoue · 8 years ago
  42. 5388e66 [PowerPC] Use helper functions to check sign-/zero-extended value by Hiroshi Inoue · 8 years ago
  43. a7eb78b [PowerPC] fix up in sign-/zero-extension elimination by Hiroshi Inoue · 8 years ago
  44. e3a3e3c [PowerPC] Eliminate sign- and zero-extensions if already sign- or zero-extended by Hiroshi Inoue · 8 years ago
  45. 263dc4e [PowerPC] Utilize DQ-Form instructions for spill/restore and fix FrameIndex elimination to only use `lis/addi` if necessary. by Lei Huang · 8 years ago
  46. ed1ffa4 [PowerPC] eliminate unconditional branch to the next instruction by Hiroshi Inoue · 8 years ago
  47. fcd9697 [Power9] Spill gprs to vector registers rather than stack by Zaara Syeda · 8 years ago
  48. 967dc58 [PowerPC] enable optimizeCompareInstr for branch with static branch hint by Hiroshi Inoue · 8 years ago
  49. 393ef84 fix formatting issue; NFC by Hiroshi Inoue · 8 years ago
  50. 84dbbfd [PowerPC] define target hook isReallyTriviallyReMaterializable() by Lei Huang · 8 years ago
  51. 7a08bb1 [PowerPC] fix potential verification errors on CFENCE8 by Hiroshi Inoue · 8 years ago
  52. e597bd8 [PowerPC] Eliminate integer compare instructions - vol. 2 by Nemanja Ivanovic · 8 years ago
  53. e3c14eb [PPC] Fix assertion failure during binary encoding with -mcpu=pwr9 by Hiroshi Inoue · 8 years ago
  54. 37e63b1 Summary by Hiroshi Inoue · 8 years ago
  55. 3bef27c [PPC] Lower load acquire/seq_cst trailing fence to cmp + bne + isync. by Tim Shen · 8 years ago
  56. 9b9a535 Re-commit r301040 "X86: Don't emit zero-byte functions on Windows" by Hans Wennborg · 8 years ago
  57. 0459300 Revert r301040 "X86: Don't emit zero-byte functions on Windows" by Hans Wennborg · 8 years ago
  58. cb3e810 X86: Don't emit zero-byte functions on Windows by Hans Wennborg · 8 years ago
  59. f48ef33 Remove an oddly unnecessary temporary. by Eric Christopher · 9 years ago
  60. cc31871 Make TargetInstrInfo::isPredicable take a const reference, NFC by Krzysztof Parzyszek · 9 years ago
  61. 918ed87 [XRay] Implement powerpc64le xray. by Tim Shen · 9 years ago
  62. 8e8c444 [PowerPC] Expand ISEL instruction into if-then-else sequence. by Tony Jiang · 9 years ago
  63. 8da139a Revert "[PowerPC] Expand ISEL instruction into if-then-else sequence." by Tony Jiang · 9 years ago
  64. 7630b8c [PowerPC] Expand ISEL instruction into if-then-else sequence. by Tony Jiang · 9 years ago
  65. 116bbab [CodeGen] Rename MachineInstrBuilder::addOperand. NFC by Diana Picus · 9 years ago
  66. 6354d23 [Power9] Exploit D-Form VSX Scalar memory ops that target full VSX register set by Nemanja Ivanovic · 9 years ago
  67. 11049f8 [Power9] Part-word VSX integer scalar loads/stores and sign extend instructions by Nemanja Ivanovic · 9 years ago
  68. 6e7879c [Power9] Add exploitation of non-permuting memory ops by Nemanja Ivanovic · 9 years ago
  69. 1b9fc8e Finish renaming remaining analyzeBranch functions by Matt Arsenault · 9 years ago
  70. e8e0f5c Make analyzeBranch family of instruction names consistent by Matt Arsenault · 9 years ago
  71. a2b036e AArch64: Use TTI branch functions in branch relaxation by Matt Arsenault · 9 years ago
  72. e83c4b3 [stackmaps] More extraction of common code [NFCI] by Philip Reames · 9 years ago
  73. 941a705 MachineFunction: Return reference for getFrameInfo(); NFC by Matthias Braun · 9 years ago
  74. 89217f8 TargetInstrInfo: rename GetInstSizeInBytes to getInstSizeInBytes. NFC by Sjoerd Meijer · 9 years ago
  75. e5a22f4 PowerPC: Avoid implicit iterator conversions, NFC by Duncan P. N. Exon Smith · 9 years ago
  76. 71c30a1 Rename AnalyzeBranch* to analyzeBranch*. by Jacques Pienaar · 9 years ago
  77. 9cfc75c CodeGen: Use MachineInstr& in TargetInstrInfo, NFC by Duncan P. N. Exon Smith · 9 years ago
  78. a99ccfc Drop support for creating $stubs. by Rafael Espindola · 9 years ago
  79. bdc4956 Pass DebugLoc and SDLoc by const ref. by Benjamin Kramer · 9 years ago
  80. 5573483 [PPC64] Fix SUBFC8 Defs list by Keno Fischer · 9 years ago
  81. 6e29baf [Power9] Add support for -mcpu=pwr9 in the back end by Nemanja Ivanovic · 9 years ago
  82. 48d7234 [PowerPC] [SSP] Fix stack guard load for 32-bit. by Marcin Koscielnicki · 9 years ago
  83. a1d8bc5 [PPC, SSP] Support PowerPC Linux stack protection. by Tim Shen · 9 years ago
  84. 94f58e7 [PPC64] Mark CR0 Live if PPCInstrInfo::optimizeCompareInstr Creates a Use of CR0 by Chuang-Yu Cheng · 9 years ago
  85. 6131128 Codegen: [PPC] Word Rotates are Zero Extending. by Kyle Butt · 10 years ago
  86. 6307eb5 CodeGen: TII: Take MachineInstr& in predicate API, NFC by Duncan P. N. Exon Smith · 10 years ago
  87. 7a08381 Remove uses of builtin comma operator. by Richard Trieu · 10 years ago
  88. 132bf36 Codegen: [PPC] Silence false-positive initialization warning. NFC by Kyle Butt · 10 years ago
  89. cec4080 Codegen: [PPC] Handle weighted comparisons when inserting selects. by Kyle Butt · 10 years ago
  90. e5e035a3 Replace uint16_t with the MCPhysReg typedef in many places. A lot of physical register arrays already use this typedef. by Craig Topper · 10 years ago
  91. 387e66e replace MachineCombinerPattern namespace and enum with enum class; NFCI by Sanjay Patel · 10 years ago
  92. 16c4da0 Improved the interface of methods commuting operands, improved X86-FMA3 mem-folding&coalescing. by Andrew Kaylor · 10 years ago
  93. 03a4730 [Machine Combiner] Refactor machine reassociation code to be target-independent. by Chad Rosier · 10 years ago
  94. c536bd9 Pass BranchProbability/BlockMass by value instead of const& as they are small. NFC. by Cong Hou · 10 years ago
  95. ccf9259 [PowerPC] Don't commute trivial rlwimi instructions by Hal Finkel · 10 years ago
  96. 982e8d4 [MIR Serialization] static -> static const in getSerializable*MachineOperandTargetFlags by Hal Finkel · 10 years ago
  97. 2d55698 [PowerPC/MIR Serialization] Target flags serialization support by Hal Finkel · 10 years ago
  98. e40c8a2 PseudoSourceValue: Replace global manager with a manager in a machine function. by Alex Lorenz · 10 years ago
  99. 5d36b23 [PowerPC] Use the MachineCombiner to reassociate fadd/fmul by Hal Finkel · 10 years ago
  100. 8acae52 [PowerPC] Fix the PPCInstrInfo::getInstrLatency implementation by Hal Finkel · 10 years ago