1. 8c4a352 AMDGPU: Add pass to lower kernel arguments to loads by Matt Arsenault · 7 years ago
  2. 90083d3 AMDGPU: Try a lot harder to emit scalar loads by Matt Arsenault · 7 years ago
  3. 1349a04 AMDGPU: Make v2i16/v2f16 legal on VI by Matt Arsenault · 7 years ago
  4. 67a9815 AMDGPU: Custom lower v4i16/v4f16 vector operations by Matt Arsenault · 7 years ago
  5. c40d9f2 AMDGPU/GCN: Bring processors in sync with AMDGPUUsage by Konstantin Zhuravlyov · 8 years ago
  6. 35845f0 [AMDGPU] Fix pointer info for lowering load/store for r600 for amdgiz environment by Yaxun Liu · 8 years ago
  7. 4e309b0 AMDGPU: Start selecting global instructions by Matt Arsenault · 8 years ago
  8. c910a70 [AMDGPU] Add INDIRECT_BASE_ADDR to R600_Reg32 class (PR33045) by Simon Pilgrim · 8 years ago
  9. 9fa1696 [AMDGPU] Resubmit SDWA peephole: enable by default by Sam Kolton · 9 years ago
  10. d4f70c7 Revert r299536. [AMDGPU] SDWA peephole: enable by default. by Ivan Krasin · 9 years ago
  11. 34e2978 [AMDGPU] SDWA peephole: enable by default by Sam Kolton · 9 years ago
  12. 3dbeefa AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel by Matt Arsenault · 9 years ago
  13. eb522e6 AMDGPU: Support v2i16/v2f16 packed operations by Matt Arsenault · 9 years ago
  14. 7aad8fd Enable FeatureFlatForGlobal on Volcanic Islands by Matt Arsenault · 9 years ago
  15. 6dca542 AMDGPU: Add Assert[SZ]Ext during argument load creation by Matt Arsenault · 9 years ago
  16. f42c692 AMDGPU: Run pointer optimization passes by Matt Arsenault · 9 years ago
  17. 2da0cba SelectionDAG: Implement expansion of {S,U}MIN/MAX in integer legalization by Jan Vesely · 9 years ago
  18. 0bc954e AMDGPU/SI: Enable lanemask tracking in misched by Tom Stellard · 10 years ago
  19. 9c47dd5 AMDGPU: Remove some old intrinsic uses from tests by Matt Arsenault · 10 years ago
  20. 10a5092 Fix broken type legalization of min/max by Matt Arsenault · 10 years ago
  21. fabab4b SelectionDAG: Match min/max if the scalar operation is legal by Matt Arsenault · 10 years ago
  22. 45bb48e R600 -> AMDGPU rename by Tom Stellard · 10 years ago[Renamed from llvm/test/CodeGen/R600/min.ll]
  23. 705eb8f Implement computeKnownBits for min/max nodes by Matt Arsenault · 10 years ago
  24. 314eac7 R600/SI: Add test for min / max with immediate by Matt Arsenault · 11 years ago
  25. a79ac14 [opaque pointer type] Add textual IR support for explicit type parameter to load instruction by David Blaikie · 11 years ago
  26. 79e6c74 [opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction by David Blaikie · 11 years ago
  27. 49f8bfd R600/SI: Add a stub GCNTargetMachine by Tom Stellard · 11 years ago
  28. dc10307 R600/SI: Only form min/max with 1 use. by Matt Arsenault · 11 years ago
  29. d28a7fd R600/SI: Match integer min / max instructions by Matt Arsenault · 11 years ago