- 38b469e ARM LDR_PRE/LDR_POST/STR_PRE/STR_POST (and the *B counterparts) binary encoding. by Jim Grosbach · 15 years ago
- 63274cb add fields to the .td files unconditionally, simplifying tblgen a bit. by Chris Lattner · 15 years ago
- 8fdd172 First stab at providing correct Thumb2 encodings, start with adc. by Owen Anderson · 15 years ago
- 20b6fd7 Start of support for binary emit of 16-it Thumb instructions. by Jim Grosbach · 15 years ago
- ce2250f Fill out support for Thumb2 encodings of NEON instructions. by Owen Anderson · 15 years ago
- 99a8cb4 Add correct Thumb2 encodings for NEON vst[1,2,3,4] and vld[1,2,3,4]. by Owen Anderson · 15 years ago
- 7ffe3b3 Add support for Thumb2 encodings of NEON data processing instructions, using the new PostEncoderMethod infrastructure. by Owen Anderson · 15 years ago
- 9d6d77a Encoding of destination fixup for ARM branch and conditional branch by Jim Grosbach · 15 years ago
- 68685e6 Encoding for ARM LDRSH_POST. by Jim Grosbach · 15 years ago
- 607efcb ARM STRH encoding information. by Jim Grosbach · 15 years ago
- cc4a491 ARM LDM encoding for the mode (ia, ib, da, db) operand. by Jim Grosbach · 15 years ago
- 59002dc For ARM load/store instructions, encode [reg+reg] with no shifter immediate as by Jim Grosbach · 15 years ago
- dbfb5ed Add encoder method for ARM load/store shifted register offset operands. by Jim Grosbach · 15 years ago
- 9098714 Add support for a few simple fixups to the ARM Darwin asm backend. This allows by Jim Grosbach · 15 years ago
- 1b83ed5 Revert r118457 and r118458. These won't hold for GPRs. by Bill Wendling · 15 years ago
- 31b850b Get the register and count from the register list operands. by Bill Wendling · 15 years ago
- 0fb841f Add ARM fixup info for load/store label references. Probably will need a bit of by Jim Grosbach · 15 years ago
- 2eed7a1 Teach ARM Target to use the tblgen support for generating an MC'ized by Jim Grosbach · 15 years ago
- 49b0c45 trailing whitespace by Jim Grosbach · 15 years ago
- 6552a10 Put the PC encoding in the correct bit position. by Bill Wendling · 15 years ago
- e84eb99 The MC code couldn't handle ARM LDR instructions with negative offsets: by Bill Wendling · 15 years ago
- f9eebb5 Obsessive formatting changes. No functionality impact. by Bill Wendling · 15 years ago
- 23436b6 Omit unused parameter name. by Bill Wendling · 15 years ago
- 91da9ab Simplify the EncodeInstruction method now that a lot of the special case stuff by Bill Wendling · 15 years ago
- 603bd8f Rename getAddrModeImm12OpValue to getAddrModeImmOpValue and expand it to work by Bill Wendling · 15 years ago
- a4b63e1 Rename encoder methods to match naming convention. by Owen Anderson · 15 years ago
- a838595 Add correct encodings for the rest of the vld instructions that we generate. by Owen Anderson · 15 years ago
- 526ffd5 Add correct NEON encodings for vld2, vld3, and vld4 basic variants. by Owen Anderson · 15 years ago
- f1610f7 Add aesthetic break. by Owen Anderson · 15 years ago
- ad40234 Add correct NEON encodings for the "multiple single elements" form of vld. by Owen Anderson · 15 years ago
- 2ba03aa Explicitly check for non-consant reference in an LDRi12 instruction. Add FIXME by Jim Grosbach · 15 years ago
- a3efae3 Remove unused function. by Jim Grosbach · 15 years ago
- 7b27510 Avoid re-evaluating MI.getNumOperands() every iteration of the loop. by Jim Grosbach · 15 years ago
- 74ef9e1 Encode the register list operands for ARM mode LDM/STM instructions. by Jim Grosbach · 15 years ago
- 96d8284 trailing whitespace by Jim Grosbach · 15 years ago
- 58018e6 s/getNEONVcvtImm32/getNEONVcvtImm32OpValue/ to be consistent with other operand by Jim Grosbach · 15 years ago
- 505607e PLD, PLDW, PLI encodings, plus refactor their use of addrmode2. by Jim Grosbach · 15 years ago
- fadb951 Provide correct encodings for NEON vcvt, which has its own special immediate encoding by Owen Anderson · 15 years ago
- 1e4d9a1 First part of refactoring ARM addrmode2 (load/store) instructions to be more by Jim Grosbach · 15 years ago
- 5edb03e ARM Binary encoding information for BFC/BFI instructions. by Jim Grosbach · 15 years ago
- 2bfa8ed Move the encoding logic for Q registers into getMachineOpValue(). by Owen Anderson · 15 years ago
- 68a335e ARM mode encoding information for UBFX and SBFX instructions. by Jim Grosbach · 15 years ago
- 6f52f8a Add support for vmov.f64/.f32 encoding. There's a bit of a hack going on by Bill Wendling · 15 years ago
- 1e7db68 Add ARM mode encoding for [SU]XT[BH] and [SU]XTA[BH] instructions. by Jim Grosbach · 15 years ago
- efd5369 Add the rest of the ARM so_reg encoding options (register shifted register) by Jim Grosbach · 15 years ago
- 12e493a Move the ARM so_imm encoding into a custom operand encoder and remove the by Jim Grosbach · 15 years ago
- d9d31da Add custom encoder for the 's' bit denoting whether an ARM arithmetic by Jim Grosbach · 15 years ago
- 0e57a9f Add MOVi ARM encoding. by Jim Grosbach · 15 years ago
- feeae27 Nuke unused wrapper function. by Jim Grosbach · 15 years ago
- 6fead93 Add encoding information for the remainder of the generic arithmetic by Jim Grosbach · 15 years ago
- b7c2962 MC machine encoding for simple aritmetic instructions that use a shifted by Jim Grosbach · 15 years ago
- c43c930 Implement a few more binary encoding bits. Still very early stage proof-of- by Jim Grosbach · 15 years ago
- b770c00 Reapply 116059, this time without the fatfingered pasto at the top. by Jim Grosbach · 15 years ago
- 00351b7 Reverting 116059. Bots are unhappy with it. by Jim Grosbach · 15 years ago
- e2d30cd 'const'ify getMachineOpValue() and associated helpers. by Jim Grosbach · 15 years ago
- 0bb2f9a Enable binary encoding of some simple instructions. by Jim Grosbach · 15 years ago
- a7b6d58 Make <target>CodeEmitter::getBinaryCodeForInstr() a const method. by Jim Grosbach · 15 years ago
- 9102909 Trivial MC code emitter shell. No instruction forms actually handled yet. by Jim Grosbach · 15 years ago
- 8aed386 Include the auto-generated bits for machine encoding. by Jim Grosbach · 15 years ago
- 07b5b18 ARM instruction don't have instruction prefixes, so remove the helper functions by Jim Grosbach · 15 years ago
- abf60e3 Fix build. by Michael J. Spencer · 15 years ago
- 1287f4f Add skeleton infrastructure for the ARMMCCodeEmitter class. Patch by Jason Kim! by Jim Grosbach · 15 years ago