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gerrit-public.fairphone.software / toolchain / llvm-project / 84e68b2994470dcdf67a6bac509c9790d1ae9782 / llvm / lib / Target / Sparc / Disassembler / SparcDisassembler.cpp
  1. 84e68b2 [Modules] Fix potential ODR violations by sinking the DEBUG_TYPE by Chandler Carruth · 12 years ago
  2. a1bc0f5 [MC] Require an MCContext when constructing an MCDisassembler. by Lang Hames · 12 years ago
  3. f703132 [Sparc] Add support for decoding 'swap' instruction. by Venkatraman Govindaraju · 12 years ago
  4. 07d3af2 [Sparc] Add return/rett instruction to Sparc backend. by Venkatraman Govindaraju · 12 years ago
  5. 4fa2ab2 [Sparc] Add support for decoding jmpl/retl/ret instruction. by Venkatraman Govindaraju · 12 years ago
  6. 81aae57 [Sparc] Add support for parsing fcmp with %fcc registers. by Venkatraman Govindaraju · 12 years ago
  7. 484ca1a [Sparc] Add support to decode negative simm13 operands in the sparc disassembler. by Venkatraman Govindaraju · 12 years ago
  8. 78df2de [Sparc] Add support for decoding call instructions in the sparc disassembler. by Venkatraman Govindaraju · 12 years ago
  9. fb54821 [Sparc] Add support to disassemble sparc memory instructions. by Venkatraman Govindaraju · 12 years ago
  10. 0b9debf [Sparc] Replace (unsigned)-1 with ~OU as suggested by Reid Kleckner. by Venkatraman Govindaraju · 12 years ago
  11. 2bab98b [Sparc] Explicitly cast -1 to unsigned to fix buildbot errors. by Venkatraman Govindaraju · 12 years ago
  12. dfcccc7 [Sparc] Add initial implementation of disassembler for sparc by Venkatraman Govindaraju · 12 years ago