- 8de5f24 [ARM] Accept conditional versions of BXNS and BLXNS by Oliver Stannard · 9 years ago
- d906bf1 RAS extensions are part of ARMv8.2-A. This change enables them by introducing a by Sjoerd Meijer · 10 years ago
- 608cb5d [ARM] Support and tests for transform of LDR rt, = to MOV by Renato Golin · 10 years ago
- 3f12613 [ARM] Delay ARM constant pool creation. NFC. by Renato Golin · 10 years ago
- f6ed8bb [scan-build] fix warnings emitted on LLVM ARM code base by Renato Golin · 10 years ago
- c869e91 [ARM] Avoid switching ARM/Thumb mode on .arch/.cpu directive by Oliver Stannard · 10 years ago
- aa35bd2 ARM: disallow pc as a base register in Thumb2 memory ops. by Tim Northover · 10 years ago
- b3e8a6d Move MCTargetAsmParser.h to llvm/MC/MCParser where it belongs. by Benjamin Kramer · 10 years ago
- f57c197 Reflect the MC/MCDisassembler split on the include/ level. by Benjamin Kramer · 10 years ago
- f277c8a [ARM] Add new system registers to ARMv8-M Baseline/Mainline by Bradley Smith · 10 years ago
- fed3e4a [ARM] Add ARMv8-M security extension instructions to ARMv8-M Baseline/Mainline by Bradley Smith · 10 years ago
- 65b8538 [ARM] Add ARMv8.2-A FP16 scalar instructions by Oliver Stannard · 10 years ago
- d4a0d18 Revert "[ARM] Add ARMv8-M security extension instructions to ARMv8-M Baseline/Mainline" by Reid Kleckner · 10 years ago
- 47f2452 # This is a combination of 2 commits. # The first commit's message is: by Reid Kleckner · 10 years ago
- 42f6e90 [ARM] Add new system registers to ARMv8-M Baseline/Mainline by Bradley Smith · 10 years ago
- 618712d [ARM] Add ARMv8-M security extension instructions to ARMv8-M Baseline/Mainline by Bradley Smith · 10 years ago
- a118910 [ARM] Add B.W and CBZ instructions to ARMv8-M Baseline by Bradley Smith · 10 years ago
- 187d33e Revert "[ARM] Add ARMv8.2-A FP16 scalar instructions" by Reid Kleckner · 10 years ago
- 2de8c16 [ARM] Add ARMv8.2-A FP16 vector instructions by Oliver Stannard · 10 years ago
- 48568cb [ARM] Add ARMv8.2-A FP16 scalar instructions by Oliver Stannard · 10 years ago
- b258d79 ARM: Change ArchCheck field to uint64_t by Matthias Braun · 10 years ago
- 4667071 [ARM] Add ARMv8.2-A to TargetParser by Oliver Stannard · 10 years ago
- 9327a75 [ARM,AArch64] Store source location of asm constant pool entries by Oliver Stannard · 10 years ago
- 09be060 [ARM,AArch64] Store source location for values in assembly files by Oliver Stannard · 10 years ago
- 323fee1 [ARM] Introduce subtarget features per ARM architecture. by Bradley Smith · 10 years ago
- b11ef08 Reduce the size of MCRelaxableFragment. by Akira Hatanaka · 10 years ago
- bd9fc28 [MCTargetAsmParser] Move the member varialbes that reference by Akira Hatanaka · 10 years ago
- b4398107 [ARM] Allow SP in rGPR, starting from ARMv8 by Artyom Skrobov · 10 years ago
- 4b5507a Actually switch the arch when we see .arch. PR21695 by Roman Divacky · 10 years ago
- 72ca6b8 [ARM] Support for ARMv6-Z / ARMv6-ZK missing by Artyom Skrobov · 10 years ago
- cf29644 [ARM] Handle +t2dsp feature as an ArchExtKind in ARMTargetParser.def by Artyom Skrobov · 10 years ago
- bb47b9a [Triple] Stop abusing a class to have only static methods and just use by Chandler Carruth · 10 years ago
- dbaf049 Revert "Centralize the information about which object format we are using." by Rafael Espindola · 10 years ago
- 90eb70c Centralize the information about which object format we are using. by Rafael Espindola · 10 years ago
- a5fd382 -Wdeprecated-clean: Fix cases of violating the rule of 5 in ways that are deprecated in C++11 by David Blaikie · 10 years ago
- 4ea7075 - Added support for parsing HWDiv features using Target Parser. by Alexandros Lamprineas · 10 years ago
- fe2c8b8 [llvm-mc] Pushing plumbing through for --fatal-warnings flag. by Colin LeMahieu · 10 years ago
- 61f9efe ARMAsmParser: Take MCInst param by const-ref by Hans Wennborg · 10 years ago
- 69bf1ce [ARM] Handle commutativity when converting to tADDhirr in Thumb2 by Scott Douglass · 10 years ago
- d9d8d26 [ARM] Add Thumb2 ADD with SP narrowing from 3 operand to 2 by Scott Douglass · 10 years ago
- 039f768 [ARM] Small refactor of tryConvertingToTwoOperandForm (nfc) by Scott Douglass · 10 years ago
- e463e47 MC: Only allow changing feature bits in MCSubtargetInfo by Duncan P. N. Exon Smith · 10 years ago
- bb57d73 MC: Remove MCSubtargetInfo::InitCPUSched() by Duncan P. N. Exon Smith · 10 years ago
- 8143bc2 [ARM] Thumb1 3 to 2 operand convertion for commutative operations by Scott Douglass · 10 years ago
- 2740a63 [ARM] Don't be overzealous converting Thumb1 3 to 2 operands by Scott Douglass · 10 years ago
- 47a3fce [ARM] Add Thumb2 ADD with PC narrowing from 3 operand to 2 by Scott Douglass · 10 years ago
- 8c7803f [ARM] Refactor converting Thumb1 from 3 to 2 operand (nfc) by Scott Douglass · 10 years ago
- 86ecbb7 Reverting r241058 because it's causing buildbot failures. by Ranjeet Singh · 10 years ago
- 5b11909 There are a few places where subtarget features are still by Ranjeet Singh · 10 years ago
- 80d21cb Change .thumb_set to have the same error checks as .set. by Pete Cooper · 10 years ago
- 572e03a Fix "the the" in comments. by Eric Christopher · 10 years ago
- 3182ee9 Removing spurious semi colons; NFC. by Aaron Ballman · 10 years ago
- d03d229 [ARM] Add knowledge of FPU subtarget features to TargetParser by John Brawn · 10 years ago
- 5d78c9c Comment change. NFC by Renato Golin · 11 years ago
- 230d298 [ARMTargetParser] Move IAS arch ext parser. NFC by Renato Golin · 11 years ago
- 13760bd MC: Clean up MCExpr naming. NFC. by Jim Grosbach · 11 years ago
- f4a1365 Use operator<< instead of print in a few more places. by Rafael Espindola · 11 years ago
- db0712f Use std::bitset for SubtargetFeatures. by Michael Kuperstein · 11 years ago
- 6f48200 MC: Clean up method names in MCContext. by Jim Grosbach · 11 years ago
- e9119e4 MC: Modernize MCOperand API naming. NFC. by Jim Grosbach · 11 years ago
- c3434b3 Reverting r237234, "Use std::bitset for SubtargetFeatures" by Michael Kuperstein · 11 years ago
- aba4a34 Use std::bitset for SubtargetFeatures by Michael Kuperstein · 11 years ago
- 35de35d Change TargetParser enum names to avoid macro conflicts (llvm) by Renato Golin · 11 years ago
- f5f373f TargetParser: FPU/ARCH/EXT parsing refactory - NFC by Renato Golin · 11 years ago
- 0e0f8d2 [ARM] Add v8.1a "Privileged Access Never" extension by Vladimir Sukharev · 11 years ago
- 6f13d0c Fix BXJ is undefined in AArch32. by Charlie Turner · 11 years ago
- fb37cfa Refactor: Simplify boolean expressions in ARM target by Alexander Kornienko · 11 years ago
- 2afdb32 [ARM] Rename v8.1a from "extension" to "architecture" by Vladimir Sukharev · 11 years ago
- c632cda [AArch64, ARM] Add v8.1a architecture and generic cpu by Vladimir Sukharev · 11 years ago
- 29704e7 Revert "Use std::bitset for SubtargetFeatures" by Michael Kuperstein · 11 years ago
- 774b441 Use std::bitset for SubtargetFeatures by Michael Kuperstein · 11 years ago
- 9f380a3 Fix uses of reserved identifiers starting with an underscore followed by an uppercase letter by David Blaikie · 11 years ago
- efd7a96 Reverting r229831 due to multiple ARM/PPC/MIPS build-bot failures. by Michael Kuperstein · 11 years ago
- ba5b04c Use std::bitset for SubtargetFeatures by Michael Kuperstein · 11 years ago
- e045e37 ARM: Fix another regression introduced in r223113 by Asiri Rathnayake · 11 years ago
- 9f4cd59 [ARM] Fix subtarget feature set truncation when using .cpu directive by Bradley Smith · 11 years ago
- b61f01f Fix some unnoticed/unwanted behavior change from r222319. by Frederic Riss · 11 years ago
- d90e64e ARM: make a table more readable (NFC) by Saleem Abdulrasool · 11 years ago
- 70fe588 ARM: further correct .fpu directive handling by Saleem Abdulrasool · 11 years ago
- 07b7c03 ARM: improve caret diagnostics for invalid FPU name by Saleem Abdulrasool · 11 years ago
- 206d116 ARM: correct handling of .fpu directive by Saleem Abdulrasool · 11 years ago
- 5a13914 Correct POP handling for v7m by Jyoti Allur · 11 years ago
- faa4f07 ARM: prepare prefix parsing for improved AAELF support by Saleem Abdulrasool · 11 years ago
- 77436f8 Fix regression in r225266. by Asiri Rathnayake · 11 years ago
- 52376ac [ARM] Cleanup so_imm* tblgen defintions by Asiri Rathnayake · 11 years ago
- 6632d1f Parse Tag_compatibility correctly. by Charlie Turner · 11 years ago
- 589ceee Minor cleanup to all the switches after MatchInstructionImpl in all the AsmParsers. by Craig Topper · 11 years ago
- 0b5a852 ARM: fix an off-by-one in the register list access by Saleem Abdulrasool · 11 years ago
- 3a23917 ARM: improve instruction validation for thumb mode by Saleem Abdulrasool · 11 years ago
- 7835e9b Fix modified immediate bug reported by MC Hammer. by Asiri Rathnayake · 11 years ago
- 6fd64ff Add a FIXME as requested by Renato Golin. by Roman Divacky · 11 years ago
- 13cef35 Fix yet another unseen regression caused by r223113 by Asiri Rathnayake · 11 years ago
- d33304b Fix a minor regression introduced in r223113 by Asiri Rathnayake · 11 years ago
- 5403da4 Revert "[Thumb/Thumb2] Added restrictions on PC, LR, SP in the register list for PUSH/POP/LDM/STM. <Differential Revision: http://reviews.llvm.org/D6090>" by Rafael Espindola · 11 years ago
- b24d0ab [Thumb/Thumb2] Added restrictions on PC, LR, SP in the register list for PUSH/POP/LDM/STM. <Differential Revision: http://reviews.llvm.org/D6090> by Jyoti Allur · 11 years ago
- fdf0560 Change the name to be in style. by Roman Divacky · 11 years ago
- 7e6b595 Introduce CPUStringIsValid() into MCSubtargetInfo and use it for ARM .cpu parsing. by Roman Divacky · 11 years ago
- a0199b9 Add support for ARM modified-immediate assembly syntax. by Asiri Rathnayake · 11 years ago
- 4d88ae2 Add ARM ERET and HVC virtualisation extension instructions. by Charlie Turner · 11 years ago
- 02b13a8 Fix transformation of add with pc argument to adr for non-immediate arguments. by Joerg Sonnenberger · 11 years ago