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gerrit-public.fairphone.software / toolchain / llvm-project / 90b7cd6a407fa45e4310c1a85bb5c44e3afa84da / llvm / lib / CodeGen / LiveIntervalAnalysis.cpp
  1. 210fc62 In some rare cases, the register allocator can spill registers but end up not utilizing registers at all. The fundamental problem is linearscan's backtracking can end up freeing more than one allocated registers. However, reloads and restores might be folded into uses / defs and freed registers might not be used at all. by Evan Cheng · 17 years ago
  2. 093e4c5 Fix PR4076. Correctly create live interval of physical register with two-address update. by Evan Cheng · 17 years ago
  3. 0f85bd3 Fix PR4056. It's possible a physical register def is dead if its implicit use is deleted by two-address pass. by Evan Cheng · 17 years ago
  4. 1a99a5f It has finally happened. Spiller is now using live interval info. by Evan Cheng · 17 years ago
  5. d67efaa Added a linearscan register allocation optimization. When the register allocator spill an interval with multiple uses in the same basic block, it creates a different virtual register for each of the reloads. e.g. by Evan Cheng · 17 years ago
  6. 1d50407 Don't abort on an aliasing physical register that does not have by Dan Gohman · 17 years ago
  7. 5185617 Fix pr3954. The register scavenger asserts for inline assembly with by Bob Wilson · 17 years ago
  8. ad3e549 Implement support for using modeling implicit-zero-extension on x86-64 by Dan Gohman · 17 years ago
  9. 76a561f Don't assign a new stack slot if the pre-alloc splitter already assigned one. by Owen Anderson · 17 years ago
  10. f858466 Fix PR3391 and PR3864. Reg allocator infinite looping. by Evan Cheng · 17 years ago
  11. 968c3b0 Model inline asm constraint which ties an input to an output register as machine operand TIED_TO constraint. This eliminated the need to pre-allocate registers for these. This also allows register allocator can eliminate the unneeded copies. by Evan Cheng · 17 years ago
  12. 8d5baa0 Fix the Win32 VS2008 build: by Sebastian Redl · 17 years ago
  13. 1361cbb Added MachineInstr::isRegTiedToDefOperand to check for two-addressness. by Evan Cheng · 17 years ago
  14. f0bfc6a Fix how livein live intervals are handled. Previously it could end at MBB start. Sorry, no small test case possible. by Evan Cheng · 17 years ago
  15. b378363 Fix PR3486. Fix a bug in code that manually patch physical register live interval after its sub-register is coalesced with a virtual register. by Evan Cheng · 17 years ago
  16. 76a2736 Exit with nice warnings when register allocator run out of registers. by Evan Cheng · 17 years ago
  17. c544cb0 Change TargetInstrInfo::isMoveInstr to return source and destination sub-register indices as well. by Evan Cheng · 17 years ago
  18. f6768bd The coalescer does not coalesce a virtual register to a physical register if any of the physical register's sub-register live intervals overlaps with the virtual register. This is overly conservative. It prevents a extract_subreg from being coalesced away: by Evan Cheng · 17 years ago
  19. 0869f78 Fix PR3149. If an early clobber def is a physical register and it is tied to an input operand, it effectively extends the live range of the physical register. Currently we do not have a good way to represent this. by Evan Cheng · 17 years ago
  20. 9de2ac8 Clarify some comments. by Dan Gohman · 17 years ago
  21. 43c0891 Reason #3 from 60595 doesn't hold true. If we can fold a PIC load from constpool into a use, the rewrite happens at time of spill (not in VirtRegMap). Later on, if the GlobalBaseReg is spilled, the spiller can see the use uses GlobalBaseReg and do the right thing. by Evan Cheng · 17 years ago
  22. 994faaf Fix comment. by Evan Cheng · 17 years ago
  23. d24be45 Drop the reg argument to isRegReDefinedByTwoAddr, which was redundant. by Dan Gohman · 17 years ago
  24. 69cc2cb Rename isSimpleLoad to canFoldAsLoad, to better reflect its meaning. by Dan Gohman · 17 years ago
  25. 3336b1f LiveRanges are represented as half-open ranges. Fix the findLiveInMBBs code by Dan Gohman · 17 years ago
  26. cb181bb Silence unused variable warnings. by Devang Patel · 17 years ago
  27. 8fed4ce Use find_first/find_next to iterate through all the set bits in a by Dan Gohman · 17 years ago
  28. 5efcb61 Remove some debugging code made redundant by the change to do by Dan Gohman · 17 years ago
  29. 938e201 - Rewrite code that update register live interval that's split. by Evan Cheng · 17 years ago
  30. b00b267 by David Greene · 17 years ago
  31. 4bac4d0 Avoid splitting an interval multiple times; avoid splitting re-materializable val# (for now). by Evan Cheng · 17 years ago
  32. 2dadd3b By min, I mean max. by Evan Cheng · 17 years ago
  33. ac4e70d When creating intervals, leave min(1, numdefs) holes after each instruction. by Evan Cheng · 17 years ago
  34. 1d338fc Add an option to enable StrongPHIElimination, for ease of testing. by Owen Anderson · 17 years ago
  35. 0d1e9a8 Switch the MachineOperand accessors back to the short names like by Dan Gohman · 17 years ago
  36. f4a3640 Fix a simple error in renumbering kill markaers, that took an inordinant amount of time to track down. by Owen Anderson · 17 years ago
  37. 9156bd2 Re-apply 56835 along with header file changes. by Evan Cheng · 17 years ago
  38. 2b9adce Revert commit 56835 since it breaks the build. by Duncan Sands · 17 years ago
  39. 9469049 If a re-materializable instruction has a register operand, the spiller will change the register operand's spill weight to HUGE_VAL to avoid it being spilled. However, if the operand is already in the queue ready to be spilled, avoid re-materializing it. by Evan Cheng · 17 years ago
  40. c36660d Next round of earlyclobber handling. Approach the by Dale Johannesen · 17 years ago
  41. df8f1cb Fetch the starting index of the block when assigning intervals. This gets live-in indices by Owen Anderson · 17 years ago
  42. e519bd4 Remove AsmThatEarlyClobber etc. from LiveIntervalAnalysis by Dale Johannesen · 17 years ago
  43. f8610eb Add a bit to mark operands of asm's that conflict by Dale Johannesen · 17 years ago
  44. 82ab1e7 Live intervals for live-in registers should begin at the beginning of a basic block, not at the first by Owen Anderson · 17 years ago
  45. 38453ee Remove isImm(), isReg(), and friends, in favor of by Dan Gohman · 17 years ago
  46. 2a45877 Allow the fast-path spilling code to attempt folding, but still leaving out remat and splitting. by Owen Anderson · 17 years ago
  47. c75ae13 The fast-path still needs to set kill markers and spill/restore points as appropriate. by Owen Anderson · 17 years ago
  48. 442dc6f Add a flag to enable the fast spilling path. by Owen Anderson · 17 years ago
  49. a57c570 Fix a few more bugs: by Owen Anderson · 17 years ago
  50. 60f6b2c Fix several bugs in the new fast-path: by Owen Anderson · 17 years ago
  51. e996a12 Clients of addIntervalForSpills expect the added intervals to be returned sorted by starting index. by Owen Anderson · 17 years ago
  52. 75e27d2 Simplify the fast-patch interval spilling by using MachineRegisterInfo::reg_iterator. by Owen Anderson · 17 years ago
  53. cc9314b Resurrect some ancient code to add spill ranges without attempting folding, remat, or splitting. This code has been updated to current APIs by Owen Anderson · 17 years ago
  54. 706f6b7 Expunge the last uses of std::map from LiveIntervals. by Owen Anderson · 17 years ago
  55. 767b5cc Move r2iMap_ over to DenseMap from std::map. by Owen Anderson · 17 years ago
  56. 51f689a Make the allocation of LiveIntervals explicit, rather than holding them in the r2iMap_ by value. This will prevent references to them from being invalidated by Owen Anderson · 17 years ago
  57. d184929 Oops, didn't mean to commit this. by Owen Anderson · 17 years ago
  58. 03dddbb Only remap each VNInfo once when doing renumbering. by Owen Anderson · 17 years ago
  59. 7b5f535 Value numbers whose def index is a special sentinel value should not be remapped. by Owen Anderson · 17 years ago
  60. e9a0bae More fixes for corner cases when remapping live range indices. by Owen Anderson · 17 years ago
  61. 2532e75 Don't decrement the BB remap when we don't need to. by Owen Anderson · 17 years ago
  62. 804c95d Fold the useful features of alist and alist_node into ilist, and by Dan Gohman · 17 years ago
  63. 24b3ce1 Fix a typo in a comment. by Dan Gohman · 17 years ago
  64. 7a45b16 Revert my previous patch. In retrospect, this is completely the wrong way to fix this problem. by Owen Anderson · 17 years ago
  65. 074f9db Special cases are needed in renumbering when dealing with renumbering after a PHI has been removed. The interval previously defined by Owen Anderson · 17 years ago
  66. 88499a3 Properly remap live ranges whose end indices are the end of the function. by Owen Anderson · 17 years ago
  67. c7d53fd Make the remapping of interval indices (particularly ending indices) more robust. by Owen Anderson · 17 years ago
  68. 394ec3a Disable the new aggressive remat logic introduced in 54000; it causes some by Dan Gohman · 17 years ago
  69. 09b0448 Enable rematerialization of constants using AliasAnalysis::pointsToConstantMemory, by Dan Gohman · 17 years ago
  70. 50d393a Enable the insertion of empty indices into LiveInterals, thereby making renumbering possible. by Owen Anderson · 17 years ago
  71. 7c800ad Fix a compile-time regression introduced by my heuristic-changing patch. I forgot by Owen Anderson · 17 years ago
  72. 029182f Change the heuristics used in the coalescer, register allocator, and within by Owen Anderson · 17 years ago
  73. a7a20c4 Fix a memory leak in LiveIntervalAnalysis. by Evan Cheng · 17 years ago
  74. 0ece943 Re-introduce LeakDetector support for MachineInstrs and MachineBasicBlocks. by Dan Gohman · 17 years ago
  75. 2b3c52d Typos. by Evan Cheng · 17 years ago
  76. e0a352e Fix PR2536: a nasty spiller bug. If a two-address instruction uses a register but the use portion of its live range is not part of its liveinterval, it must be defined by an implicit_def. In that case, do not spill the use. e.g. by Evan Cheng · 17 years ago
  77. e9ba28d - Change the horrible N^2 isRegReDefinedByTwoAddr. Now callers must supply the operand index of def machineoperand and at most one full scan of non-implicit operands is needed. by Evan Cheng · 17 years ago
  78. 3b46030 Pool-allocation for MachineInstrs, MachineBasicBlocks, and by Dan Gohman · 17 years ago
  79. 7d98a48 - Remove calls to copyKillDeadInfo which is an N^2 function. Instead, propagate kill / dead markers as new instructions are constructed in foldMemoryOperand, convertToThressAddress, etc. by Evan Cheng · 17 years ago
  80. b55675e Remember which MachineOperand we were processing, so we don't have to scan the list to find it again later. by Owen Anderson · 17 years ago
  81. f593a65 Undo spill weight tweak. Need to investigate the performance regressions. by Evan Cheng · 17 years ago
  82. 3c4ccc8 Revert my last patch, which was causing regression test failures. by Owen Anderson · 17 years ago
  83. 55bc8486 Minor spiller tweak to unfavor reload into load/store instructions. by Evan Cheng · 17 years ago
  84. 80ef880 Insert empty slots into the instruction numbering in live intervals, so that we can more easily by Owen Anderson · 17 years ago
  85. f873ed1 Live-through live interval is [mbb start, mbb end+1]. by Evan Cheng · 17 years ago
  86. 476e91a Remove special case handling of empty MBBs now that we assign indices to them. by Owen Anderson · 17 years ago
  87. 773b2d3 Re-enable empty block indexing by default, since it doesn't seem to have any by Owen Anderson · 17 years ago
  88. e546c55 Make indexing empty basic blocks an option for the moment. by Owen Anderson · 17 years ago
  89. d813091 Assign indices to empty basic blocks. This will be necessary for StrongPHIElimination in the near future. by Owen Anderson · 17 years ago
  90. 6d7a144 Refine stack slot interval weight computation. by Evan Cheng · 17 years ago
  91. 35e2dfe Add a helper for constructing new live ranges that ended from an instruction to the end of its MBB. by Owen Anderson · 17 years ago
  92. 12a0222 Add a stack slot coloring pass. Not yet enabled. by Evan Cheng · 17 years ago
  93. 0908dec Correctly handle removed instructions at the beginning of MBBs when renumbering. by Owen Anderson · 17 years ago
  94. 82fc4cd Make the renumbering correct in the face of deleted instructions that have been removed from the LiveIntervals maps. by Owen Anderson · 17 years ago
  95. bf5b228 Remove <iostream>. by Bill Wendling · 17 years ago
  96. d95dcd1 Revert part of my last patch that I didn't intend to commit yet. by Owen Anderson · 17 years ago
  97. 0178e95 Renumbering needs to account for instruction slot offsets when performing lookups in the index maps. by Owen Anderson · 17 years ago
  98. 779b418 Remap VNInfo data as well when doing renumbering. by Owen Anderson · 17 years ago
  99. 4f8e1ad Factor the numbering computation into a separate method, and add the slightest attempt at some renumbering logic, which is currently unused. by Owen Anderson · 17 years ago
  100. 7c0db62 Revert 51440 as it breaks a bunch of PIC tests. by Evan Cheng · 17 years ago