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gerrit-public.fairphone.software / toolchain / llvm-project / 91be65be656072a68b51a8c4e7bb751ea475d896 / llvm / lib / CodeGen / MachineCSE.cpp
  1. 2946cd7 Update the file headers across all of the LLVM projects in the monorepo by Chandler Carruth · 7 years ago
  2. 8d6ff4c [MachineCSE][GlobalISel] Making sure MachineCSE works mid-GlobalISel (again) by Roman Tereshin · 7 years ago
  3. 81d8ef2 [DebugInfo][Dexter] Incorrect DBG_VALUE after MCP dead copy instruction removal. by Carlos Alberto Enciso · 7 years ago
  4. 06adfa1 [DWARF] Missing location debug information with -O2. by Carlos Alberto Enciso · 7 years ago
  5. b2d3f2e [MIR][MachineCSE] Implementing proper MachineInstr::getNumExplicitDefs() by Roman Tereshin · 7 years ago
  6. d34e60c Rename DEBUG macro to LLVM_DEBUG. by Nicola Zaghen · 7 years ago
  7. 801bf7e [DebugInfo] Examine all uses of isDebugValue() for debug instructions. by Shiva Chen · 7 years ago
  8. 131e749 [MachineCSE] Rewrite a loop checking if a block is in a set of blocks without using a set. NFC. by Michael Zolotukhin · 7 years ago
  9. a9346e0 GlobalISel: Make MachineCSE runnable in the middle of the GlobalISel by Justin Bogner · 8 years ago
  10. f1caa28 MachineFunction: Return reference from getFunction(); NFC by Matthias Braun · 8 years ago
  11. a8a83d1 [CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register. by Francis Visoiu Mistrih · 8 years ago
  12. 9d7bb0c [CodeGen] Print register names in lowercase in both MIR and debug output by Francis Visoiu Mistrih · 8 years ago
  13. f75f4d6 [MachineCSE] Add new callback for is caller preserved or constant physregs by Tony Jiang · 8 years ago
  14. b3bde2e Fix a bunch more layering of CodeGen headers that are in Target by David Blaikie · 8 years ago
  15. 3f833ed Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layering by David Blaikie · 8 years ago
  16. 5df3d89 [CodeGen] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC). by Eugene Zelenko · 8 years ago
  17. 6bda14b Sort the remaining #include lines in include/... and lib/.... by Chandler Carruth · 8 years ago
  18. 1527baa CodeGen: Rename DEBUG_TYPE to match passnames by Matthias Braun · 8 years ago
  19. 2676f82 MachineCSE: Respect interblock physreg liveness by Mikael Holmen · 8 years ago
  20. 3c8b8c9 [codegen] Add generic functions to skip debug values. by Florian Hahn · 9 years ago
  21. de8c1b3 MachineRegisterInfo: Remove unused arg from isConstantPhysReg(); NFC by Matthias Braun · 9 years ago
  22. d98cf00 [CodeGen] Rename MachineInstr::isInvariantLoad to isDereferenceableInvariantLoad. NFC by Justin Lebar · 9 years ago
  23. 9cfc75c CodeGen: Use MachineInstr& in TargetInstrInfo, NFC by Duncan P. N. Exon Smith · 9 years ago
  24. aa641a5 Re-commit optimization bisect support (r267022) without new pass manager support. by Andrew Kaylor · 9 years ago
  25. 6013f45 Revert "Initial implementation of optimization bisect support." by Vedant Kumar · 9 years ago
  26. f0f2792 Initial implementation of optimization bisect support. by Andrew Kaylor · 9 years ago
  27. e885d5e [SSP, 2/2] Create llvm.stackguard() intrinsic and lower it to LOAD_STACK_GUARD by Tim Shen · 9 years ago
  28. 3d07ec9 rangify; NFCI by Sanjay Patel · 10 years ago
  29. 7b560d4 [PM/AA] Rebuild LLVM's alias analysis infrastructure in a way compatible by Chandler Carruth · 10 years ago
  30. f01af29 MachineCSE: Add a target query for the LookAheadLimit heurisitic by Tom Stellard · 10 years ago
  31. 799003b Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used. by Benjamin Kramer · 11 years ago
  32. 26e7ea6 MachineCSE: Clear dead-def flag on CSE. by Matthias Braun · 11 years ago
  33. 54b7d33 [MachineCSE] Clear kill-flag on registers imp-def'd by the CSE'd instruction. by Ahmed Bougacha · 11 years ago
  34. dd6e12d In Machine CSE pass, the source register of a COPY machine instruction can by Jiangning Liu · 11 years ago
  35. fc6de42 Have MachineFunction cache a pointer to the subtarget to make lookups by Eric Christopher · 11 years ago
  36. d913448 Remove the TargetMachine forwards for TargetSubtargetInfo based by Eric Christopher · 11 years ago
  37. c305312 Add TargetInstrInfo interface isAsCheapAsAMove. by Jiangning Liu · 11 years ago
  38. 1b9dde0 [Modules] Remove potential ODR violations by sinking the DEBUG_TYPE by Chandler Carruth · 11 years ago
  39. 7c99ec5 Disable each MachineFunctionPass for 'optnone' functions, unless that by Paul Robinson · 12 years ago
  40. b36376e Switch a number of loops in lib/CodeGen over to range-based for-loops, now that by Owen Anderson · 12 years ago
  41. 16c6bf4 Phase 2 of the great MachineRegisterInfo cleanup. This time, we're changing by Owen Anderson · 12 years ago
  42. 4584cd5 [C++11] Add 'override' keyword to virtual methods that override their base class. by Craig Topper · 12 years ago
  43. b1f25f1 Replace PROLOG_LABEL with a new CFI_INSTRUCTION. by Rafael Espindola · 12 years ago
  44. b6d0bd4 [C++11] Replace llvm::next and llvm::prior with std::next and std::prev. by Benjamin Kramer · 12 years ago
  45. e4083f9 Disabled subregister copy coalescing during MachineCSE. by Andrew Trick · 12 years ago
  46. e339828 Allow MachineCSE to coalesce trivial subregister copies the same way that it coalesces normal copies. by Andrew Trick · 12 years ago
  47. f152836 Revert "Allow MachineCSE to coalesce trivial subregister copies the same way that it coalesces normal copies." by Rafael Espindola · 12 years ago
  48. 88bd862 Allow MachineCSE to coalesce trivial subregister copies the same way by Andrew Trick · 12 years ago
  49. cccd82f whitespace by Andrew Trick · 12 years ago
  50. b94011f Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector size. by Craig Topper · 12 years ago
  51. ed0881b Use the new script to sort the includes of every file under lib. by Chandler Carruth · 13 years ago
  52. f89406a CSE: allow PerformTrivialCoalescing to check copies across basic block by Manman Ren · 13 years ago
  53. f18753b Don't use iterator after being erased. by Jakub Staszak · 13 years ago
  54. 3946877 Do not consider a machine instruction that uses and defines the same by Ulrich Weigand · 13 years ago
  55. 244beb4 Remove unused BitVectors from getAllocatableSet(). by Jakob Stoklund Olesen · 13 years ago
  56. c30a9af Switch most getReservedRegs() clients to the MRI equivalent. by Jakob Stoklund Olesen · 13 years ago
  57. 59c8b41 MachineCSE: Hoist isConstantPhysReg out of the loop, it checks for overlaps already. by Benjamin Kramer · 13 years ago
  58. ef6494f PR13578: Teach MachineCSE that instructions that use a constant register can be CSE'd safely. by Benjamin Kramer · 13 years ago
  59. 1be131b X86: enable CSE between CMP and SUB by Manman Ren · 13 years ago
  60. cb36b8c MachineCSE: Update the heuristics for isProfitableToCSE. by Manman Ren · 13 years ago
  61. d163405 Remove tabs. by Bill Wendling · 13 years ago
  62. 765c699 Remove ParentMap. You can just ask the domnode for its parent. No functionality by Nick Lewycky · 13 years ago
  63. 92a0083 Switch some getAliasSet clients to MCRegAliasIterator. by Jakob Stoklund Olesen · 13 years ago
  64. 1d32658 Use uint16_t to store register overlaps to reduce static data. by Craig Topper · 14 years ago
  65. 4c5ad2b Handle regmasks in MachineCSE. by Jakob Stoklund Olesen · 14 years ago
  66. 5bade3d Re-enable 150652 and 150654 - Make FPSCR non-reserved, and make MachineCSE bail on reserved registers. This *should* be safe as of r150786. by Lang Hames · 14 years ago
  67. 55a2a96 Oop - r150653 + r150654 broke one of my test cases. Backing out for now... by Lang Hames · 14 years ago
  68. 2055493 MachineCSE shouldn't extend the live ranges of reserved or allocatable registers. by Lang Hames · 14 years ago
  69. 1fa5bcb Codegen pass definition cleanup. No functionality. by Andrew Trick · 14 years ago
  70. 9e76199 whitespace by Andrew Trick · 14 years ago
  71. ae22c60 Persuade GCC that there is nothing worth warning about here (there isn't). by Duncan Sands · 14 years ago
  72. d9725a3 Avoid CSE of instructions which define physical registers across MBBs unless by Evan Cheng · 14 years ago
  73. 0be4144 Allow machine-cse to look across MBB boundary when cse'ing instructions that by Evan Cheng · 14 years ago
  74. 7f8e563 Add bundle aware API for querying instruction properties and switch the code by Evan Cheng · 14 years ago
  75. 3e5409d We need to verify that the machine instruction we're using as a replacement for by Bill Wendling · 14 years ago
  76. 6cc775f - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and by Evan Cheng · 14 years ago
  77. 5401962 Re-revert r130877; it's apparently causing a regression on 197.parser, by Eli Friedman · 14 years ago
  78. 2311bdf Minor correction to r130877; fixes PR9846 and hopefully the buildbot failures. by Eli Friedman · 14 years ago
  79. 0fe4608 Re-commit r130862 with a minor change to avoid an iterator running off the edge in some cases. by Eli Friedman · 14 years ago
  80. 3bd79ba Back out r130862; it appears to be breaking bootstrap. by Eli Friedman · 14 years ago
  81. a16fc2f Teach MachineCSE how to do simple cross-block CSE involving physregs. This allows, for example, eliminating duplicate cmpl's on x86. Part of rdar://problem/8259436 . by Eli Friedman · 14 years ago
  82. fe917ef Fix a couple of places where changes are made but not tracked. by Evan Cheng · 15 years ago
  83. 6c8b8dd fit in 80 cols and use MBB::isSuccessor instead of a hand rolled std::find. by Chris Lattner · 15 years ago
  84. 2fb5b31 Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic. by Jakob Stoklund Olesen · 15 years ago
  85. 6eb516d Do not model all INLINEASM instructions as having unmodelled side effects. by Evan Cheng · 15 years ago
  86. 18f164f Use a RecyclingAllocator to allocate values for MachineCSE's ScopedHashTable for by Cameron Zwarich · 15 years ago
  87. b7ff5a0 Teach machine cse to commute instructions. by Evan Cheng · 15 years ago
  88. 2b3f25e Teach machine cse to eliminate instructions with multiple physreg uses and defs. rdar://8610857. by Evan Cheng · 15 years ago
  89. 6c18d1a Get rid of static constructors for pass registration. Instead, every pass exposes an initializeMyPassFunction(), which by Owen Anderson · 15 years ago
  90. 8ac477f Begin adding static dependence information to passes, which will allow us to by Owen Anderson · 15 years ago
  91. df7a4f2 Now with fewer extraneous semicolons! by Owen Anderson · 15 years ago
  92. 1884278 Add MachineRegisterInfo::constrainRegClass and use it in MachineCSE. by Jakob Stoklund Olesen · 15 years ago
  93. b08377e Machine CSE was forgetting to clear some data structures. by Evan Cheng · 15 years ago
  94. 0dcd336 Fix a potential bug that can cause miscomparison with and without debug info. by Evan Cheng · 15 years ago
  95. e0db9d0 Machine CSE preserves CFG. Pass manager was freeing machineloopinfo after machine cse before. by Evan Cheng · 15 years ago
  96. a7aed18 Reapply r110396, with fixes to appease the Linux buildbot gods. by Owen Anderson · 15 years ago
  97. bda59bd Revert r110396 to fix buildbots. by Owen Anderson · 15 years ago
  98. 755aceb Don't use PassInfo* as a type identifier for passes. Instead, use the address of the static by Owen Anderson · 15 years ago
  99. a57b97e Fix batch of converting RegisterPass<> to INTIALIZE_PASS(). by Owen Anderson · 15 years ago
  100. 37c42a3 Remove many calls to TII::isMoveInstr. Targets should be producing COPY anyway. by Jakob Stoklund Olesen · 15 years ago