Log - 91be65be656072a68b51a8c4e7bb751ea475d896 - toolchain/llvm-project

8c4a352 AMDGPU: Add pass to lower kernel arguments to loads by Matt Arsenault · 7 years ago
982aee6 [AMDGPU] Switch scalarize global loads ON by default by Alexander Timofeev · 8 years ago
e4a7413 Revert r307026, "[AMDGPU] Switch scalarize global loads ON by default" by NAKAMURA Takumi · 8 years ago
ea7f08b [AMDGPU] Switch scalarize global loads ON by default by Alexander Timofeev · 8 years ago
3dbeefa AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel by Matt Arsenault · 9 years ago
7aad8fd Enable FeatureFlatForGlobal on Volcanic Islands by Matt Arsenault · 9 years ago
0a1a7b6 Revert "AMDGPU: Enable ConstrainCopy DAG mutation" by Konstantin Zhuravlyov · 9 years ago
3b36bb1 AMDGPU: Enable ConstrainCopy DAG mutation by Matt Arsenault · 9 years ago
fa5f767 AMDGPU: Improve splitting 64-bit bit ops by constants by Matt Arsenault · 9 years ago
124384f AMDGPU: Fix immediate folding logic when shrinking instructions by Matt Arsenault · 9 years ago
71fa1f3 AMDGPU: Fix a few slightly broken tests by Matt Arsenault · 9 years ago
97d0ffb ScheduleDAGInstrs: Rework schedule graph builder. by Matthias Braun · 10 years ago
2fd672a Revert "ScheduleDAGInstrs: Rework schedule graph builder." by Matthias Braun · 10 years ago
d35fe3d ScheduleDAGInstrs: Rework schedule graph builder. by Matthias Braun · 10 years ago
45bb48e R600 -> AMDGPU rename by Tom Stellard · 10 years ago[Renamed from llvm/test/CodeGen/R600/or.ll]
f5b2cd8 R600/SI: Allow commuting compares by Matt Arsenault · 11 years ago
898d11e DAGCombiner: Canonicalize select(and/or,x,y) depending on target. by Matthias Braun · 11 years ago
a79ac14 [opaque pointer type] Add textual IR support for explicit type parameter to load instruction by David Blaikie · 11 years ago
79e6c74 [opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction by David Blaikie · 11 years ago
83f0bce R600/SI: Define a schedule model and enable the generic machine scheduler by Tom Stellard · 11 years ago
7517077 R600/SI: Enable all tests that pass on VI without changes by Marek Olsak · 11 years ago
7d734f4 R600: Cleanup or test by Matt Arsenault · 11 years ago
49f8bfd R600/SI: Add a stub GCNTargetMachine by Tom Stellard · 11 years ago
7784992 R600/SI: Use s_movk_i32 by Matt Arsenault · 11 years ago
326d6ec R600/SI: Change all instruction assembly names to lowercase. by Tom Stellard · 11 years ago
79243d9 R600: Call EmitFunctionHeader() in the AsmPrinter to populate the ELF symbol table by Tom Stellard · 11 years ago
b78875e R600/SI: Fix hardcoded register numbers in test by Matt Arsenault · 11 years ago
fabf545 R600/SI: Move all fabs / fneg handling to patterns by Matt Arsenault · 11 years ago
9f4530b [SDAG] Introduce a combined set to the DAG combiner which tracks nodes by Chandler Carruth · 11 years ago
0d89e84 R600/SI: Fix select on i1 by Matt Arsenault · 11 years ago
10ae6a0 R600: Promote i64 loads to v2i32 by Tom Stellard · 11 years ago
4d7d383 R600/SI: Print more immediates in hex format by Matt Arsenault · 12 years ago
b517c81 R600: Implement isZExtFree. by Matt Arsenault · 12 years ago
684dc80 R600/SI: Fix extra mov from legalizing 64-bit SALU ops. by Matt Arsenault · 12 years ago
248b7b6 R600/SI: Sub-optimial fix for 64-bit immediates with SALU ops. by Matt Arsenault · 12 years ago
f35182c R600/SI: Fix 64-bit bit ops that require the VALU. by Matt Arsenault · 12 years ago
8e2581b R600/SI: Move instruction patterns to scalar versions. by Matt Arsenault · 12 years ago
72b31ee R600/SI: Change formatting of printed registers. by Matt Arsenault · 12 years ago
af77543 R600: Fix handling of vector kernel arguments by Tom Stellard · 12 years ago
fb96169 R600/SI: Add support for i64 bitwise or by Tom Stellard · 12 years ago
70f13db R600/SI: Use -verify-machineinstrs for most tests by Tom Stellard · 12 years ago
2fa162e R600/SI: Expand or of v2i32/v4i32 for SI by Aaron Watry · 12 years ago
4489b85 R600: Expand vector or, shl, srl, and xor nodes by Tom Stellard · 13 years ago