1. 0b4eb1e [AMDGPU][MC] Added support of 64-bit image atomics by Dmitry Preobrazhensky · 8 years ago
  2. 6b65f7c [AMDGPU][MC][GFX9] Enable inline constants for SDWA operands by Dmitry Preobrazhensky · 8 years ago
  3. 3afbd82 [AMDGPU][MC][GFX8][GFX9] Added XNACK_MASK support by Dmitry Preobrazhensky · 8 years ago
  4. 2713495 [AMDGPU][MC] Added support of 256- and 512-bit tuples of ttmp registers by Dmitry Preobrazhensky · 8 years ago
  5. cad7fa8 AMDGPU: Partially fix disassembly of MIMG instructions by Matt Arsenault · 8 years ago
  6. ac2b026 [AMDGPU][MC][GFX9] Corrected encoding of ttmp registers, disabled tba/tma by Dmitry Preobrazhensky · 8 years ago
  7. a0342dc [AMDGPU][MC][GFX8][GFX9] Corrected names of integer v_{add/addc/sub/subrev/subb/subbrev} by Dmitry Preobrazhensky · 8 years ago
  8. c8fbf6f [AMDGPU] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC). by Eugene Zelenko · 8 years ago
  9. 1e32550 [AMDGPU][MC][GFX9] Added 16-bit renamed and "_legacy" VALU opcodes by Dmitry Preobrazhensky · 8 years ago
  10. ca7b0a1 AMDGPU: Add instruction definitions for some scratch_* instructions by Matt Arsenault · 8 years ago
  11. 30fc523 [AMDGPU][MC] Corrected disassembler for proper decoding of v_mqsad_u32_u8 by Dmitry Preobrazhensky · 8 years ago
  12. a179d25 [AMDGPU] SDWA: several fixes for V_CVT and VOPC instructions by Sam Kolton · 8 years ago
  13. 851a3d9 [AMDGPU][MC][GFX9] Corrected VOP3P relevant code to fix disassembler failures by Dmitry Preobrazhensky · 8 years ago
  14. 549c89d [AMDGPU] SDWA: merge VI and GFX9 pseudo instructions by Sam Kolton · 8 years ago
  15. 264b5d9 Move Object format code to lib/BinaryFormat. by Zachary Turner · 8 years ago
  16. 6bda14b Sort the remaining #include lines in include/... and lib/.... by Chandler Carruth · 8 years ago
  17. 363f47a [AMDGPU] SDWA: add disassembler support for GFX9 by Sam Kolton · 8 years ago
  18. ce941c9 [AMDGPU][MC] Corrected disassembler to decode instructions with 2 literals by Dmitry Preobrazhensky · 8 years ago
  19. 678e111 AMDGPU: Fix crash when disassembling VOP3 mac by Matt Arsenault · 9 years ago
  20. 9be7b0d AMDGPU: Add VOP3P instruction format by Matt Arsenault · 9 years ago
  21. a3b3b48 AMDGPU: Fix disassembly of aperture registers by Matt Arsenault · 9 years ago
  22. d122abe AMDGPU: Replace assert with report_fatal_error by Matt Arsenault · 9 years ago
  23. 4bd7236 AMDGPU: Fix handling of 16-bit immediates by Matt Arsenault · 9 years ago
  24. 640c44b AMDGPU: Disallow exec as SMEM instruction operand by Matt Arsenault · 9 years ago
  25. 92b355b AMDGPU: Replace assert(false) with unreachable by Matt Arsenault · 9 years ago
  26. f3dd863 AMDGPU: Whitespace fixes by Matt Arsenault · 9 years ago
  27. f42454b Move the global variables representing each Target behind accessor function by Mehdi Amini · 9 years ago
  28. 3381d7a [AMDGPU] Disassembler: print label names in branch instructions by Sam Kolton · 9 years ago
  29. 9844610 Revert "[AMDGPU] Disassembler: print label names in branch instructions" by Sam Kolton · 9 years ago
  30. 1559f76 [AMDGPU] Disassembler: print label names in branch instructions by Sam Kolton · 9 years ago
  31. cb540bc AMDGPU: Expand register indexing pseudos in custom inserter by Matt Arsenault · 9 years ago
  32. 37fefd6 AMDGPU: Fix trailing whitespace by Matt Arsenault · 9 years ago
  33. c9bdcb7 [AMDGPU] Disassembler: Support for sdwa instructions by Sam Kolton · 9 years ago
  34. b49c336 Fix build warning introduced in r270552 "[AMDGPU][llvm-mc] Disassembler: support for TTMP/TBA/TMA registers." by Artem Tamazov · 9 years ago
  35. 212a251 [AMDGPU][llvm-mc] Disassembler: support for TTMP/TBA/TMA registers. by Artem Tamazov · 9 years ago
  36. 38e496b Fixed/Recommitted r267733 "[AMDGPU][llvm-mc] Add support of TTMP quads. Rework M0 exclusion for SMRD." by Artem Tamazov · 10 years ago
  37. 03e1647 Revert "[AMDGPU][llvm-mc] Add support of TTMP quads. Rework M0 exclusion for SMRD." by Chad Rosier · 10 years ago
  38. 3896f8f [AMDGPU][llvm-mc] Add support of TTMP quads. Rework M0 exclusion for SMRD. by Artem Tamazov · 10 years ago
  39. 1048fb1 [AMDGPU] Disassembler: support for DPP by Sam Kolton · 10 years ago
  40. a4db224 [AMDGPU] Fix SMEM instructions encoding/operand namings by Valery Pykhtin · 10 years ago
  41. 824e804 test commit by Valery Pykhtin · 10 years ago
  42. e309e14 [AMDGPU] Remove unused disassembler code. by Nikolay Haustov · 10 years ago
  43. 47a115c [AMDGPU] Fix build warnings. by Nikolay Haustov · 10 years ago
  44. ac106ad [AMDGPU] Disassembler code refactored + error messages. by Nikolay Haustov · 10 years ago
  45. 161a158 [AMDGPU] Disassembler: Support for all VOP1 instructions. by Nikolay Haustov · 10 years ago
  46. e1818af [AMDGPU] Disassembler: Added basic disassembler for AMDGPU target by Tom Stellard · 10 years ago