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gerrit-public.fairphone.software / toolchain / llvm-project / 9e77d0c6df1dad1bb6463f9ad6269d979feb8697 / llvm / lib / Target / AMDGPU / Disassembler / AMDGPUDisassembler.cpp
  1. 9e77d0c [AMDGPU] gfx908 register file changes by Stanislav Mekhanoshin · 6 years ago
  2. 0846c12 [AMDGPU] gfx1010 core wave32 changes by Stanislav Mekhanoshin · 6 years ago
  3. ab4f2ea [AMDGPU] gfx1010 disassembler changes for wave32 by Stanislav Mekhanoshin · 6 years ago
  4. 245b5ba [AMDGPU] gfx1010 dpp16 and dpp8 by Stanislav Mekhanoshin · 6 years ago
  5. 4b0b261 Revert CMake: Make most target symbols hidden by default by Tom Stellard · 6 years ago
  6. 3745713 CMake: Make most target symbols hidden by default by Tom Stellard · 6 years ago
  7. 9111f35 [AMDGPU][MC] Added support of SCC, VCCZ and EXECZ operands by Dmitry Preobrazhensky · 6 years ago
  8. 418e23e AMDGPU: Move disassembler support check to constructor by Matt Arsenault · 6 years ago
  9. ca64ef2 MC: Allow getMaxInstLength to depend on the subtarget by Matt Arsenault · 6 years ago
  10. 8ce2ee9 [AMDGPU] Create a TargetInfo header. NFC by Richard Trieu · 6 years ago
  11. 692560d [AMDGPU] gfx1010 MIMG implementation by Stanislav Mekhanoshin · 6 years ago
  12. 8f3da70 [AMDGPU] gfx1010 VOP2 changes by Stanislav Mekhanoshin · 6 years ago
  13. 33d806a [AMDGPU] gfx1010 sgpr register changes by Stanislav Mekhanoshin · 6 years ago
  14. 5182302 [AMDGPU] Sort out and rename multiple CI/VI predicates by Stanislav Mekhanoshin · 7 years ago
  15. 137976f [AMDGPU][MC][GFX9] Added support of operands shared_base, shared_limit, private_base, private_limit, pops_exiting_wave_id by Dmitry Preobrazhensky · 7 years ago
  16. da644c0 [AMDGPU] Silence gcc 7 warnings by Stanislav Mekhanoshin · 7 years ago
  17. 266f157 [AMDGPU] Mark enum types in SIDefines.h as unsigned by Stanislav Mekhanoshin · 7 years ago
  18. efec139 [AMDGPU] Implement AMDGPUMCInstrAnalysis by Scott Linder · 7 years ago
  19. 6023d59 [AMDGPU][MC] Enable lds_direct operand for v_readfirstlane_b32, v_readlane_b32 and v_writelane_b32 by Dmitry Preobrazhensky · 7 years ago
  20. 942c273 [AMDGPU][MC] Added support of lds_direct operand by Dmitry Preobrazhensky · 7 years ago
  21. 2946cd7 Update the file headers across all of the LLVM projects in the monorepo by Chandler Carruth · 7 years ago
  22. c5a154d AMDGPU: Separate R600 and GCN TableGen files by Tom Stellard · 7 years ago
  23. 0ab200b AMDGPU: Refactor MIMG instruction TableGen using generic tables by Nicolai Haehnle · 7 years ago
  24. f267431 AMDGPU: Turn D16 for MIMG instructions into a regular operand by Nicolai Haehnle · 7 years ago
  25. 44b30b4 AMDGPU: Remove #include "MCTargetDesc/AMDGPUMCTargetDesc.h" from common headers by Tom Stellard · 7 years ago
  26. 603a43f AMDGPU: Add disasm tests for deep learning instructions + fix v_fmac_f32 disasm by Konstantin Zhuravlyov · 7 years ago
  27. 0084adc AMDGPU: Add Vega12 and Vega20 by Matt Arsenault · 7 years ago
  28. b1c3b22 AMDGPU/MC: Allow disassembling without symbol info by Nicolai Haehnle · 8 years ago
  29. 7116e89 [AMDGPU] Improve disassembler error handling by Tim Corringham · 8 years ago
  30. da4a7c0 [AMDGPU][MC] Corrected GATHER4 opcodes by Dmitry Preobrazhensky · 8 years ago
  31. 0a1ff46 [AMDGPU][MC] Corrected dst/data size for MIMG opcodes with d16 modifier by Dmitry Preobrazhensky · 8 years ago
  32. 0905870 AMDGPU/SI: Add decoding in the GFX80_UNPACKED decoding namespace. by Changpeng Fang · 8 years ago
  33. 0b4eb1e [AMDGPU][MC] Added support of 64-bit image atomics by Dmitry Preobrazhensky · 8 years ago
  34. 6b65f7c [AMDGPU][MC][GFX9] Enable inline constants for SDWA operands by Dmitry Preobrazhensky · 8 years ago
  35. 3afbd82 [AMDGPU][MC][GFX8][GFX9] Added XNACK_MASK support by Dmitry Preobrazhensky · 8 years ago
  36. 2713495 [AMDGPU][MC] Added support of 256- and 512-bit tuples of ttmp registers by Dmitry Preobrazhensky · 8 years ago
  37. cad7fa8 AMDGPU: Partially fix disassembly of MIMG instructions by Matt Arsenault · 8 years ago
  38. ac2b026 [AMDGPU][MC][GFX9] Corrected encoding of ttmp registers, disabled tba/tma by Dmitry Preobrazhensky · 8 years ago
  39. a0342dc [AMDGPU][MC][GFX8][GFX9] Corrected names of integer v_{add/addc/sub/subrev/subb/subbrev} by Dmitry Preobrazhensky · 8 years ago
  40. c8fbf6f [AMDGPU] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC). by Eugene Zelenko · 8 years ago
  41. 1e32550 [AMDGPU][MC][GFX9] Added 16-bit renamed and "_legacy" VALU opcodes by Dmitry Preobrazhensky · 8 years ago
  42. ca7b0a1 AMDGPU: Add instruction definitions for some scratch_* instructions by Matt Arsenault · 8 years ago
  43. 30fc523 [AMDGPU][MC] Corrected disassembler for proper decoding of v_mqsad_u32_u8 by Dmitry Preobrazhensky · 8 years ago
  44. a179d25 [AMDGPU] SDWA: several fixes for V_CVT and VOPC instructions by Sam Kolton · 8 years ago
  45. 851a3d9 [AMDGPU][MC][GFX9] Corrected VOP3P relevant code to fix disassembler failures by Dmitry Preobrazhensky · 8 years ago
  46. 549c89d [AMDGPU] SDWA: merge VI and GFX9 pseudo instructions by Sam Kolton · 8 years ago
  47. 264b5d9 Move Object format code to lib/BinaryFormat. by Zachary Turner · 8 years ago
  48. 6bda14b Sort the remaining #include lines in include/... and lib/.... by Chandler Carruth · 8 years ago
  49. 363f47a [AMDGPU] SDWA: add disassembler support for GFX9 by Sam Kolton · 8 years ago
  50. ce941c9 [AMDGPU][MC] Corrected disassembler to decode instructions with 2 literals by Dmitry Preobrazhensky · 8 years ago
  51. 678e111 AMDGPU: Fix crash when disassembling VOP3 mac by Matt Arsenault · 9 years ago
  52. 9be7b0d AMDGPU: Add VOP3P instruction format by Matt Arsenault · 9 years ago
  53. a3b3b48 AMDGPU: Fix disassembly of aperture registers by Matt Arsenault · 9 years ago
  54. d122abe AMDGPU: Replace assert with report_fatal_error by Matt Arsenault · 9 years ago
  55. 4bd7236 AMDGPU: Fix handling of 16-bit immediates by Matt Arsenault · 9 years ago
  56. 640c44b AMDGPU: Disallow exec as SMEM instruction operand by Matt Arsenault · 9 years ago
  57. 92b355b AMDGPU: Replace assert(false) with unreachable by Matt Arsenault · 9 years ago
  58. f3dd863 AMDGPU: Whitespace fixes by Matt Arsenault · 9 years ago
  59. f42454b Move the global variables representing each Target behind accessor function by Mehdi Amini · 9 years ago
  60. 3381d7a [AMDGPU] Disassembler: print label names in branch instructions by Sam Kolton · 9 years ago
  61. 9844610 Revert "[AMDGPU] Disassembler: print label names in branch instructions" by Sam Kolton · 9 years ago
  62. 1559f76 [AMDGPU] Disassembler: print label names in branch instructions by Sam Kolton · 9 years ago
  63. cb540bc AMDGPU: Expand register indexing pseudos in custom inserter by Matt Arsenault · 9 years ago
  64. 37fefd6 AMDGPU: Fix trailing whitespace by Matt Arsenault · 9 years ago
  65. c9bdcb7 [AMDGPU] Disassembler: Support for sdwa instructions by Sam Kolton · 9 years ago
  66. b49c336 Fix build warning introduced in r270552 "[AMDGPU][llvm-mc] Disassembler: support for TTMP/TBA/TMA registers." by Artem Tamazov · 9 years ago
  67. 212a251 [AMDGPU][llvm-mc] Disassembler: support for TTMP/TBA/TMA registers. by Artem Tamazov · 9 years ago
  68. 38e496b Fixed/Recommitted r267733 "[AMDGPU][llvm-mc] Add support of TTMP quads. Rework M0 exclusion for SMRD." by Artem Tamazov · 9 years ago
  69. 03e1647 Revert "[AMDGPU][llvm-mc] Add support of TTMP quads. Rework M0 exclusion for SMRD." by Chad Rosier · 9 years ago
  70. 3896f8f [AMDGPU][llvm-mc] Add support of TTMP quads. Rework M0 exclusion for SMRD. by Artem Tamazov · 9 years ago
  71. 1048fb1 [AMDGPU] Disassembler: support for DPP by Sam Kolton · 10 years ago
  72. a4db224 [AMDGPU] Fix SMEM instructions encoding/operand namings by Valery Pykhtin · 10 years ago
  73. 824e804 test commit by Valery Pykhtin · 10 years ago
  74. e309e14 [AMDGPU] Remove unused disassembler code. by Nikolay Haustov · 10 years ago
  75. 47a115c [AMDGPU] Fix build warnings. by Nikolay Haustov · 10 years ago
  76. ac106ad [AMDGPU] Disassembler code refactored + error messages. by Nikolay Haustov · 10 years ago
  77. 161a158 [AMDGPU] Disassembler: Support for all VOP1 instructions. by Nikolay Haustov · 10 years ago
  78. e1818af [AMDGPU] Disassembler: Added basic disassembler for AMDGPU target by Tom Stellard · 10 years ago