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gerrit-public.fairphone.software / toolchain / llvm-project / b929a0062e485f7747c5e849f5569e79afb8ae4d / llvm / lib / Target / AMDGPU / AsmParser / AMDGPUAsmParser.cpp
  1. 692560d [AMDGPU] gfx1010 MIMG implementation by Stanislav Mekhanoshin · 7 years ago
  2. a224f68 [AMDGPU] gfx1010 DS implementation by Stanislav Mekhanoshin · 7 years ago
  3. a632294 [AMDGPU] gfx1010 VMEM and SMEM implementation by Stanislav Mekhanoshin · 7 years ago
  4. 6f349d8 Move if() to newline to stop ambiguity over whether it should be else if. NFCI. by Simon Pilgrim · 7 years ago
  5. 4f331cb [AMDGPU] gfx1010 VOPC implementation by Stanislav Mekhanoshin · 7 years ago
  6. 61beff0 [AMDGPU] gfx1010 VOP3 and VOP3P implementation by Stanislav Mekhanoshin · 7 years ago
  7. 8f3da70 [AMDGPU] gfx1010 VOP2 changes by Stanislav Mekhanoshin · 7 years ago
  8. 33d806a [AMDGPU] gfx1010 sgpr register changes by Stanislav Mekhanoshin · 7 years ago
  9. cee607e [AMDGPU] Add gfx1010 target definitions by Stanislav Mekhanoshin · 7 years ago
  10. 47621d7 [AMDGPU][MC] Parser cleanup and refactoring by Dmitry Preobrazhensky · 7 years ago
  11. e2707f5 [AMDGPU][MC] Corrected parsing of SP3 'neg' modifier by Dmitry Preobrazhensky · 7 years ago
  12. 394d0a1 [AMDGPU][MC] Corrected handling of "-" before expressions by Dmitry Preobrazhensky · 7 years ago
  13. 20d52e3 [AMDGPU][MC] Corrected parsing of registers by Dmitry Preobrazhensky · 7 years ago
  14. 45c165b AMDGPU: Fix names for generation features by Matt Arsenault · 7 years ago
  15. d6827ce [AMDGPU][MC] Corrected conversion rules for inlinable constants to match rules for literals by Dmitry Preobrazhensky · 7 years ago
  16. 7f33574 [AMDGPU][MC] Corrected handling of tied src for atomic return MUBUF opcodes by Dmitry Preobrazhensky · 7 years ago
  17. 40f0162 Revert of 357063 [AMDGPU][MC] Corrected handling of tied src for atomic return MUBUF opcodes by Dmitry Preobrazhensky · 7 years ago
  18. bcc4d53 [AMDGPU][MC] Corrected handling of tied src for atomic return MUBUF opcodes by Dmitry Preobrazhensky · 7 years ago
  19. 88268e3 AMDHSA: Fix COMPUTE_PGM_RSRC2.USER_SGPR calculation when parsing ISA assembly by Konstantin Zhuravlyov · 7 years ago
  20. e7bd52f [AMDGPU] Added MsgPack format PAL metadata by Tim Renouf · 7 years ago
  21. d737b55 [AMDGPU] Factored PAL metadata handling out into its own class by Tim Renouf · 7 years ago
  22. 04bd118 [AMDGPU][MC] Corrected checks for DS offset0 range by Dmitry Preobrazhensky · 7 years ago
  23. 137976f [AMDGPU][MC][GFX9] Added support of operands shared_base, shared_limit, private_base, private_limit, pops_exiting_wave_id by Dmitry Preobrazhensky · 7 years ago
  24. da644c0 [AMDGPU] Silence gcc 7 warnings by Stanislav Mekhanoshin · 7 years ago
  25. 20ea21c [AMDGPU] Add support for immediate operand for S_ENDPGM by David Stuttard · 7 years ago
  26. e98944e Use bitset for assembler predicates by Stanislav Mekhanoshin · 7 years ago
  27. 266f157 [AMDGPU] Mark enum types in SIDefines.h as unsigned by Stanislav Mekhanoshin · 7 years ago
  28. 6023d59 [AMDGPU][MC] Enable lds_direct operand for v_readfirstlane_b32, v_readlane_b32 and v_writelane_b32 by Dmitry Preobrazhensky · 7 years ago
  29. 7904231 [AMDGPU][MC] Added register size check for VOP3/SDWA/DPP operands by Dmitry Preobrazhensky · 7 years ago
  30. ef92035 [AMDGPU][MC][GFX8+] Added syntactic sugar for 'vgpr index' operand of instructions s_set_gpr_idx_on and s_set_gpr_idx_mode by Dmitry Preobrazhensky · 7 years ago
  31. 942c273 [AMDGPU][MC] Added support of lds_direct operand by Dmitry Preobrazhensky · 7 years ago
  32. 62a0318 [AMDGPU][MC][CODEOBJECT] Added predefined symbols to access GPU minor and stepping numbers by Dmitry Preobrazhensky · 7 years ago
  33. 2946cd7 Update the file headers across all of the LLVM projects in the monorepo by Chandler Carruth · 7 years ago
  34. 61105ba [AMDGPU][MC] Disabled use of 2 different literals with SOP2/SOPC instructions by Dmitry Preobrazhensky · 7 years ago
  35. f5b36e5 [AMDGPU] Emit MessagePack HSA Metadata for v3 code object by Scott Linder · 7 years ago
  36. 3d9afa2 [AMDGPU] Combine DPP mov with use instructions (VOP1/2/3) by Valery Pykhtin · 7 years ago
  37. 71e43ee AMDGPU: Re-apply r341982 after fixing the layering issue by Konstantin Zhuravlyov · 7 years ago
  38. 9506649 Revert "AMDGPU: Move isa version and EF_AMDGPU_MACH_* determination into TargetParser." by Ilya Biryukov · 7 years ago
  39. 941615e AMDGPU: Move isa version and EF_AMDGPU_MACH_* determination into TargetParser. by Konstantin Zhuravlyov · 7 years ago
  40. 1f334d0 [AMDGPU] Add support for a16 modifiear for gfx9 by Ryan Taylor · 7 years ago
  41. 35484c9 [AMDGPU] New tbuffer intrinsics by Tim Renouf · 7 years ago
  42. 1e8c2c7 [AMDGPU] Update assembler for HSA Code Object v3 by Scott Linder · 7 years ago
  43. 0ab200b AMDGPU: Refactor MIMG instruction TableGen using generic tables by Nicolai Haehnle · 7 years ago
  44. f267431 AMDGPU: Turn D16 for MIMG instructions into a regular operand by Nicolai Haehnle · 7 years ago
  45. 32c6b5c [AMDGPU][MC] Enabled parsing of relocations on VALU instructions by Dmitry Preobrazhensky · 7 years ago
  46. 4329361 [AMDGPU] Added checks for dpp_ctrl value by Stanislav Mekhanoshin · 7 years ago
  47. 0084adc AMDGPU: Add Vega12 and Vega20 by Matt Arsenault · 8 years ago
  48. 6183065 AMDGPU: Remove max_scratch_backing_memory_byte_size from kernel header by Konstantin Zhuravlyov · 8 years ago
  49. 13e77db Fix layering of MachineValueType.h by moving it from CodeGen to Support by David Blaikie · 8 years ago
  50. d98c97b [AMDGPU][MC][GFX8] Added BUFFER_STORE_LDS_DWORD Instruction by Dmitry Preobrazhensky · 8 years ago
  51. da4a7c0 [AMDGPU][MC] Corrected GATHER4 opcodes by Dmitry Preobrazhensky · 8 years ago
  52. d6e1a94 [AMDGPU][MC] Added lds support for MUBUF instructions by Dmitry Preobrazhensky · 8 years ago
  53. 8ceddb0 Remove an unused function. by Eric Christopher · 8 years ago
  54. 0a1ff46 [AMDGPU][MC] Corrected dst/data size for MIMG opcodes with d16 modifier by Dmitry Preobrazhensky · 8 years ago
  55. e3271ae [AMDGPU][MC] Added validation of d16 and r128 modifiers of MIMG opcodes by Dmitry Preobrazhensky · 8 years ago
  56. 4f321ae [AMDGPU][MC] Corrected parsing of image opcode modifiers r128 and d16 by Dmitry Preobrazhensky · 8 years ago
  57. 7068281 [AMDGPU][MC] Added validation of image dst/data size (must match dmask and tfe) by Dmitry Preobrazhensky · 8 years ago
  58. 0e074e3 [AMDGPU][MC] Corrected parsing of image modifiers and encoding of image atomics by Dmitry Preobrazhensky · 8 years ago
  59. 6b65f7c [AMDGPU][MC][GFX9] Enable inline constants for SDWA operands by Dmitry Preobrazhensky · 8 years ago
  60. 62875fc [AMDGPU] Add HW_REG_SH_MEM_BASES symbolic name for s_getreg_b32 by Stanislav Mekhanoshin · 8 years ago
  61. 3afbd82 [AMDGPU][MC][GFX8][GFX9] Added XNACK_MASK support by Dmitry Preobrazhensky · 8 years ago
  62. 414e053 [AMDGPU][MC] Incorrect parsing of flat/global atomic modifiers by Dmitry Preobrazhensky · 8 years ago
  63. 471adf7 [AMDGPU][MC] Corrected handling of negative expressions by Dmitry Preobrazhensky · 8 years ago
  64. c5b0c17 [AMDGPU][MC] Corrected parsing of optional operands for ds_swizzle_b32 by Dmitry Preobrazhensky · 8 years ago
  65. 2713495 [AMDGPU][MC] Added support of 256- and 512-bit tuples of ttmp registers by Dmitry Preobrazhensky · 8 years ago
  66. f7f59b5 [AMDGPU, AsmParser] Enable the mnemonic spell corrector. by Matt Arsenault · 8 years ago
  67. ac2b026 [AMDGPU][MC][GFX9] Corrected encoding of ttmp registers, disabled tba/tma by Dmitry Preobrazhensky · 8 years ago
  68. dd2f1c9 [AMDGPU][MC][GFX9] Added support of 'inst_offset' modifier for compatibility with SP3 by Dmitry Preobrazhensky · 8 years ago
  69. 682a654 [AMDGPU][MC][GFX9][disassembler] Corrected decoding of op_sel_hi for v_mad_mix* by Dmitry Preobrazhensky · 8 years ago
  70. 219066b AMDGPU: Improve note directive verification in assembler by Konstantin Zhuravlyov · 8 years ago
  71. 9c05b2b AMDGPU: Add support for isa version note by Konstantin Zhuravlyov · 8 years ago
  72. 516651b AMDGPU/NFC: Minor clean ups in HSA metadata by Konstantin Zhuravlyov · 8 years ago
  73. c3beb6a AMDGPU/NFC: Minor clean ups in PAL metadata by Konstantin Zhuravlyov · 8 years ago
  74. a63b0f9 AMDGPU/NFC: Rename code object metadata as HSA metadata by Konstantin Zhuravlyov · 8 years ago
  75. 4191b9e [Asm] Add debug tracing in table-generated assembly matcher by Oliver Stannard · 8 years ago
  76. 72800f0 [AMDGPU] implemented pal metadata by Tim Renouf · 8 years ago
  77. e135c4c AMDGPU: Add tied operands to v_mad_mix{lo|hi}_f16 by Matt Arsenault · 8 years ago
  78. c8f8cda AMDGPU: Correct operand types for v_mad_mix* by Matt Arsenault · 8 years ago
  79. ff64aa5 [AMDGPU][MC][GFX9] Added integer clamping support for VOP3 opcodes by Dmitry Preobrazhensky · 8 years ago
  80. c8fbf6f [AMDGPU] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC). by Eugene Zelenko · 8 years ago
  81. 79f3ade [AMDGPU] Add pseudo "old" source to all DPP instructions by Connor Abbott · 8 years ago
  82. 50805a0 [AMDGPU][MC] Corrected VOP3 version of v_interp_* instructions for VI by Dmitry Preobrazhensky · 8 years ago
  83. 4b11a78 [AMDGPU][MC] Enabled expressions as operands by Dmitry Preobrazhensky · 8 years ago
  84. abf2839 [AMDGPU][MC][GFX9] Added support of VOP3 'op_sel' modifier by Dmitry Preobrazhensky · 8 years ago
  85. 7f46baf fix typos in comments; NFC by Hiroshi Inoue · 8 years ago
  86. 10ac2fd [AMDGPU] Assembler: refactor convert methods (VOP3 and MIMG) by Sam Kolton · 8 years ago
  87. b2d24e2 [AMDGPU][mc][gfx9] Added support of op_sel/op_sel_hi for V_MAD_MIX* by Dmitry Preobrazhensky · 8 years ago
  88. 70e8bc1 [AMDGPU] Add intrinsics for tbuffer load and store by David Stuttard · 8 years ago
  89. dc4ac82 [AMDGPU][MC] Corrected V_*QSAD* instructions to check that dest register is different than any of the src by Dmitry Preobrazhensky · 8 years ago
  90. 549c89d [AMDGPU] SDWA: merge VI and GFX9 pseudo instructions by Sam Kolton · 8 years ago
  91. 9698f1c AMDGPU: Start adding global_* instructions by Matt Arsenault · 8 years ago
  92. 36559b2 [AMDGPU] Remove now dead defaultOffsetS13(). NFCI. by Davide Italiano · 8 years ago
  93. fd02314 AMDGPU: Start adding offset fields to flat instructions by Matt Arsenault · 8 years ago
  94. 5a2f881 [AMDGPU][MC] Corrected error message for s_waitcnt helpers by Dmitry Preobrazhensky · 8 years ago
  95. 264b5d9 Move Object format code to lib/BinaryFormat. by Zachary Turner · 8 years ago
  96. 6bda14b Sort the remaining #include lines in include/... and lib/.... by Chandler Carruth · 8 years ago
  97. 5b0bf2ff AMDGPU: Remove deprecated and unused elf definitions by Konstantin Zhuravlyov · 8 years ago
  98. 793c592 [AMDGPU][MC] New syntax for ds_swizzle_b32 offset by Dmitry Preobrazhensky · 8 years ago
  99. f7659d71 [AMDGPU] SDWA: Add assembler support for GFX9 by Sam Kolton · 8 years ago
  100. 9321e8f [AMDGPU][MC] Fixed bugs in export instruction by Dmitry Preobrazhensky · 8 years ago