- ed6e34f Move reMaterialize() from TargetRegisterInfo to TargetInstrInfo. by Evan Cheng · 18 years ago
- 0f760df Fix "Control reaches the end of non-void function" warnings, by Chris Lattner · 18 years ago
- 0e7b00d Replace all target specific implicit def instructions with a target independent one: TargetInstrInfo::IMPLICIT_DEF. by Evan Cheng · 18 years ago
- 6325446 Refactor code. Remove duplicated functions that basically do the same thing as by Evan Cheng · 18 years ago
- 3a4be0f Rename MRegisterInfo to TargetRegisterInfo. by Dan Gohman · 18 years ago
- 3b3286d It's not always safe to fold movsd into xorpd, etc. Check the alignment of the load address first to make sure it's 16 byte aligned. by Evan Cheng · 18 years ago
- 1ba66e0 Remove DefInst from LiveVariables::VarInfo. Use the facilities on MachineRegisterInfo instead. by Owen Anderson · 18 years ago
- 5968751 rename MachineInstr::setInstrDescriptor -> setDesc by Chris Lattner · 18 years ago
- 7250120 Only mark instructions that load a single value without extension as isSimpleLoad = 1. by Evan Cheng · 18 years ago
- 03ad885 rename TargetInstrDescriptor -> TargetInstrDesc. by Chris Lattner · 18 years ago
- e99a6ca Rename all the M_* flags to be namespace qualified enums, and switch by Chris Lattner · 18 years ago
- b0d06b4 Move a bunch more accessors from TargetInstrInfo to TargetInstrDescriptor by Chris Lattner · 18 years ago
- f0f438a remove MachineOpCode typedef. by Chris Lattner · 18 years ago
- a98c679 Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflects by Chris Lattner · 18 years ago
- 2a3be7b Move even more functionality from MRegisterInfo into TargetInstrInfo. by Owen Anderson · 18 years ago
- a4ce4f6 rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate. by Chris Lattner · 18 years ago
- 6bb0c52 Move some more functionality from MRegisterInfo to TargetInstrInfo. by Owen Anderson · 18 years ago
- eee1460 Move some more instruction creation methods from RegisterInfo into InstrInfo. by Owen Anderson · 18 years ago
- 25568e4 Fix a problem where lib/Target/TargetInstrInfo.h would include and use by Chris Lattner · 18 years ago
- 7a73ae9 Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of the by Owen Anderson · 18 years ago
- a5bb370 Add new shorter predicates for testing machine operands for various types: by Chris Lattner · 18 years ago
- 5c46378 Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewise setImmedValue -> setImm by Chris Lattner · 18 years ago
- b3fd2d7 use simplified operand addition methods. by Chris Lattner · 18 years ago
- f3ebc3f Remove attribution from file headers, per discussion on llvmdev. by Chris Lattner · 18 years ago
- 9da02f5 Remove isReg, isImm, and isMBB, and change all their users to use by Dan Gohman · 18 years ago
- e2f23a3 Add lengthof and endof templates that hide a lot of sizeof computations. by Owen Anderson · 18 years ago
- 85ee72f ARM: make branch folder remove unconditional branches by Dale Johannesen · 18 years ago
- 9d41b31 Remove clobbersPred. Add an OptionalDefOperand to instructions which have the 's' bit. by Evan Cheng · 18 years ago
- 3650b2c Incorrect check. by Evan Cheng · 18 years ago
- 94f04c6 Reflects the chanegs made to PredicateOperand. by Evan Cheng · 18 years ago
- e8c1e42 Revert the earlier change that removed the M_REMATERIALIZABLE machine by Dan Gohman · 18 years ago
- 9e82064 Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoad by Dan Gohman · 18 years ago
- a7ca624 Replace TargetInstrInfo::CanBeDuplicated() with a M_NOT_DUPLICABLE bit. by Evan Cheng · 18 years ago
- 36b1f54 Instructions with unique labels or embedded jumptables cannot be duplicated during ifcvt. by Evan Cheng · 18 years ago
- c685546 Handle blocks with 2 unconditional branches in AnalyzeBranch. by Dale Johannesen · 18 years ago
- 5514bbe Add a utility routine to check for unpredicated terminator instruction. by Evan Cheng · 18 years ago
- 6740da9 Fix ARM condition code subsumission check. by Evan Cheng · 18 years ago
- 842be09 Stupid cut-n-paste bug caused me soooo much grief. Why wasn't there a compilation warning? I blame it on the FE folks. by Evan Cheng · 19 years ago
- 2d91a4f Add missing const qualifiers. by Evan Cheng · 19 years ago
- 1d764ec Hooks for predication support. by Evan Cheng · 19 years ago
- 8c8afb2 Fix some -march=thumb regressions. tBR_JTr is not predicable. by Evan Cheng · 19 years ago
- 147b334 BlockHasNoFallThrough() now returns true if block ends with a return instruction; AnalyzeBranch() should ignore predicated instructionsd. by Evan Cheng · 19 years ago
- e20dd92 RemoveBranch() and InsertBranch() now returns number of instructions deleted / inserted. by Evan Cheng · 19 years ago
- dcff2eb PredicateInstruction returns true if the operation was successful. by Evan Cheng · 19 years ago
- e2762c3 Removed isPredicable(). by Evan Cheng · 19 years ago
- ad3aac71 Hooks for predication support. by Evan Cheng · 19 years ago
- 0f7cbe8 Add PredicateOperand to all ARM instructions that have the condition field. by Evan Cheng · 19 years ago
- 4a00cf3 Rewrite of Thumb constant islands handling (exact allowance for padding by Dale Johannesen · 19 years ago
- 910c808 Rename findRegisterUseOperand to findRegisterUseOperandIdx to avoid confusion. by Evan Cheng · 19 years ago
- 8cd224e Relex assertions to account for additional implicit def / use operands. by Evan Cheng · 19 years ago
- fb80151 Removed tabs everywhere except autogenerated & external files. Add make by Anton Korobeynikov · 19 years ago
- e8315fe Inverted logic. by Evan Cheng · 19 years ago
- 7dbbd00 findRegisterUseOperand() changed. by Evan Cheng · 19 years ago
- 9bb01c9 Fix naming inconsistencies. by Evan Cheng · 19 years ago
- ec13f826 Spill / restore should avoid modifying the condition register. by Evan Cheng · 19 years ago
- 95b85e3 Copy and paste bug. by Evan Cheng · 19 years ago
- ce8fa3e Misseed thumb jumptable branch. by Evan Cheng · 19 years ago
- 760c68b Factor GetInstSize() out of constpool island pass. by Evan Cheng · 19 years ago
- f9e5445 Make LABEL a builtin opcode. by Jim Laskey · 19 years ago
- 10043e2 ARM backend contribution from Apple. by Evan Cheng · 19 years ago
- 20350c4 Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead by Evan Cheng · 19 years ago
- ed32883 fix warning about missing newline at end of file by Rafael Espindola · 19 years ago
- aaeede0 implement uncond branch insertion, mark branches with isBranch. by Chris Lattner · 19 years ago
- 3130a75 add shifts to addressing mode 1 by Rafael Espindola · 19 years ago
- e45a79a partial implementation of the ARM Addressing Mode 1 by Rafael Espindola · 19 years ago
- 8c41f99 change the addressing mode of the str instruction to reg+imm by Rafael Espindola · 19 years ago
- e40a7e2 create the raddr addressing mode that matches any register and the frame index by Rafael Espindola · 19 years ago
- f6f5aff handle the "mov reg1, reg2" case in isMoveInstr by Rafael Espindola · 19 years ago
- 27f8bdc implement minimal versions of by Rafael Espindola · 20 years ago
- ffdc24b added a skeleton of the ARM backend by Rafael Espindola · 20 years ago