- 2bb4035 Move TargetRegistry and TargetSelect from Target to Support where they belong. by Evan Cheng · 14 years ago
- bc153d4 Next round of MC refactoring. This patch factor MC table instantiations, MC by Evan Cheng · 14 years ago
- c5e6d2f - Eliminate MCCodeEmitter's dependency on TargetMachine. It now uses MCInstrInfo by Evan Cheng · 14 years ago
- 703a0fb Hide the call to InitMCInstrInfo into tblgen generated ctor. by Evan Cheng · 14 years ago
- 194c3dc Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo. by Evan Cheng · 14 years ago
- 1e210d0 Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.inc by Evan Cheng · 14 years ago
- 612b85e Add branch hinting for SPU. by Kalle Raiskila · 15 years ago
- 2f93128 Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there. by Anton Korobeynikov · 15 years ago
- 10ffc2b Various bits of framework needed for precise machine-level selection by Andrew Trick · 15 years ago
- 8289f78 Remove the isMoveInstr() hook. by Jakob Stoklund Olesen · 15 years ago
- 0961c55 RISC architectures get their memory operand folding for free. by Jakob Stoklund Olesen · 15 years ago
- 1dba681 Replace copyRegToReg with copyPhysReg for CellSPU. by Jakob Stoklund Olesen · 15 years ago
- 0ab5a02 Mark the SPU 'lr' instruction to never have side effects. by Kalle Raiskila · 15 years ago
- 0125b64 Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). This by Stuart Hastings · 15 years ago
- 9dd3ef8 Make SPU backend not assert on jump tables. by Kalle Raiskila · 15 years ago
- 779c69b Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it by Dan Gohman · 16 years ago
- efb126a Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot. by Evan Cheng · 16 years ago
- 6f306d7 use DebugLoc default ctor instead of DebugLoc::getUnknownLoc() by Chris Lattner · 16 years ago
- 4244d12 Teach AnalyzeBranch, RemoveBranch and the branch by Dale Johannesen · 16 years ago
- 047a767 Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor of by Dan Gohman · 16 years ago
- 940fbb0 Remove Streams.h from the targets. by Benjamin Kramer · 16 years ago
- 95fc6ee Remove unused member functions. by Eli Friedman · 16 years ago
- fbcc663 llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable. by Torok Edwin · 16 years ago
- fb8d6d5 Implement changes from Chris's feedback. Finish converting lib/Target. by Torok Edwin · 16 years ago
- d379e89 Handle IMPLICIT_DEF with isUndef operand marker, part 2. This patch moves the code to annotate machineoperands to LiveIntervalAnalysis. It also add markers for implicit_def that define physical registers. The rest, is just a lot of details. by Evan Cheng · 16 years ago
- 99abac8 Remember to set def-flag on register loaded from stack slot in CellSPU. by Jakob Stoklund Olesen · 16 years ago
- f7b83c7 Change MachineInstrBuilder::addReg() to take a flag instead of a list of by Bill Wendling · 16 years ago
- 839ad0a CellSPU: by Scott Michel · 17 years ago
- d1db1ab CellSPU: by Scott Michel · 17 years ago
- 2af1f85 Factor out the code to add a MachineOperand to a MachineInstrBuilder. by Dan Gohman · 17 years ago
- 635f2a6 Remove non-DebugLoc versions of BuildMI from Alpha and Cell. by Dale Johannesen · 17 years ago
- 6b8c76a Eliminate a couple of non-DebugLoc BuildMI variants. Modify callers. by Dale Johannesen · 17 years ago
- f6d609a Move debug loc info along when the spiller creates new instructions. by Bill Wendling · 17 years ago
- 64dfcac Turns out AnalyzeBranch can modify the mbb being analyzed. This is a nasty by Evan Cheng · 17 years ago
- 066757e Move getPointerRegClass from TargetInstrInfo to TargetRegisterInfo. by Evan Cheng · 17 years ago
- 95b2a20 Untabify code. by Scott Michel · 17 years ago
- 9e3e4a9 CellSPU: by Scott Michel · 17 years ago
- ed7d79f CellSPU: by Scott Michel · 17 years ago
- c544cb0 Change TargetInstrInfo::isMoveInstr to return source and destination sub-register indices as well. by Evan Cheng · 17 years ago
- b51cdfa Fix off-by-one error in traversing an array; this fixes a test. by Misha Brukman · 17 years ago
- 6887caf CellSPU: by Scott Michel · 17 years ago
- 6a1f627 CellSPU: by Scott Michel · 17 years ago
- 6d24def - Make copyRegToReg use the "LR" assembler synonym for "OR". Makes finding by Scott Michel · 17 years ago
- 41236c0 - Start moving target-dependent nodes that could be represented by an by Scott Michel · 17 years ago
- 8233527 - Remove Tilmann's custom truncate lowering: it completely hosed over by Scott Michel · 17 years ago
- a249550 CellSPU: by Scott Michel · 17 years ago
- 3f86b51 Split foldMemoryOperand into public non-virtual and protected virtual by Dan Gohman · 17 years ago
- c6918c1 CellSPU: by Scott Michel · 17 years ago
- 0b27325 Add more const qualifiers. This fixes build breakage from r59540. by Dan Gohman · 17 years ago
- 33332bc Const-ify several TargetInstrInfo methods. by Dan Gohman · 17 years ago
- 0d1e9a8 Switch the MachineOperand accessors back to the short names like by Dan Gohman · 17 years ago
- 27fb3dc Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy requested by Owen Anderson · 17 years ago
- 3b46030 Pool-allocation for MachineInstrs, MachineBasicBlocks, and by Dan Gohman · 17 years ago
- 7d98a48 - Remove calls to copyKillDeadInfo which is an N^2 function. Instead, propagate kill / dead markers as new instructions are constructed in foldMemoryOperand, convertToThressAddress, etc. by Evan Cheng · 17 years ago
- 33e396d Remove more iostream header includes. Needed to implement a "FlushStream" by Bill Wendling · 17 years ago
- 78e817d cell really does support cross-regclass moves, because R3 is in lots of different regclasses, and the code is not consistent when it comes to value tracking. by Chris Lattner · 18 years ago
- 7d5eaec Merge current work back to tree to minimize diffs and drift. Major highlights by Scott Michel · 18 years ago
- 3b3286d It's not always safe to fold movsd into xorpd, etc. Check the alignment of the load address first to make sure it's 16 byte aligned. by Evan Cheng · 18 years ago
- bb713ae More cleanups for CellSPU: by Scott Michel · 18 years ago
- f0f438a remove MachineOpCode typedef. by Chris Lattner · 18 years ago
- 2a3be7b Move even more functionality from MRegisterInfo into TargetInstrInfo. by Owen Anderson · 18 years ago
- eee1460 Move some more instruction creation methods from RegisterInfo into InstrInfo. by Owen Anderson · 18 years ago
- 25568e4 Fix a problem where lib/Target/TargetInstrInfo.h would include and use by Chris Lattner · 18 years ago
- 7a73ae9 Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of the by Owen Anderson · 18 years ago
- a5bb370 Add new shorter predicates for testing machine operands for various types: by Chris Lattner · 18 years ago
- 5c46378 Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewise setImmedValue -> setImm by Chris Lattner · 18 years ago
- f3ebc3f Remove attribution from file headers, per discussion on llvmdev. by Chris Lattner · 18 years ago
- 5f1470f More working CellSPU tests: by Scott Michel · 18 years ago
- 098c113 Two more test cases: or_ops.ll (arithmetic or operations) and vecinsert.ll by Scott Michel · 18 years ago
- 9b83446 Add new immed16.ll test case, fix CellSPU errata to make test case work. by Scott Michel · 18 years ago
- c5cccb9 - Restore some i8 functionality in CellSPU - New test case: nand.ll by Scott Michel · 18 years ago
- d1b5b9f Updated source file headers to llvm coding standard. by Scott Michel · 18 years ago
- dfe09ed More files in the CellSPU drop... by Scott Michel · 18 years ago