Log - c4b3a7a1d771a515dbd6d695275be92e6da3eb81 - toolchain/llvm-project

e89496f Remove extra comma in debug output. by Jakob Stoklund Olesen · 14 years ago
7111a63 Print <def,read-undef> to avoid confusion. by Jakob Stoklund Olesen · 14 years ago
80c540e Teach CodeGen's version of computeMaskedBits to understand the range metadata. by Rafael Espindola · 14 years ago
97f889f MachineInstr: Inline the fast path (non-bundle instruction) of hasProperty. by Benjamin Kramer · 14 years ago
d03878b Limit the number of memory operands in MachineInstr to 2^16 and store the number in padding. by Benjamin Kramer · 14 years ago
5a4bcc7 Use uint16_t to store instruction implicit uses and defs. Reduces static data. by Craig Topper · 14 years ago
636ee38 Try to clarify this comment some. by Chandler Carruth · 14 years ago
962152c Remove another outbreak of customized (and completely broken) hashing. by Chandler Carruth · 14 years ago
1d32658 Use uint16_t to store register overlaps to reduce static data. by Craig Topper · 14 years ago
d256c21 Move getBundleStart() into MachineInstrBundle.h. by Jakob Stoklund Olesen · 14 years ago
3eedcce Reverse iterator - should be incrementing rather than decrementing. by Lang Hames · 14 years ago
923d199 Make LiveIntervals::handleMove() bundle aware. by Lang Hames · 14 years ago
e7d3f44 Handle regmasks in findRegisterDefOperandIdx(). by Jakob Stoklund Olesen · 14 years ago
bf152d5 Put instruction names into an indexed string table on the side, removing a pointer from MCInstrDesc. by Benjamin Kramer · 14 years ago
3bc0e0c Added MachineInstr::isBundled() to check if an instruction is part of a bundle. by Andrew Trick · 14 years ago
56fe2ed Handle register mask operands in setPhysRegsDeadExcept(). by Jakob Stoklund Olesen · 14 years ago
4290be4 ArrayRef'ize MI::setPhysRegsDeadExcept(). by Jakob Stoklund Olesen · 14 years ago
f650732 Handle all live physreg defs in the same place. by Jakob Stoklund Olesen · 14 years ago
5e1ac45 Require non-NULL register masks. by Jakob Stoklund Olesen · 14 years ago
8c139a5 Clear kill flags before propagating a copy. by Jakob Stoklund Olesen · 14 years ago
374ed32 Add a new kind of MachineOperand: MO_RegisterMask. by Jakob Stoklund Olesen · 14 years ago
f3e8502 Add 'llvm_unreachable' to passify GCC's understanding of the constraints by Chandler Carruth · 14 years ago
edbb58c5 Remove unnecessary default cases in switches that cover all enum values. by David Blaikie · 14 years ago
7fae11b - Add MachineInstrBundle.h and MachineInstrBundle.cpp. This includes a function by Evan Cheng · 14 years ago
cdf89fd Make MachineInstr instruction property queries more flexible. This change all by Evan Cheng · 14 years ago
7f8e563 Add bundle aware API for querying instruction properties and switch the code by Evan Cheng · 14 years ago
6ad6848 Add missing check. by Jakob Stoklund Olesen · 14 years ago
b0d91ab Add MachineOperand IsInternalRead flag. by Jakob Stoklund Olesen · 14 years ago
2a81dd4 First chunk of MachineInstr bundle support. by Evan Cheng · 14 years ago
82cd9e8 Added invariant field to the DAG.getLoad method and changed all calls. by Pete Cooper · 14 years ago
65ba66c Reverted r143600 - selector reference change by Pete Cooper · 14 years ago
e6173d8 Treat objc selector reference globals as invariant so that MachineLICM can hoist them out of loops. Fixes <rdar://problem/6027699> by Pete Cooper · 14 years ago
8488225 Add missing braces to pacify GCC's -Wparentheses. by Nick Lewycky · 14 years ago
35b362f Add MachineInstr::getRegClassConstraint(). by Jakob Stoklund Olesen · 14 years ago
1e73716 Extract a method for finding the inline asm flag operand. by Jakob Stoklund Olesen · 14 years ago
24abd9d Encode register class constreaints in inline asm instructions. by Jakob Stoklund Olesen · 14 years ago
463b05a Remove NumImplicitOps which is now unused. by Jakob Stoklund Olesen · 14 years ago
2318d1e Rewrite MachineInstr::addOperand() to avoid NumImplicitOps. by Jakob Stoklund Olesen · 14 years ago
ed16ec4 Thumb2 parsing and encoding for IT blocks. by Jim Grosbach · 14 years ago
dee9e8a Tidy up. Trailing whitespace. by Jim Grosbach · 14 years ago
9eb77bf Don't treat a partial <def,undef> operand as a read. by Jakob Stoklund Olesen · 14 years ago
d61b1d5 Print DBG_VALUE variable's location info as a comment. by Devang Patel · 14 years ago
bf8cc60 If known DebugLocs do not match then two DBG_VALUE machine instructions are not identical. For example, by Devang Patel · 14 years ago
25a404e Include a source location when complaining about bad inline assembly. by Jakob Stoklund Olesen · 14 years ago
7da0f9a Take a stab at fixing the llvm-x86_64-linux-checks failure. by Cameron Zwarich · 14 years ago
6cc775f - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and by Evan Cheng · 14 years ago
537a302 Distinguish early clobber output operands from clobbered registers. by Jakob Stoklund Olesen · 14 years ago
6b356b1 Decode and pretty print inline asm operand descriptors. by Jakob Stoklund Olesen · 14 years ago
f071d72 Handle debug info for i128 constants. by Devang Patel · 14 years ago
cfdf339 Re-commit 131172 with fix. MachineInstr identity checks should check dead by Evan Cheng · 14 years ago
89bd2ae Remove an assertion to fix PR9872. by Jakob Stoklund Olesen · 14 years ago
9f638ab Print out the 'nontemporal' info on a store. by Bill Wendling · 15 years ago
76ad3de Ensure all defs referring to a virtual register are marked dead by addRegisterDead(). by Jakob Stoklund Olesen · 15 years ago
65cff414 Add FrameSetup MI flags by Anton Korobeynikov · 15 years ago
2fb5b31 Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic. by Jakob Stoklund Olesen · 15 years ago
1331a15 Replace TargetRegisterInfo::printReg with a PrintReg class that also works without a TRI instance. by Jakob Stoklund Olesen · 15 years ago
6eb516d Do not model all INLINEASM instructions as having unmodelled side effects. by Evan Cheng · 15 years ago
0638c20 DBG_VALUE does not have any side effects; it also makes no sense to mark it cheap as a copy. by Evan Cheng · 15 years ago
21eedfb Unbreak build. by Evan Cheng · 15 years ago
a94cc6d Make CodeGen TBAA-aware. by Dan Gohman · 15 years ago
a494169 Shrink MachineOperand from 40 to 32 bytes on 64-bit hosts. by Jakob Stoklund Olesen · 15 years ago
886250c convert a couple more places to use the new getStore() by Chris Lattner · 15 years ago
50287ea add some accessors by Chris Lattner · 15 years ago
82fd06d it's more elegant to put the "getConstantPool" and by Chris Lattner · 15 years ago
de93bb0 add some helpful accessors. by Chris Lattner · 15 years ago
00ca0b8 start pushing MachinePointerInfo out through the MachineMemOperand interface by Chris Lattner · 15 years ago
187f653 refactor the Value*/offset pair from MachineMemOperand out to a new by Chris Lattner · 15 years ago
40b31ad Prefix `next' iterator operation with `llvm::'. by Oscar Fuentes · 15 years ago
0ff2c11 Print out the regclass of any virtual registers used by a machine instruction. by Jakob Stoklund Olesen · 15 years ago
ac0a210 Print symbolic subreg indices on REG_SEQUENCE and INSERT_SUBREG. by Jakob Stoklund Olesen · 15 years ago
4d887f7c Propagate the AlignStack bit in InlineAsm's to the by Dale Johannesen · 15 years ago
c728518 Print InlinedAt location. by Devang Patel · 15 years ago
8693650 Teach regular and fast isel to set dead flags on unused implicit defs by Dan Gohman · 15 years ago
a8ad977 Slightly change the meaning of the reMaterialize target hook when the original by Jakob Stoklund Olesen · 15 years ago
7b0ac86 Properly compose subregister indices when coalescing. by Jakob Stoklund Olesen · 15 years ago
64824ea Add a TargetRegisterInfo::composeSubRegIndices hook with a default by Jakob Stoklund Olesen · 15 years ago
1ad0d5e Print symbolic SubRegIndex names on machine operands. by Jakob Stoklund Olesen · 15 years ago
3858451 - Change MachineInstr::findRegisterDefOperandIdx so it can also look for defs by Evan Cheng · 15 years ago
7d7f604 Add MachineInstr::readsWritesVirtualRegister() to determine if an instruction by Jakob Stoklund Olesen · 15 years ago
b4e1687 Revert "Use MachineInstr::readsWritesVirtualRegister to determine if a register is read." by Jakob Stoklund Olesen · 15 years ago
8e8e090 Use MachineInstr::readsWritesVirtualRegister to determine if a register is read. by Jakob Stoklund Olesen · 15 years ago
1f38010 If the first definition of a virtual register is a partial redef, add an by Jakob Stoklund Olesen · 15 years ago
5d4c134 Add MachineInstr::readsVirtualRegister() in preparation for proper handling of by Jakob Stoklund Olesen · 15 years ago
c90f51c Teach MachineLICM and MachineSink how to clear kill flags conservatively by Dan Gohman · 15 years ago
d4d1a51 Pretty print DBG_VALUE machine instructions. by Evan Cheng · 16 years ago
d8eeb12 Use getNumImplicitDefs() and getNumImplicitUses(). by Bob Wilson · 16 years ago
406f270 Fix up some comments. by Bob Wilson · 16 years ago
b083c47 Coalescer should not delete copy instructions whose defs are partially dead. e.g. by Evan Cheng · 16 years ago
f839ee0 fix a latent bug my inline asm stuff exposed: by Chris Lattner · 16 years ago
bd009d6 stop using DebugLoc::getUnknownLoc() by Chris Lattner · 16 years ago
915c5f9 Switch the code generator (except the JIT) onto the new DebugLoc by Chris Lattner · 16 years ago
6c604e3 add support for MCSymbols as operands to MachineInstrs. by Chris Lattner · 16 years ago
3b548aa Avoid using DIDescriptor.isNull(). by Devang Patel · 16 years ago
bc97f6b Revert r97947. by Devang Patel · 16 years ago
fe28599 Avoid using DIDescriptor.isNull(). by Devang Patel · 16 years ago
59d27fe Move MachineInstrExpressionTrait::getHashValue() out of line so it can skip over only virtual register defs. This matches what isEqual() is doing. by Evan Cheng · 16 years ago
0f260e1 Fix funky indentation and add comments. by Evan Cheng · 16 years ago
e9c46c2 - Change MachineInstr::isIdenticalTo to take a new option that determines whether it should skip checking defs or at least virtual register defs. This subsumes part of the TargetInstrInfo::isIdentical functionality. by Evan Cheng · 16 years ago
62e795a Swap parameters of isSafeToMove and isSafeToReMat for consistency. by Evan Cheng · 16 years ago
3a0412f by David Greene · 16 years ago